CN205229266U - Residual current test circuit - Google Patents

Residual current test circuit Download PDF

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Publication number
CN205229266U
CN205229266U CN201520769554.8U CN201520769554U CN205229266U CN 205229266 U CN205229266 U CN 205229266U CN 201520769554 U CN201520769554 U CN 201520769554U CN 205229266 U CN205229266 U CN 205229266U
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resistance
input end
pin
signal input
test circuit
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杜明胜
吴笛
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Siemens Circuit Protection Systems Ltd
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Siemens Circuit Protection Systems Ltd
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Abstract

The utility model provides a residual current test circuit, wherein, include: an active signal input part, a passive signal input, a comparator, its input with it has a first resistance to establish ties between the active signal input part, a first triode, its base are connected to fourth resistance, its grounded collector, wherein, the other end of fourth resistance is connected to the output of comparator, an opto -coupler, it is formed by a photodiode and a second triode coupling, and it has first pin and second pin and third pin and fourth pin, wherein, first pin connection has 1 the 5th resistance, a controller, it is connected to the fourth pin of opto -coupler, still be connected with 1 the 6th resistance on the tie point between controller and the fourth pin, the other end of the 6th resistance is connected with an external power supply. The utility model provides a residual current test circuit accuracy is good, facilitates the use.

Description

Residual current test circuit
Technical field
The utility model relates to low tension switch field, particularly relates to the residual current test circuit of low tension switch.
Background technology
In low tension switch field, the leakage current in the break of switch and break is the important parameter of low tension switch performance, and wherein, the break of low tension switch and leakage current thereof detect and be generally divided into external active signal and passive touch to signal.
The low tension switch break testing mechanism that prior art is commonly used is more complicated.Wherein, the detection of external active trigger pip, common method welds a normally closed relay at the two ends of active signal, and the leakage current produced by residual current test board passes through normally closed relay.After leakage current reaches the threshold value of regulation, active signal triggers normally closed relay and disconnects, and now, leakage tests platform will detect the signal that leakage current disconnects, thus demonstrates break.The method test is comparatively complicated, and normally closed relay has regular hour delay, and the time of test can be caused inaccurate.
And external passive signal detection is as follows: first, the leakage current that leakage current test board produces is loaded on live wire, then live wire is connected to the public point of normally closed passive node, again the live wire of bus is connected to the normally closed end points of passive node, thus the leakage current produced on live wire is input to public point, on the live wire of bus after normal-closed end point exports.After the leakage current on live wire reaches the threshold value of regulation, normally closed passive node disconnects, thus makes leakage current test board the breaking signal of leakage current be detected, and then exports break.This method of testing is very complicated, and is directly loaded on passive node by forceful electric power and has certain risk.
Utility model content
The utility model provides residual current test circuit, wherein, comprising: an active signal input end, one passive signal input end, one comparer, one first resistance is in series with between its input end and described active signal input end, its another input end is connected with the second resistance of a ground connection, also be in series with one the 3rd resistance and the 8th resistance between described second resistance and this input end successively, described 8th resistance is connected to the output terminal of described comparer, one first triode, its base stage is connected to the 4th resistance, its grounded collector, and wherein, the other end of described 4th resistance is connected to the output terminal of described comparer, one optocoupler, it is coupled to form by a photodiode and one second triode, it has the first pin and the second pin that are connected to described photodiode input end and output terminal and the three-prong being connected to described second transistor emitter and collector and the 4th pin, wherein, described first pin is connected with one the 5th resistance, the other end of described 5th resistance is connected to an external power supply, described second pin is connected to the emitter of described first triode, between the emitter that described passive signal input end is connected to described first triode and the second pin, described three-prong ground connection, one controller, it is connected to the 4th pin of described optocoupler, the tie point between described controller and the 4th pin is also connected with one the 6th resistance, and the other end of described 6th resistance is connected with an external power supply.The residual current test circuit degree of accuracy that the utility model provides is good, easy to use, reduces costs, and improves stability and the reliability of product.
Further, described active signal input end is also connected with one first diode, and described first diode cathode is connected to described active signal input end.This first diode forward conducting, for serving as buffering.
Further, described passive signal input end is also connected with one second diode, and described second diode cathode is connected to described passive signal input end.Described second diode reverse conducting, for serving as the buffering accepting controller electric signal.
Further, the positive pole of described second diode is also connected with 1 the tenth resistance.Tenth resistance is for serving as the effect of current limliting.
Further, the negative pole of described first diode is also connected with one first Transient Suppression Diode, the other end ground connection of described first Transient Suppression Diode.First Transient Suppression Diode is used for preventing surge.
Further, the positive pole of described second diode is also connected with one second Transient Suppression Diode, the other end ground connection of described second Transient Suppression Diode.Second Transient Suppression Diode is used for preventing surge.
Further, described comparer is also connected with an external power supply.
Further, the 9th resistance of a ground connection is also connected with between described first resistance and the input end of described comparer.9th resistance is used for providing a pull down resistor over the ground to comparer.
Further, described residual current test circuit also comprises a terminal block, and two pins of described terminal block are connected to described active signal input end and described passive signal input end, another two pins ground connection respectively of described terminal block.Active signal input end and one of them ground pin form loop, and passive signal input end and another ground pin form loop.
Accompanying drawing explanation
Fig. 1 is the structural representation of the residual current test circuit according to the utility model specific embodiment.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is described.
Hereafter by being example in conjunction with low tension switch, the residual current test circuit of the leakage current being used for testing in the break of low tension switch and break is described.It should be noted that, the utility model is not limited to be applicable to low tension switch field.
Wherein, the low and high level transformation period of low tension switch in breaking course is exactly break, and what detect in this break is exactly leakage current.
The residual current test circuit that the utility model provides can be tested active signal and passive signal simultaneously.Wherein, at active signal input end, by live wire access simulation leakage current also then respectively by bus and mutual inductor stroke loop, when external voltage electric current is greater than the predetermined threshold of comparer, comparer then triggers upset and sends signal to controller.And at passive signal input end, provide electric signal by controller to passive signal input end thus its break and leakage current are tested.
Fig. 1 shows residual current test circuit, and it comprises an an an active signal input end a and passive signal input end b and comparer C.Wherein, be in series with one first resistance R1 between the input end of comparer C and active signal input end a, its another input end is connected with the second resistance R2 of a ground connection.Wherein, the first resistance R1 is used for dividing potential drop and current limliting.Also be in series with one the 3rd resistance R3 and the 8th resistance R8 between second resistance R2 and this input end successively, the 8th resistance R8 is connected to the output terminal of comparer C.Described comparer C is also connected with an external power supply P.First triode P1 is pnp type triode, and its base stage is connected to the 4th resistance 4, its grounded collector, and wherein, the other end of the 4th resistance R4 is connected to the output terminal of comparer c.Optocoupler O is coupled to form by a photodiode d3 and one second triode P2, and it has the first pin one and the second pin two that are connected to photodiode d3 input end and output terminal and the three-prong 3 being connected to the second triode P2 emitter and collector and the 4th pin 4.Wherein, first pin one is connected with one the 5th resistance R5, the other end of the 5th resistance R5 is connected to an external power supply P, second pin two is connected to the emitter of the first triode P1, between the emitter that passive signal input end b is connected to described first triode P1 and the second pin two, three-prong 3 ground connection.Controller D is connected to the 4th pin 4 of optocoupler O, the tie point between controller D and the 4th pin 4 is also connected with one the 6th resistance R6, and the other end of the 6th resistance R6 is connected with an external power supply P.
Wherein, comparer C, for serving as the buffering of active input signal, then triggers when input voltage is greater than predetermined threshold and overturns.Wherein, the second resistance R2, the 3rd resistance R3 and the 8th resistance R8 are used for providing reference current voltage (i.e. predetermined threshold) to comparer C.
Wherein, after comparer C triggers and overturns, output signal to the first triode p1, the first triode p1 conducting also outputs signal to optocoupler O.Wherein, optocoupler O is for serving as the function of isolation and level conversion.Then, optocoupler O outputs signal to controller D, and controller D then tests break and leakage current.
Further, active signal input end a is also connected with one first diode d1, and the first diode d1 positive pole is connected to described active signal input end a.Wherein, described first diode d1 forward is opened, for serving as the effect of buffering.
Further, passive signal input end b is also connected with one second diode d2, and the second diode d2 negative pole is connected to described passive signal input end b.Because passive signal input end oneself can not produce electric signal, therefore provide electric signal to passive signal input end conversely through the 5th resistance R5, photodiode d3, the tenth resistance R10 and the second diode d2 successively by external power supply P, therefore the second diode d2 is reverse-conducting.Passive signal input end b directly sends a signal to optocoupler O after obtaining electric signal, and optocoupler O then sends a signal to controller D and tests break and leakage current.
Further, the positive pole of the second diode d2 is also connected with 1 the tenth resistance R10, and it is for serving as the effect of current limliting.
Further, the negative pole of the first diode d1 is also connected with one first Transient Suppression Diode TVS1, the other end ground connection of the first Transient Suppression Diode TVS1.The positive pole of the second diode d2 is also connected with one second Transient Suppression Diode TVS2, the other end ground connection of the second Transient Suppression Diode TVS2.Above-mentioned first Transient Suppression Diode TVS1 and the second Transient Suppression Diode TVS2 is used for preventing surge.
Further, be also connected with the 9th resistance R9 of a ground connection between the first resistance R1 and the input end of comparer C, it provides a pull down resistor over the ground for giving comparer C.
Further, residual current test circuit also comprises a terminal block E, and two pins of terminal block E are connected to active signal input end a and passive signal input end b, another two pins ground connection respectively of terminal block (E).Wherein, active signal input end a and one of them ground pin form loop, and passive signal input end b and another ground pin form loop.
The residual current test circuit degree of accuracy that the utility model provides is good, easy to use, reduces costs, and improves stability and the reliability of product.
Although content of the present utility model has done detailed introduction by above preferred embodiment, will be appreciated that above-mentioned description should not be considered to restriction of the present utility model.After those skilled in the art have read foregoing, for multiple amendment of the present utility model and substitute will be all apparent.Therefore, protection domain of the present utility model should be limited to the appended claims.In addition, any Reference numeral in claim should be considered as the claim involved by restriction; " comprise " word and do not get rid of device unlisted in other claim or instructions or step; The word such as " first ", " second " is only used for representing title, and does not represent any specific order.

Claims (9)

1. a residual current test circuit, wherein, comprising:
One active signal input end (a);
One passive signal input end (b);
One comparer (c), one first resistance (R1) is in series with between its input end and described active signal input end (a), its another input end is connected with second resistance (R2) of a ground connection, also be in series with one the 3rd resistance (R3) and the 8th resistance (R8) between described second resistance (R2) and this input end successively, described 8th resistance (R8) is connected to the output terminal of described comparer (C);
One first triode (P1), its base stage is connected to the 4th resistance (R4), its grounded collector, and wherein, the other end of described 4th resistance (R4) is connected to the output terminal of described comparer (c);
One optocoupler (O), it is coupled to form by a photodiode (d3) and one second triode (P2), it has the first pin (1) and the second pin (2) that are connected to described photodiode (d3) input end and output terminal and the three-prong (3) being connected to described second triode (P2) emitter and collector and the 4th pin (4)
Wherein, described first pin (1) is connected with one the 5th resistance (R5), the other end of described 5th resistance (R5) is connected to an external power supply (P), described second pin (2) is connected to the emitter of described first triode (P1), between the emitter that described passive signal input end (b) is connected to described first triode (P1) and the second pin (2), described three-prong (3) ground connection;
One controller (D), it is connected to the 4th pin (4) of described optocoupler (O), tie point between described controller (D) and the 4th pin (4) is also connected with one the 6th resistance (R6), the other end of described 6th resistance (R6) is connected with an external power supply (P).
2. residual current test circuit according to claim 1, it is characterized in that, described active signal input end (a) is also connected with one first diode (d1), and described first diode (d1) positive pole is connected to described active signal input end (a).
3. residual current test circuit according to claim 1, it is characterized in that, described passive signal input end (b) is also connected with one second diode (d2), and described second diode (d2) negative pole is connected to described passive signal input end (b).
4. residual current test circuit according to claim 3, is characterized in that, the positive pole of described second diode (d2) is also connected with 1 the tenth resistance (R10).
5. residual current test circuit according to claim 2, it is characterized in that, the negative pole of described first diode (d1) is also connected with one first Transient Suppression Diode (TVS1), the other end ground connection of described first Transient Suppression Diode (TVS1).
6. residual current test circuit according to claim 3, it is characterized in that, the positive pole of described second diode (d2) is also connected with one second Transient Suppression Diode (TVS2), the other end ground connection of described second Transient Suppression Diode (TVS2).
7. residual current test circuit according to claim 1, is characterized in that, described comparer (C) is also connected with an external power supply (P).
8. residual current test circuit according to claim 1, is characterized in that, is also connected with the 9th resistance (R9) of a ground connection between the input end of described first resistance (R1) and described comparer (C).
9. residual current test circuit according to claim 1, it is characterized in that, described residual current test circuit also comprises a terminal block (E), two pins of described terminal block (E) are connected to described active signal input end (a) and described passive signal input end (b), another two pins ground connection respectively of described terminal block (E).
CN201520769554.8U 2015-09-29 2015-09-29 Residual current test circuit Active CN205229266U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107919867A (en) * 2016-10-09 2018-04-17 华为技术有限公司 Digital signal input circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107919867A (en) * 2016-10-09 2018-04-17 华为技术有限公司 Digital signal input circuit

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