CN205210536U - Digital output module of redundant output based on special CPU - Google Patents
Digital output module of redundant output based on special CPU Download PDFInfo
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- CN205210536U CN205210536U CN201521037630.2U CN201521037630U CN205210536U CN 205210536 U CN205210536 U CN 205210536U CN 201521037630 U CN201521037630 U CN 201521037630U CN 205210536 U CN205210536 U CN 205210536U
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- output module
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Abstract
The utility model discloses a digital output module of redundant output based on special CPU, include: on -the -spot IO connecting seat, power solid state relay, optical coupling isolator, multiplexer, main control unit, etherCAT protocol stack chip, integrated circuit board base connector. The utility model discloses an in homemade CPU as main control unit, the utility model has the advantages that the function that has redundant output, load short -circuit protection, excess temperature protection, under -voltage shutoff, the utility model discloses a highly reliable lightning protection of industrial grade hit anti forceful electric power magnetism high frequency interference circuit design, with low costs, the heat dissipation is good, the stable performance reliable, adopt SMD chip and components and parts, can adapt to the industrial field that various electromagnetic interference are big, the environment is abominable, all can steadily use in the work occasion of striking electric current, welding current, converter. And data duplicate protection function, important control signal's output even the inside CPU of circuit also can export the DO data when the machine, is ensured to redundant output.
Description
Technical field
The utility model relates to the digital output module that the redundancy based on dedicated cpu exports, and belongs to technical field of industrial control.
Background technology
At present, digital output module (DO) is one of module that in PLC Industry Control product, frequency of utilization is the highest.The PLC market of China is substantially captured by foreign products and is not considered the problem of redundancy and self diagnosis from security standpoint.
Such as, application number be CN201220572296.0 patent discloses a kind of water proof type digital output module based on bus, comprise mainboard and an attachment plug of parcel in housing, housing, described housing is the shell body of Water-proof aluminium material, described attachment plug is aviation plug, also comprise one in described housing to be connected with mainboard and to connect one from the redundant module of plate, described redundant module is PCB substrate, and this water proof type digital output module also comprises a LED state indicating device.This practical degree of protection is higher, is IP65, can use under outdoor or environment comparatively rugged environment; The utility model has hardware redundancy function, when mainboard breaks down, can work on from plate.
Such as, application number be CN201220235266.0 patent discloses a kind of hot swappable PLC digital output module, it belongs to PLC digital quantity output device technical field; Technical matters to be solved is to provide a kind of PLC digital output module with hot plug defencive function; The technical scheme adopted is: a kind of hot swappable PLC digital output module, comprise: hot connecting and disconnecting source module, MCU unit, digital output unit, communication unit and man-machine interaction unit, the power port of described MCU unit is connected with the power output end of hot connecting and disconnecting source module, the input end of described digital output unit is connected with the signal output part of MCU unit, and the PORT COM of described MCU unit is connected with communication unit.
Such as, application number be CN200820219632.7 patent discloses a kind of MVB digital output module without CPU, comprise DO buffer circuit and MVB physical interface, characterized by further comprising: inside is provided with the FPGA of Manchester Code/decode unit, logic control element; Described MVB is spread out of by DO buffer circuit after sending signal to FPGA process by MVB physical interface; In addition, MVB address configuration device load module distributing equipment address and logical address is also furnished with.This MVB digital output module meets the standard of IEC-61375, has high reliability and high stability, and wherein CPU and MVB protocol controller is completed by a slice FPGA, simplifies circuit structure and is particularly suitable for widely using in locomotive field.
In sum, traditional existing digital output module just guarantees that the on-off model CPU module is sent here correctly exports, more additional protection circuits, such as Phototube Coupling, not redundancy and self-diagnostic function.
Utility model content
The purpose of this utility model is the digital output module providing a kind of redundancy based on dedicated cpu that can overcome above-mentioned technical matters to export, and the utility model adds redundancy and exports and possess self-diagnostic function on the basis realizing switching value stabilizing output.
The utility model comprises: on-the-spot IO Connection Block, Power Solid State relay, optical coupling isolator, multiplexer, master controller, etherCAT protocol stack chip, board base plate connector.During the utility model adopts, domestic CPU is as master controller.The digital output mould that redundancy based on dedicated cpu described in the utility model exports adopts SMD chip and components and parts.
Described on-the-spot IO Connection Block, Power Solid State relay, multiplexer, etherCAT protocol stack chip, board base plate connector connect successively, and described master controller is connected with multiplexer, etherCAT protocol stack chip respectively; Described Power Solid State relay, multiplexer are coupled by optical coupling isolator.
The data source of the utility model digital output, from board base plate connector, enters etherCAT protocol stack chip by EBUS; Described EBUS is the Low Voltage Differential Signal of German Bei Fu company use and the data transmission standard of LVDS standard definition; EtherCAT protocol stack chip and master controller carry out data communication by SPI; Described SPI (SerialPeripheralInterface) is Serial Peripheral Interface (SPI), is a kind of high speed, full duplex, synchronous communication bus; Described master controller reads the DO data in described etherCAT protocol stack chip, and is exported by the GPIO (General-PurposeInput/OutputPorts, general purpose I/O port) of described master controller.The DO data of described master controller and described etherCAT protocol stack chip are all outputted to described multiplexer, described DO and digital output by the utility model.When described master controller normally runs, the DO data that the GPIO (General-PurposeInput/OutputPorts, general purpose I/O port) that described multiplexer exports described master controller transmits; When described master controller occurs abnormal, by logic control, signal source output automatically switches, and directly exports the DO data of described etherCAT protocol stack chip, achieves data redundancy and exports, substantially increase reliability.This data redundancy mechanism of the present utility model efficiently avoid digital output module and exports the loss controlling to cause not in time, substantially increases independently controlled ability, also reduces cost simultaneously.
On-off model through the work of optical coupling isolator driving power solid-state relay by multiplexer, is exported to on-the-spot IO Connection Block and is connected to field apparatus by connection terminal again by the utility model.Power Solid State relay has load short circuits protection, overheat protector, the function of undervoltage turnoff.Meanwhile, the excess temperature diagnostic signal of Power Solid State relay is connected to master controller and makes master controller by the data that read excess temperature diagnostic signal to check whether chip is abnormal and to be shown as which kind of abnormal conditions by the external LED of programmed control.
The utility model has the advantages that the function with redundancy output, load short circuits protection, overheat protector, undervoltage turnoff; the utility model employing technical grade is highly reliable, and anti-lightning strike anti-strong electromagnetic high-frequency interferencing circuit designs, cost is low, it is good, stable and reliable for performance to dispel the heat, adopt SMD chip and components and parts; can adapt to that various electromagnetic interference (EMI) is large, the industry spot of bad environments, in the workplace of striking electric current, welding current, frequency converter, equal Absorbable organic halogens uses.And data double protection functions, redundancy exports.Even if inside circuit CPU also can export DO data when machine, guarantee the output of important control signal.Simultaneously the utility model can carry out Autonomous test to facilitate Timeliness coverage abnormal and more exchange device, and therefore, the utility model has stronger practical value and realistic meaning.
Accompanying drawing explanation
Fig. 1 is the schematic block circuit diagram of the digital output module that the redundancy based on dedicated cpu described in the utility model exports.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is described in detail.As shown in Figure 1, the utility model comprises: on-the-spot IO Connection Block, Power Solid State relay, optical coupling isolator, multiplexer, master controller, etherCAT protocol stack chip, board base plate connector.Described on-the-spot IO Connection Block, Power Solid State relay, multiplexer, etherCAT protocol stack chip, board base plate connector connect successively, and described master controller is connected with multiplexer, etherCAT protocol stack chip respectively; Described Power Solid State relay, multiplexer are coupled by optical coupling isolator.During the utility model adopts, domestic CPU is as master controller.
The data source of the utility model digital output, from board base plate connector, enters etherCAT protocol stack chip by EBUS; Described EBUS is the Low Voltage Differential Signal of German Bei Fu company use and the data transmission standard of LVDS standard definition; EtherCAT protocol stack chip and master controller carry out data communication by SPI; Described SPI (SerialPeripheralInterface) is Serial Peripheral Interface (SPI), is a kind of high speed, full duplex, synchronous communication bus; Described master controller reads the DO data in described etherCAT protocol stack chip, and is exported by the GPIO (General-PurposeInput/OutputPorts, general purpose I/O port) of described master controller.The DO data of described master controller and described etherCAT protocol stack chip are all outputted to described multiplexer, described DO and digital output by the utility model.When described master controller normally runs, the DO data that the GPIO (General-PurposeInput/OutputPorts, general purpose I/O port) that described multiplexer exports described master controller transmits; When described master controller occurs abnormal, by logic control, signal source output automatically switches, and directly exports the DO data of described etherCAT protocol stack chip, achieves data redundancy and exports, substantially increase reliability.This data redundancy mechanism of the present utility model efficiently avoid digital output module and exports the loss controlling to cause not in time, substantially increases independently controlled ability, also reduces cost simultaneously.On-off model through the work of optical coupling isolator driving power solid-state relay by multiplexer, is exported to on-the-spot IO Connection Block and is connected to field apparatus by connection terminal again by the utility model.Power Solid State relay has load short circuits protection, overheat protector, the function of undervoltage turnoff.Meanwhile, the excess temperature diagnostic signal of Power Solid State relay is connected to master controller and makes master controller by the data that read excess temperature diagnostic signal to check whether chip is abnormal and to be shown as which kind of abnormal conditions by the external LED of programmed control.
The above; be only embodiment of the present utility model; but protection domain of the present utility model is not limited thereto; anyly be familiar with those skilled in the art in the utility model scope of disclosure; the change that can expect easily or replacement, all should be encompassed in the protection domain of the utility model claim.
Claims (4)
1. based on the digital output module that the redundancy of dedicated cpu exports, it is characterized in that, comprising: on-the-spot IO Connection Block, Power Solid State relay, optical coupling isolator, multiplexer, master controller, etherCAT protocol stack chip, board base plate connector;
Described on-the-spot IO Connection Block, Power Solid State relay, multiplexer, etherCAT protocol stack chip, board base plate connector connect successively, and described master controller is connected with multiplexer, etherCAT protocol stack chip respectively; Described Power Solid State relay, multiplexer are coupled by optical coupling isolator.
2. the digital output module that exports of the redundancy based on dedicated cpu according to claim 1, is characterized in that, domestic CPU during described master controller adopts.
3. the digital output module that exports of the redundancy based on dedicated cpu according to claim 1, it is characterized in that, described etherCAT protocol stack chip and master controller carry out data communication by SPI.
4. the digital output module that exports of the redundancy based on dedicated cpu according to claim 1, it is characterized in that, the digital output mould that the described redundancy based on dedicated cpu exports adopts SMD chip and components and parts.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521037630.2U CN205210536U (en) | 2015-12-14 | 2015-12-14 | Digital output module of redundant output based on special CPU |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521037630.2U CN205210536U (en) | 2015-12-14 | 2015-12-14 | Digital output module of redundant output based on special CPU |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205210536U true CN205210536U (en) | 2016-05-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201521037630.2U Withdrawn - After Issue CN205210536U (en) | 2015-12-14 | 2015-12-14 | Digital output module of redundant output based on special CPU |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205210536U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105404140A (en) * | 2015-12-14 | 2016-03-16 | 中国电子信息产业集团有限公司第六研究所 | Redundancy output digital quantity output module based on special-purpose CPU |
| CN106933165A (en) * | 2017-05-05 | 2017-07-07 | 天津市英贝特航天科技有限公司 | Method and equipment for multi-way switching value input and output |
-
2015
- 2015-12-14 CN CN201521037630.2U patent/CN205210536U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105404140A (en) * | 2015-12-14 | 2016-03-16 | 中国电子信息产业集团有限公司第六研究所 | Redundancy output digital quantity output module based on special-purpose CPU |
| CN105404140B (en) * | 2015-12-14 | 2019-01-29 | 中国电子信息产业集团有限公司第六研究所 | The digital output module of redundancy output based on CPU |
| CN106933165A (en) * | 2017-05-05 | 2017-07-07 | 天津市英贝特航天科技有限公司 | Method and equipment for multi-way switching value input and output |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20160504 Effective date of abandoning: 20190129 |
|
| AV01 | Patent right actively abandoned |