CN205160388U - Full current feedback controller chip of low -cost effective multistage digital filtering of iteration - Google Patents

Full current feedback controller chip of low -cost effective multistage digital filtering of iteration Download PDF

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Publication number
CN205160388U
CN205160388U CN201521014255.XU CN201521014255U CN205160388U CN 205160388 U CN205160388 U CN 205160388U CN 201521014255 U CN201521014255 U CN 201521014255U CN 205160388 U CN205160388 U CN 205160388U
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China
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output
pwm
input
feedback signal
signal
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Expired - Fee Related
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CN201521014255.XU
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Chinese (zh)
Inventor
韩秀峰
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SHANGHAI MAGIC VALLEY IC TECHNOLOGY CO., LTD.
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SHANGHAI MEIXUAN INDUSTRIAL Co Ltd
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Abstract

The utility model discloses a full current feedback controller chip of low -cost effective multistage digital filtering of iteration, including clock generator, PWM signal generator, power switch driver, feedback signal sample thief, PWM comparator and floating potential sampling circuit, the clock signal of clock generator's output and the output signal of PWM comparator output end are connected respectively to PWM signal generator's stream input end, the input of power switch driver is connected in the PWM signal of PWM signal generator's output, the output of PWM comparator is connected in PWM signal generator's input. The utility model provides a can satisfy the low -cost AC -DC power management chip of all efficiency standards, will have extensive application, include: high performance constant current constant voltage battery charger, RCC linear power supply substitution, small household appliances power and LED illumination etc. Are used, based on the utility model discloses a system can reach higher efficiency, lower cost.

Description

A kind of effective iteration of low cost multistage digital filtering total current feedback controller chip
Technical field
The utility model belongs to chip technology field, is specifically related to the effective iteration of a kind of low cost multistage digital filtering total current feedback controller chip.
Background technology
In contemporary electronic systems, AC-DC conversion is an indispensable important component part.All systems by AC-powered all need the direct voltage or the electric current that by an AC-DC converter, High Level AC Voltage are transformed into low pressure, and then provide power supply for chip control system.Traditional AC-DC converter (linear power supply) first directly becomes linevoltage (line voltage) into low-voltage AC by public frequency power transformer, be transformed into required low-voltage dc power supply by LDO (Low-dropoutregulator) again, and then be supplied to chip control system.This traditional AC-DC converting system due to energy consumption high, efficiency low just progressively replace by the switch power supply system that controls based on PWM mode.At present, the AC-DC converter system realized based on SMPS (Switching Power Supply) has become the main flow in market, and be applied in the electronic system of nearly all Alternating Current Power Supply, and the kernel control chip in this type systematic, AC-DC power management chip also obtained significant progress at nearly 20 years and popularizes widely.
Because traditional linear power supply is very simple, only need little element, therefore cost is lower, makes it apply widely in small-power (below 10W) application.But along with the release of various green energy conservation standard, the characteristics such as the poor efficiency that linear power supply is intrinsic and high stand-by power consumption have fettered further developing of it.
Utility model content
The purpose of this utility model is to provide the effective iteration of a kind of low cost multistage digital filtering total current feedback controller chip, to solve the problem proposed in above-mentioned background technology.
For achieving the above object, the utility model provides following technical scheme: the effective iteration of a kind of low cost multistage digital filtering total current feedback controller chip, comprise clock generator, pwm signal generator, power switch driver, feedback signal sampler, PWM comparator and floating potential sample circuit, two inputs of described pwm signal generator connect the clock signal of output output and the output signal of PWM comparator output terminal of clock generator respectively, the input of described power switch driver is connected to the pwm signal of the output output of pwm signal generator, the drive singal that described power switch driver output exports is connected with drive singal processor, the feedback signal that input and the feedback signal processor output of described feedback signal sampler export is connected, the output of described feedback signal sampler is connected with the feedback signal of feedback signal processor input, the first input end of described PWM comparator is connected to low power supply potential, the output of described PWM comparator is connected to the input of pwm signal generator, described floating potential sample circuit comprises switch and holding capacitor, described switch is connected between the output of feedback signal processor and the second input of PWM comparator, described holding capacitor is connected to and couples between power supply high potential and the second input of PWM comparator.
Preferably, described feedback signal processor and drive singal processor composition signal processor, described signal processor is electrically connected at threshold voltage.
Technique effect of the present utility model and advantage: the effective iteration of this low cost multistage digital filtering total current feedback controller chip, ratio high with traditional chip, the utility model solves electric charge on current similar product electric capacity C2 rapidly by low pressure pin bleed off, thus the low-voltage circuit very easily arriving low pressure pin inner portions causes permanent damage, simultaneously, it is the negative-going pulse between CS pin and GND pin that the utility model also solves another potential risk in like product, likely cause controller chip inside that bolt-lock effect (Latch-up) occurs, and then cause control chip operation irregularity or inefficacy, the utility model is a low cost AC-DC power management chip that can meet all Energy Efficiency Standards, field will be had a wide range of applications, comprise: the application such as high-performance constant current constant cell charger, RCC/ linear power supply substitute, small household appliances power supply and LED illumination, higher efficiency can be reached, lower cost based on system of the present utility model.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
The utility model provides the effective iteration of a kind of low cost multistage digital filtering total current feedback controller chip as shown in Figure 1, comprise clock generator, pwm signal generator, power switch driver, feedback signal sampler, PWM comparator and floating potential sample circuit, two inputs of described pwm signal generator connect the clock signal of output output and the output signal of PWM comparator output terminal of clock generator respectively, the input of described power switch driver is connected to the pwm signal of the output output of pwm signal generator, the drive singal that described power switch driver output exports is connected with drive singal processor, the feedback signal that input and the feedback signal processor output of described feedback signal sampler export is connected, the output of described feedback signal sampler is connected with the feedback signal of feedback signal processor input, described feedback signal processor and drive singal processor composition signal processor, described signal processor is electrically connected at threshold voltage, the first input end of described PWM comparator is connected to low power supply potential, the output of described PWM comparator is connected to the input of pwm signal generator, described floating potential sample circuit comprises switch and holding capacitor, described switch is connected between the output of feedback signal processor and the second input of PWM comparator, described holding capacitor is connected to and couples between power supply high potential and the second input of PWM comparator.
Operation principle: effective superposition multi-stage digital technology that the utility model adopts also is switch power controller circuit and the switch power supply system of pin multiplexing, described switch power controller circuit comprises power switch driver, feedback signal sampler, PWM comparator and floating potential sample circuit, and described switch power controller circuit has: first end, couple power supply high potential, second end, both output switch drive singal, also receiving feedback signals; 3rd end, had both received a foreign current signal, also as the power supply electronegative potential of controller circuitry.The output of power switch driver provides described switching drive signal to described second end, and the input of feedback signal sampler receives described feedback signal from described second termination.Floating potential sample circuit makes the threshold voltage opposed power electronegative potential being input to PWM comparator keep constant in switching drive signal conduction period.The output of power switch driver is at least set to high-impedance state during feedback signal sampler receiving feedback signals, with enable feedback signal not disturbed sample.
The effective iteration of this low cost multistage digital filtering total current feedback controller chip, ratio high with traditional chip, the utility model solves electric charge on current similar product electric capacity C2 rapidly by low pressure pin bleed off, thus the low-voltage circuit very easily arriving low pressure pin inner portions causes permanent damage, simultaneously, it is the negative-going pulse between CS pin and GND pin that the utility model also solves another potential risk in like product, likely cause controller chip inside that bolt-lock effect (Latch-up) occurs, and then cause control chip operation irregularity or inefficacy, the utility model is a low cost AC-DC power management chip that can meet all Energy Efficiency Standards, field will be had a wide range of applications, comprise: high-performance constant current constant cell charger, RCC/ linear power supply substitutes, the application such as small household appliances power supply and LED illumination, higher efficiency can be reached based on system of the present utility model, lower cost.
Last it is noted that the foregoing is only preferred embodiment of the present utility model; be not limited to the utility model; although be described in detail the utility model with reference to previous embodiment; for a person skilled in the art; it still can be modified to the technical scheme described in foregoing embodiments; or equivalent replacement is carried out to wherein portion of techniques feature; all within spirit of the present utility model and principle; any amendment of doing, equivalent replacement, improvement etc., all should be included within protection range of the present utility model.

Claims (2)

1. the effective iteration of a low cost multistage digital filtering total current feedback controller chip, comprise clock generator, pwm signal generator, power switch driver, feedback signal sampler, PWM comparator and floating potential sample circuit, it is characterized in that: two inputs of described pwm signal generator connect the clock signal of output output and the output signal of PWM comparator output terminal of clock generator respectively, the input of described power switch driver is connected to the pwm signal of the output output of pwm signal generator, the drive singal that described power switch driver output exports is connected with drive singal processor, the feedback signal that input and the feedback signal processor output of described feedback signal sampler export is connected, the output of described feedback signal sampler is connected with the feedback signal of feedback signal processor input, the first input end of described PWM comparator is connected to low power supply potential, the output of described PWM comparator is connected to the input of pwm signal generator, described floating potential sample circuit comprises switch and holding capacitor, described switch is connected between the output of feedback signal processor and the second input of PWM comparator, described holding capacitor is connected to and couples between power supply high potential and the second input of PWM comparator.
2. the effective iteration of a kind of low cost according to claim 1 multistage digital filtering total current feedback controller chip, it is characterized in that: described feedback signal processor and drive singal processor composition signal processor, described signal processor is electrically connected at threshold voltage.
CN201521014255.XU 2015-12-09 2015-12-09 Full current feedback controller chip of low -cost effective multistage digital filtering of iteration Expired - Fee Related CN205160388U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108107264A (en) * 2016-11-24 2018-06-01 深圳市中兴微电子技术有限公司 The method and apparatus for measuring power consumption

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108107264A (en) * 2016-11-24 2018-06-01 深圳市中兴微电子技术有限公司 The method and apparatus for measuring power consumption

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
CB03 Change of inventor or designer information

Inventor after: Wei Pansheng

Inventor before: Han Xiufeng

COR Change of bibliographic data
TR01 Transfer of patent right

Effective date of registration: 20160817

Address after: 200021 1207A room, No. 1 Fuxing Road, Shanghai, Huangpu District

Patentee after: SHANGHAI MAGIC VALLEY IC TECHNOLOGY CO., LTD.

Address before: 201101 room 907, Rainbow Center, No. 7755 Zhong Chun Road, Shanghai, Minhang District

Patentee before: Shanghai Meixuan Industrial Co., Ltd.

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20160413

Termination date: 20161209

CF01 Termination of patent right due to non-payment of annual fee