CN205123575U - PFC (power factor correction) circuit - Google Patents

PFC (power factor correction) circuit Download PDF

Info

Publication number
CN205123575U
CN205123575U CN201520594018.9U CN201520594018U CN205123575U CN 205123575 U CN205123575 U CN 205123575U CN 201520594018 U CN201520594018 U CN 201520594018U CN 205123575 U CN205123575 U CN 205123575U
Authority
CN
China
Prior art keywords
circuit
signal
output
pfc
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn - After Issue
Application number
CN201520594018.9U
Other languages
Chinese (zh)
Inventor
罗世伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inventronics Hangzhou Co Ltd
Led One Hangzhou Co Ltd
Original Assignee
Led One Hangzhou Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Led One Hangzhou Co Ltd filed Critical Led One Hangzhou Co Ltd
Priority to CN201520594018.9U priority Critical patent/CN205123575U/en
Application granted granted Critical
Publication of CN205123575U publication Critical patent/CN205123575U/en
Withdrawn - After Issue legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00Climate change mitigation technologies for sector-wide applications
    • Y02P80/10Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Landscapes

  • Rectifiers (AREA)

Abstract

The utility model discloses a PFC (power factor correction) circuit through harmonic compensation sampling circuit filter capacitance's electric current, generates and exports harmonic signal vx, sampled signal through zero passage compensating circuit electric current of switch tube in with the PFC main circuit passes through the peak holding and generates and export zero passage compensation signal, the the first signal V1 stack that generates with the electric current of PFC control circuit sampling switch tube again be a comparison reference value, carry out the comparison with second signal V2 and harmonic signal vx's difference, perhaps compare later to second signal V2 with the stack of harmonic signal vx, generate the control signal of output switch pipe, because zero passage compensation signal's effect, the switch tube current signal that comparison circuit was inputed to feasible reality reduces, and then make near PFC (power factor correction) circuit input voltage's zero passage, the turn -on time in every cycle of switch tube shortens, near the arrival current value of zero passage PFC main circuit has been reduced, the EMI problem owing to current oscillation arouses has been restrained greatly.

Description

A kind of pfc circuit
Technical field
The utility model relates to switch power technology field, particularly relates to a kind of pfc circuit.
Background technology
Traditional pfc circuit comprises: PFC main circuit and PFC control circuit.In prior art, in order to the high frequency reducing Switching Power On Electric Net pollutes, usually understand parallel filtering electric capacity (in as Fig. 1 the first electric capacity C1 and the second electric capacity C2) at the input of rectifier bridge and/or output; But due to the existence of filter capacitor, containing harmonic component in input current, make the phase place of total input current Iin can advanced input voltage vin, and then make the reduction of PF value or THD rising; Prior art improves PF value to reduce THD, usually in the pfc circuit of Switching Power Supply, increases harmonic compensation circuit, as shown in Figure 1.
But, when harmonic compensation circuit function, near the zero passage of input voltage vin, easily make the input current Iin of pfc circuit vibrate, as shown in Figure 2, cause serious EMI (ElectromagneticInterference, electromagnetic interference) problem.
Utility model content
In view of this, the utility model provides a kind of pfc circuit, to solve the EMI problem existed in prior art.
A kind of pfc circuit, be applied to Switching Power Supply, described pfc circuit comprises: PFC main circuit, PFC control circuit, harmonic compensation circuit and zero passage compensating circuit; Wherein:
The input of described zero passage compensating circuit is connected with the switching tube in described PFC main circuit, and the sampled signal for the electric current by described switching tube is kept by peak value, generates and exports zero passage compensating signal;
Described harmonic compensation circuit, for the electric current of described filter capacitor of sampling, generates and output harmonic wave signal Vx;
Described PFC control circuit is connected with the input of the output of described switching tube, described harmonic compensation circuit, described PFC main circuit, the output of described zero passage compensating circuit and the output of described pfc circuit respectively, for:
The electric current of described switching tube of sampling generates the first signal V1, sample described pfc circuit input voltage generate the 3rd signal V3, and the output current of described pfc circuit of sampling or output voltage generate sampled signal, described sampled signal is compared with a reference signal, output feedback signal relatively, described feedback signal and the 3rd signal V3 carry out product calculation and generate secondary signal V2;
Receive described zero passage compensating signal and harmonic signal Vx, after described zero passage compensating signal is superposed with the first signal V1, base value is compared as one, compare with the difference of secondary signal V2 and harmonic signal Vx, or, described comparison after base value superposes with harmonic signal Vx is compared with secondary signal V2 again, generates according to comparative result and export the control signal of described switching tube.
Preferably, described PFC control circuit comprises: the first signal generating circuit, secondary signal produce circuit, comparison circuit, feedback signal generation circuit and turn-on control circuit; Wherein:
The first end of described first signal generating circuit is connected with described switching tube, described first end is also connected with the input of zero passage compensating circuit, second end is connected with an input of the output of described zero passage compensating circuit, the output of described harmonic compensation circuit and described comparison circuit, and the electric current for described switching tube of sampling generates and exports the first signal V1;
The input that described secondary signal produces circuit is connected with the input of described PFC main circuit, for described pfc circuit of sampling input voltage and generate the 3rd signal V3, the output that another input produces circuit with described feedback signal is connected, for receiving described feedback signal, 3rd signal V3 and described feedback signal are input in multiplier and carry out product calculation by described secondary signal generation circuit, secondary signal V2 is generated after product, the output of described multiplier produces the output of circuit as described secondary signal and is connected with another input of described comparison circuit,
The output of described comparison circuit is all connected with the control end of described switching tube with the output of described turn-on control circuit; Described comparison circuit be used for when described compare value that base value superposes with harmonic signal Vx be more than or equal to secondary signal V2 time, control the shutoff of described switching tube;
The input that described feedback signal produces circuit is connected with the output of described pfc circuit, for output current or the output voltage of described pfc circuit of sampling, compare with described reference signal, export described feedback signal according to comparative result, the amplitude size of described feedback signal embodies the difference size of the output current of described pfc circuit or the sampled signal of output voltage and described reference signal.
Preferably, described PFC control circuit comprises: the first signal generating circuit, secondary signal produce circuit, comparison circuit, feedback signal generation circuit, subtraction circuit and turn-on control circuit; Wherein:
The first end of described first signal generating circuit is connected with described switching tube, described first end is also connected with the input of zero passage compensating circuit, second end is connected with the output of described zero passage compensating circuit, tie point is connected with an input of described comparison circuit, and the electric current for described switching tube of sampling generates and exports the first signal V1;
The input that described secondary signal produces circuit is connected with the input of described PFC main circuit, for described pfc circuit of sampling input voltage and generate the 3rd signal V3, the output that another input produces circuit with described feedback signal is connected, for receiving described feedback signal, 3rd signal V3 and described feedback signal are input in multiplier and carry out product calculation by described secondary signal generation circuit, secondary signal V2 is generated after product, the output that the output of described multiplier produces circuit as described secondary signal is connected with the first input end of described subtraction circuit,
Second input of described subtraction circuit is connected with the output of described harmonic compensation circuit, for obtaining the difference of secondary signal V2 and harmonic signal Vx by subtraction and exporting;
Another input of described comparison circuit is connected with the output of described subtraction circuit, and the output of described comparison circuit is all connected with the control end of described switching tube with the output of described turn-on control circuit; Described comparison circuit be used for when described compare base value be more than or equal to the difference of secondary signal V2 and harmonic signal Vx time, control described switching tube shutoff;
The input that described feedback signal produces circuit is connected with the output of described pfc circuit, for output current or the output voltage of described pfc circuit of sampling, compare with described reference signal, export described feedback signal according to comparative result, the amplitude size of described feedback signal embodies the difference size of the output current of described pfc circuit or the sampled signal of output voltage and described reference signal.
Preferably, described zero passage compensating circuit comprises: diode, the 3rd resistance and the first electric capacity; Wherein:
The anode of described diode is the input of described zero passage compensating circuit;
The negative electrode of described diode is connected with one end of described 3rd resistance and described first electric capacity respectively;
The other end ground connection of described first electric capacity;
The other end of described 3rd resistance is the output of described zero passage compensating circuit.
Preferably, described harmonic compensation circuit comprises: the 3rd electric capacity, the 7th resistance and the 4th resistance; Wherein:
One end of described 3rd electric capacity is the input of described harmonic compensation circuit;
One end ground connection of described 7th resistance;
The other end of described 3rd electric capacity is connected with the other end of described 7th resistance, and tie point is connected with one end of described 4th resistance;
The other end of described 4th resistance is the output of described harmonic compensation circuit.
Preferably, described first signal generating circuit comprises: the first resistance and the second resistance, wherein:
One end ground connection of described first resistance, the other end is connected with described switching tube, the tie point of described first resistance and described switching tube is as the first end of the first signal generating circuit, described first end is connected with described second resistance one end, and the described second resistance other end is as the second end of the first signal generating circuit.
A kind of pfc circuit, be applied to Switching Power Supply, described pfc circuit comprises: PFC main circuit, PFC control circuit, harmonic compensation circuit and zero passage compensating circuit; Wherein:
The input of described zero passage compensating circuit is connected with the switching tube in described PFC main circuit, for the electric current of described switching tube of sampling, the sampled signal of the electric current of described switching tube is kept by peak value, generates and exports zero passage compensating signal;
Described harmonic compensation circuit, for the electric current of described filter capacitor of sampling, generates and output harmonic wave signal Vx;
Described PFC control circuit is connected with the output of described switching tube, described harmonic compensation circuit, the output of described zero passage compensating circuit and the output of described pfc circuit respectively, for:
Generate sawtooth signal and export as the first signal V1;
The sample output current of described pfc circuit or output voltage generates sampled signal, described sampled signal is compared with a reference signal, more afterwards output secondary signal V2;
Receive described zero passage compensating signal and harmonic signal Vx, after described zero passage compensating signal is superposed with the first signal V1, base value is compared as one, compare with the difference of secondary signal V2 and described harmonic signal Vx, or, described comparison after base value superposes with described harmonic signal Vx is compared with secondary signal V2 again, generates according to comparative result and export the control signal of described switching tube.
Preferably, described PFC control circuit comprises: the first signal generating circuit, secondary signal produce circuit, comparison circuit and turn-on control circuit; Wherein:
The output of described first signal generating circuit is connected with the output of the output of described zero passage compensating circuit and described harmonic compensation circuit, tie point is connected with an input of described comparison circuit, for generating described sawtooth signal and exporting as the first signal V1;
The output of described comparison circuit is all connected with the control end of described switching tube with the output of described turn-on control circuit; Described comparison circuit be used for when described compare value that base value superposes with harmonic signal Vx be more than or equal to secondary signal V2 time, control the shutoff of described switching tube;
The input that described secondary signal produces circuit is connected with the output of described pfc circuit, output is connected with another input of described comparison circuit, for output current or the output voltage of described pfc circuit of sampling, compare with described reference signal, export secondary signal V2 to described comparison circuit according to comparative result.
Preferably, described PFC control circuit comprises: the first signal generating circuit, comparison circuit, secondary signal produce circuit, subtraction circuit and turn-on control circuit; Wherein:
The output of described first signal generating circuit is connected with the output of described zero passage compensating circuit, and tie point is connected with an input of described comparison circuit, for generating described sawtooth signal and exporting as the first signal V1;
The output that first input end and the described secondary signal of described subtraction circuit produce circuit is connected, second input is connected with the output of described harmonic compensation circuit, output is connected with another input of described comparison circuit, for being obtained the difference of secondary signal V2 and harmonic signal Vx by subtraction;
The output of described comparison circuit is all connected with the control end of described switching tube with the output of described turn-on control circuit; Described comparison circuit be used for when described compare base value be more than or equal to the difference of secondary signal V2 and harmonic signal Vx time, control described switching tube shutoff;
The input that described secondary signal produces circuit is connected with the output of described pfc circuit, for output current or the output voltage of described pfc circuit of sampling, compares with described reference signal, exports secondary signal V2 according to comparative result.
Preferably, described first signal generating circuit comprises: constant-current source and the first electric capacity; Wherein:
The input of described constant-current source is connected with power supply;
One end of described first electric capacity is connected with the output of described constant-current source, and tie point is the output of described first signal generating circuit;
The other end ground connection of described first electric capacity.
Preferably, described zero passage compensating circuit comprises: sampling resistor, the first resistance, the second electric capacity and diode; Wherein:
One end ground connection of described sampling resistor, the other end is connected with the anode of described switching tube and described diode, and tie point is the input of described zero passage compensating circuit;
The negative electrode of described diode is connected with one end of one end of described first resistance and described second electric capacity;
The other end of described first resistance is the output of described zero passage compensating circuit;
The other end ground connection of described second electric capacity.
Preferably, described harmonic compensation circuit comprises: the 3rd electric capacity, the 3rd resistance and the 4th resistance; Wherein:
One end of described 3rd electric capacity is the input of described harmonic compensation circuit;
One end ground connection of described 3rd resistance;
The other end of described 3rd electric capacity is connected with the other end of described 3rd resistance, and tie point is connected with one end of described 4th resistance;
The other end of described 4th resistance is the output of described harmonic compensation circuit.
Preferably, described secondary signal generation circuit comprises: differential amplifier and compensating network; Wherein:
The inverting input of described differential amplifier is connected with the output of described pfc circuit;
The in-phase input end of described differential amplifier receives described reference signal;
Between the inverting input that described compensating network is connected to described differential amplifier and output;
The output of described differential amplifier is the output that described secondary signal produces circuit.
Pfc circuit disclosed in the utility model, by the electric current of filter capacitor described in harmonic compensation circuit sampling, generates and output harmonic wave signal Vx, kept by peak value by the sampled signal of zero passage compensating circuit by the electric current of PFC main circuit breaker in middle pipe, generate and export zero passage compensating signal, the first signal V1 that the electric current of sampling described switching tube again with PFC control circuit generates is superposed to one and compares base value, compare with the difference of secondary signal V2 and harmonic signal Vx, or compare in secondary signal V2 after superposing with harmonic signal Vx, generate and export the control signal of described switching tube, because the current sampling signal after peak value keeps by zero passage compensating circuit is input in PFC control circuit, the actual switching tube current signal being input to comparison circuit is reduced, and then make near the zero passage of described pfc circuit input voltage, the ON time in each cycle of described switching tube shortens, reduce the input current value of described PFC main circuit near zero passage, greatly inhibit the EMI problem because current oscillation causes.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is pfc circuit structural representation disclosed in prior art;
Fig. 2 is waveform input signal figure disclosed in prior art;
Fig. 3 is pfc circuit structural representation disclosed in the utility model embodiment;
Fig. 4 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Fig. 5 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Fig. 6 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Fig. 7 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Fig. 8 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Fig. 9 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Figure 10 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Figure 11 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Figure 12 is another embodiment of the utility model another pfc circuit structural representation disclosed;
Figure 13 is the part-structure schematic diagram of another embodiment of the utility model another pfc circuit disclosed.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
The utility model provides a kind of pfc circuit, is applied to Switching Power Supply, to solve the EMI problem existed in prior art.
Concrete, as shown in Figure 3, described pfc circuit comprises: PFC main circuit 101, PFC control circuit 102, harmonic compensation circuit 103 and zero passage compensating circuit 104; Wherein:
The input of zero passage compensating circuit 104 is connected with the switching tube in PFC main circuit 101, and output is connected with PFC control circuit 102;
PFC control circuit 102 is connected with the output of the output of described switching tube, harmonic compensation circuit 103, the input of PFC main circuit 101, the output of zero passage compensating circuit 104 and described pfc circuit respectively.
Harmonic compensation circuit 103 can be in parallel with the filter capacitor in described pfc circuit, can be also the resistance being series between described filter capacitor and ground, and the electric current of described filter capacitor of can sampling, its concrete annexation is not specifically limited herein.Fig. 3 is described so that harmonic compensation circuit 103 is in parallel with the filter capacitor in described pfc circuit.
Concrete operation principle is:
Zero passage compensating circuit 104 is sampled the electric current of described switching tube, the sampled signal of the electric current of described switching tube is kept by peak value, generates and export zero passage compensating signal;
Harmonic compensation circuit 103 is sampled the electric current of described filter capacitor, generates and output harmonic wave signal Vx;
The sample electric current of described switching tube of PFC control circuit 102 generates the first signal V1, sample described pfc circuit input voltage generate the 3rd signal V3, and the output current of described pfc circuit of sampling or output voltage generate sampled signal, described sampled signal is compared with a reference signal, output feedback signal relatively, described feedback signal and the 3rd signal V3 carry out product calculation and generate secondary signal V2;
PFC control circuit 102 receives described zero passage compensating signal and harmonic signal Vx, after described zero passage compensating signal is superposed with the first signal V1, base value is compared as one, compare with the difference of secondary signal V2 and harmonic signal Vx, or, described comparison after base value superposes with harmonic signal Vx is compared with secondary signal V2 again, generates according to comparative result and export the control signal of described switching tube.
Described pfc circuit disclosed in the present embodiment, the electric current of described filter capacitor of being sampled by harmonic compensation circuit 103, is generated and output harmonic wave signal Vx, kept by peak value by the sampled signal of zero passage compensating circuit 104 by the electric current of PFC main circuit 101 breaker in middle pipe, generate and export zero passage compensating signal, the first signal V1 that the electric current of sampling described switching tube with PFC control circuit 102 again generates is superposed to one and compares base value, compare with the difference of the 2nd V2 signal and harmonic signal Vx, or compare in secondary signal V2 after superposing with harmonic signal Vx, generate and export the control signal of described switching tube, because the current sampling signal after peak value keeps by zero passage compensating circuit is input in PFC control circuit, the actual switching tube current signal being input to comparison circuit is reduced, and then make near the zero passage of described pfc circuit input voltage, the ON time in each cycle of described switching tube shortens, reduce the input current value of PFC main circuit 101 near zero passage, greatly inhibit the EMI problem because current oscillation causes.
The utility model still another embodiment provides another pfc circuit, and as shown in Figure 3, described pfc circuit comprises: PFC main circuit 101, PFC control circuit 102, harmonic compensation circuit 103 and zero passage compensating circuit 104; Wherein:
The input of zero passage compensating circuit 104 is connected with the switching tube in PFC main circuit 101, and output is connected with PFC control circuit 102;
PFC control circuit 102 is connected with the output of the output of described switching tube, harmonic compensation circuit 103, the input of PFC main circuit 101, the output of zero passage compensating circuit 104 and described pfc circuit respectively.
Harmonic compensation circuit 103 can be in parallel with the filter capacitor in described pfc circuit, can be also the resistance being series between described filter capacitor and ground, and the electric current of described filter capacitor of can sampling, its concrete annexation is not specifically limited herein.Fig. 3 is described so that harmonic compensation circuit 103 is in parallel with the filter capacitor in described pfc circuit.
Preferably, as shown in Figure 4, PFC control circuit 102 comprises: the first signal generating circuit 201, secondary signal produce circuit 202, comparison circuit 203, feedback signal generation circuit 205 and turn-on control circuit 204; Wherein:
The first end of the first signal generating circuit 201 is connected with described switching tube, described first end is also connected with the input of zero passage compensating circuit, and the second end is connected with an input of the output of zero passage compensating circuit 104, the output of harmonic compensation circuit 103 and comparison circuit 203;
The input that secondary signal produces circuit 202 is connected with the input of PFC main circuit 101, and the output that another input produces circuit 205 with feedback signal is connected, and output is connected with another input of comparison circuit 203;
The output of comparison circuit 203 is all connected with the control end of described switching tube with the output of turn-on control circuit 204;
The input that feedback signal produces circuit 205 is connected with the output of described pfc circuit.
Concrete operation principle is:
First signal generating circuit 201 generates for the electric current of described switching tube of sampling and exports the first signal V1.
Secondary signal produces circuit 202 for the input voltage of described pfc circuit of sampling and generates the 3rd signal V3, receives described feedback signal, and the 3rd signal V3 and described feedback signal is input in multiplier and carries out product calculation, generate secondary signal V2 after product.
Comparison circuit 203 for when described compare value that base value superposes with harmonic signal Vx be more than or equal to secondary signal V2 time, control described switching tube and turn off.
Feedback signal produces circuit 205 for the output current of described pfc circuit of sampling or output voltage, compare with described reference signal, export described feedback signal according to comparative result, the amplitude size of described feedback signal embodies the difference size of the output current of described pfc circuit or the sampled signal of output voltage and described reference signal.
Or as shown in Figure 5, PFC control circuit 102 comprises: the first signal generating circuit 201, secondary signal produce circuit 202, comparison circuit 203, feedback signal generation circuit 205, subtraction circuit and turn-on control circuit 204; Wherein:
The first end of the first signal generating circuit 201 is connected with described switching tube, and described first end is also connected with the input of zero passage compensating circuit, and the second end is connected with the output of zero passage compensating circuit 104, and tie point is connected with an input of comparison circuit 203;
The input that secondary signal produces circuit 202 is connected with the input of PFC main circuit 101, and the output that another input produces circuit 205 with feedback signal is connected, and output is connected with the first input end of described subtraction circuit;
Another input of comparison circuit 203 is connected with the output of described subtraction circuit, and the second input of described subtraction circuit is connected with the output of harmonic compensation circuit 103;
The output of comparison circuit 203 is all connected with the control end of described switching tube with the output of turn-on control circuit 204;
The input that feedback signal produces circuit 205 is connected with the output of described pfc circuit.
Concrete operation principle is:
First signal generating circuit 201 generates for the electric current of described switching tube of sampling and exports the first signal V1;
Secondary signal produces circuit 202 for the input voltage of described pfc circuit of sampling and generates the 3rd signal V3, receives described feedback signal, and the 3rd signal V3 and described feedback signal is input in multiplier and carries out product calculation, generate secondary signal V2 after product;
Described subtraction circuit is used for obtaining the difference of secondary signal V2 and harmonic signal Vx by subtraction and exporting;
Comparison circuit 203 for when described compare base value be more than or equal to the difference of secondary signal V2 and harmonic signal Vx time, control described switching tube turn off;
Feedback signal produces circuit 205 for the output current of described pfc circuit of sampling or output voltage, compare with described reference signal, export described feedback signal according to comparative result, the amplitude size of described feedback signal embodies the difference size of the output current of described pfc circuit or the sampled signal of output voltage and described reference signal.
Concrete, as shown in Figure 6 and Figure 7, the first signal generating circuit 201 comprises: the first resistance R1 and the second resistance R2; Wherein:
One end ground connection of described first resistance R1, the other end is connected with described switching tube, one end that first resistance R1 connects with described switching tube is as the first end of the first signal generating circuit 201, described first end is connected with second resistance R2 one end, and the second resistance R2 other end is as the second end of the first signal generating circuit 201.
Preferably, as shown in Figure 6 and Figure 7, zero passage compensating circuit 104 comprises: diode D, the 3rd resistance R3 and the first electric capacity C1; Wherein:
The anode of diode D is the input of zero passage compensating circuit 104;
The negative electrode of diode D is connected with one end of the 3rd resistance R3 and the first electric capacity respectively;
The other end ground connection of the first electric capacity C1;
The other end of the 3rd resistance R3 is the output of zero passage compensating circuit 104.
Concrete, as shown in Figure 6 and Figure 7, secondary signal produces circuit 202 and comprises: the 5th resistance R5, the 6th resistance R6 and multiplier; Wherein:
One end of 5th resistance R5 is connected with the input of PFC main circuit 101;
One end ground connection of the 6th resistance R6;
The other end of the 5th resistance R5 is connected with the other end of the 6th resistance R6, and tie point is connected with an input of described multiplier;
The output that another input and the feedback signal of described multiplier produce circuit 205 is connected, and output is the output that secondary signal produces circuit 202.
Preferably, as shown in Figure 6 and Figure 7, harmonic compensation circuit 103 comprises: the 3rd electric capacity C3, the 7th resistance R7 and the 4th resistance R4; Wherein:
One end of 3rd electric capacity C3 is the input of harmonic compensation circuit 103;
One end ground connection of the 7th resistance R7;
The other end of the 3rd electric capacity C3 is connected with the other end of the 7th resistance R7, and tie point is connected with one end of the 4th resistance R4;
The other end of the 4th resistance R4 is the output of harmonic compensation circuit 103.
Comparison circuit is comparator; The inverting input of described comparator is an input of comparison circuit 203, is connected with the output of zero passage compensating circuit 104; The in-phase input end of described comparator is another input of comparison circuit 203.
The first end of the first signal generating circuit 201 shown in Fig. 6 and Fig. 7, be connected with the tie point of described switching tube with the input of zero passage compensating circuit 104, for the electric current of described switching tube of sampling, voltage signal on the first resistance R1 connected with the switching tube in PFC main circuit 101 can embody the size of current of described switching tube, and the first signal V1 that corresponding first signal generating circuit 201 exports is the sampled signal of the electric current of described switching tube.
The secondary signal V2 that secondary signal generation circuit 202 exports is the product of input voltage sampled signal Vi and feedback signal Vf.In concrete practical application, feedback signal Vf is after output current or output voltage signal compare with reference signal, according to the error amplification signal that comparative result exports.
In harmonic compensation circuit 103, through being connected in parallel on the 3rd electric capacity C3 and the 7th resistance R7 of described pfc circuit input, through the 4th resistance R4, the current signal on described filter capacitor is sampled out again, by sampling, the harmonic signal Vx obtained superposes (as shown in Figure 6) with described zero passage compensating signal and the first signal V1, inputs to the input of comparison circuit 203; Or as shown in Figure 7, harmonic signal Vx and secondary signal V2 does difference, difference (V2-Vx) is input to another input of comparison circuit 203.
Zero passage compensating circuit 101 is by the peak holding circuit of diode D and the first electric capacity C1, obtain the peak signal of the sampled signal of electric current, and by the second resistance R2 in the 3rd resistance R3 and the first signal generating circuit 201, the described zero passage compensating signal exported by zero passage compensating circuit 104 superposes with the first signal V1, is input in comparison circuit 203 after superposition.First signal V1 is the sampled signal of the electric current of described switching tube, and the output signal of zero passage compensating circuit 104 is voltage signal, and the signal obtained after superposing with the first signal V1 is the current sampling signal that peak value changes according to zero passage compensating signal.
In concrete practical application, Fig. 6 with Figure 7 shows that for two kinds of different specific implementation forms of the input signal of comparison circuit 203, can adopt two kinds of forms depending on concrete applied environment, be not specifically limited herein.
The utility model still another embodiment provides another pfc circuit, and as shown in Figure 8, described pfc circuit comprises: PFC main circuit 101, PFC control circuit 102, harmonic compensation circuit 103 and zero passage compensating circuit 104; Wherein:
The input of zero passage compensating circuit 104 is connected with the switching tube in PFC main circuit 101;
PFC control circuit 102 is connected with the output of the output of described switching tube, harmonic compensation circuit 103, the output of zero passage compensating circuit 104 and described pfc circuit respectively.
Harmonic compensation circuit 103 can be in parallel with the filter capacitor in described pfc circuit, can be also the resistance being series between described filter capacitor and ground, and the electric current of described filter capacitor of can sampling, its concrete annexation is not specifically limited herein.Fig. 8 is described so that harmonic compensation circuit 103 is in parallel with the filter capacitor in described pfc circuit.
Concrete operation principle is:
Zero passage compensating circuit 104 is sampled the electric current of described switching tube, the sampled signal of the electric current of described switching tube is kept by peak value, generates and export zero passage compensating signal;
Harmonic compensation circuit 103 is sampled the electric current of described filter capacitor, generates and output harmonic wave signal Vx;
PFC control circuit 102 generates sawtooth signal, and exports as the first signal V1; The sample output current of described pfc circuit or output voltage generates sampled signal, described sampled signal is compared with a reference signal, more afterwards output secondary signal V2;
PFC control circuit 102 receives described zero passage compensating signal and harmonic signal Vx, after described zero passage compensating signal is superposed with the first signal V1, base value is compared as one, compare with the difference of secondary signal V2 and harmonic signal Vx, or described comparison after base value superposes with harmonic signal Vx is compared with secondary signal V2 again, generates according to comparative result and export the control signal of described switching tube.
Described pfc circuit disclosed in the present embodiment, the electric current of described filter capacitor of being sampled by harmonic compensation circuit 103, is generated and output harmonic wave signal Vx, kept by peak value by the sampled signal of zero passage compensating circuit 104 by the electric current of PFC main circuit 101 breaker in middle pipe, generate and export zero passage compensating signal, the first signal V1 that the electric current of sampling described switching tube with PFC control circuit 102 again generates is superposed to one and compares base value, compare with the difference of secondary signal V2 and harmonic signal Vx, or compare in secondary signal V2 after superposing with harmonic signal Vx, generate and export the control signal of described switching tube, because the current sampling signal after peak value keeps by zero passage compensating circuit is input in PFC control circuit, the actual switching tube current signal being input to comparison circuit is reduced, and then make near the zero passage of described pfc circuit input voltage, the ON time in each cycle of described switching tube shortens, reduce the input current value of PFC main circuit 101 near zero passage, greatly inhibit the EMI problem because current oscillation causes.
Preferably, as shown in Figure 9, PFC control circuit 102 comprises: the first signal generating circuit 201, comparison circuit 203, secondary signal produce circuit 205 and turn-on control circuit 204; Wherein:
The output of the first signal generating circuit 201 is connected with the output of the output of zero passage compensating circuit 104, harmonic compensation circuit 103 and an input of comparison circuit 203;
The output of comparison circuit 203 is all connected with the control end of described switching tube with the output of turn-on control circuit 205;
The input that secondary signal produces circuit 205 is connected with the output of described pfc circuit, and output is connected with another input of comparison circuit 203.
Concrete operation principle is:
First signal generating circuit 201 generates described sawtooth signal, and exports as the first signal V1;
Comparison circuit 203 for when described compare value that base value superposes with harmonic signal Vx be more than or equal to secondary signal V2 time, control described switching tube and turn off;
Secondary signal produces circuit 205 and to sample the output current of described pfc circuit or output voltage, compares, export secondary signal V2 to comparison circuit 203 according to comparative result with described reference signal.
Or as shown in Figure 10, PFC control circuit 102 comprises: the first signal generating circuit 201, comparison circuit 203, secondary signal produce circuit 205, subtraction circuit and turn-on control circuit 204; Wherein:
The output of the first signal generating circuit 201 is connected with the output of described zero passage compensating circuit, and tie point is connected with an input of comparison circuit 203;
The output that first input end and the secondary signal of described subtraction circuit produce circuit 205 is connected, and the second input is connected with the output of harmonic compensation circuit 103, and output is connected with another input of comparison circuit 203;
The output of comparison circuit 203 is all connected with the control end of described switching tube with the output of turn-on control circuit 205;
The input that secondary signal produces circuit 205 is connected with the output of described pfc circuit.
Concrete operation principle is:
First signal generating circuit 201 generates described sawtooth signal and exports as the first signal V1;
Described subtraction circuit calculates the difference of secondary signal V2 and harmonic signal Vx by subtraction;
Comparison circuit 203 for when described compare base value be more than or equal to the difference of secondary signal V2 and harmonic signal Vx time, control described switching tube turn off;
Secondary signal produces circuit 205 and to sample the output current of described pfc circuit or output voltage, compares, export secondary signal V2 according to comparative result with described reference signal.
Preferably, as is illustrated by figs. 11 and 12, the first signal generating circuit 201 comprises: constant-current source Id and the first electric capacity C1; Wherein:
The input of constant-current source Id is connected with power supply;
One end of first electric capacity C1 is connected with the output of constant-current source Id, and tie point is the output of the first signal generating circuit 201;
The other end ground connection of the first electric capacity C1.
Preferably, as is illustrated by figs. 11 and 12, zero passage compensating circuit 104 comprises: sampling resistor Rs, the first resistance R1, the second electric capacity C2 and diode D; Wherein:
One end ground connection of sampling resistor Rs, the other end is connected with the anode of described switching tube and diode D, and tie point is the input of zero passage compensating circuit 104;
The negative electrode of diode D is connected with one end of one end of the first resistance R1 and the second electric capacity C2;
The other end of the first resistance R1 is the output of zero passage compensating circuit 104;
The other end ground connection of the second electric capacity C2.
Preferably, as is illustrated by figs. 11 and 12, harmonic compensation circuit 103 comprises: the 3rd electric capacity C3, the 3rd resistance R3 and the 4th resistance R4; Wherein:
One end of 3rd electric capacity C3 is the input of harmonic compensation circuit 103;
One end ground connection of the 3rd resistance R3;
The other end of the 3rd electric capacity C3 is connected with the other end of the 3rd resistance R3, and tie point is connected with one end of the 4th resistance R4;
The other end of the 4th resistance R4 is the output of harmonic compensation circuit 103.
The first signal V1 that the first signal generating circuit 201 as shown in figure 11 exports is the sawtooth signal of fixed slope.Secondary signal V2 is after output current or output voltage signal compare with reference signal, according to the error amplification signal that comparative result exports.
First produces in circuit 201, and produce the first signal V1 by constant-current source Id and the first electric capacity C1, concrete, constant-current source Id is that the first electric capacity C1 charges, and the voltage signal on the first electric capacity C1 is sawtooth signal.The described zero passage compensating signal that zero passage compensating circuit 104 exports is current signal, and the signal obtained after superposing with the first signal V1 is the signal that sawtooth waveforms slope changes according to the described zero passage compensating signal that zero passage compensating circuit 104 exports.
Harmonic compensation circuit 103 is through being connected in parallel on the 3rd electric capacity C3 and the 3rd resistance R3 of input, 3rd resistance R3 obtains the current signal harmonic signal Vx of described filter capacitor, by the 4th resistance R4, this signal (being voltage signal originally) is converted to current signal, be injected in the first signal generating circuit 201, be that the first electric capacity C1 charges together with current source Id, the voltage signal on the first electric capacity C1 obtained is input in comparison circuit 203; Or as shown in figure 12, the current harmonics signal Vx of described filter capacitor and secondary signal V2 does difference, difference (V2-Vx) is input to another input of comparison circuit 203.
Zero passage compensating circuit 104 obtains the sampled signal of the electric current of described switching tube by sampling resistor Rs, again by the peak holding circuit of diode D and the second electric capacity C2, obtain the peak signal of the sampled signal of electric current, and by the first resistance R1, the output signal of zero passage compensating circuit 104 is carried out superposing with described first signal V1 be input in comparison circuit 203.
In concrete practical application, Figure 11 with Figure 12 shows that for two kinds of different specific implementation forms of the input signal of comparison circuit 203, can adopt two kinds of forms depending on concrete applied environment, be not specifically limited herein.
Preferably, as shown in figure 13, secondary signal generation circuit 205 comprises: differential amplifier and compensating network; Wherein:
The inverting input of described differential amplifier is connected with the output of described pfc circuit, the output current of described pfc circuit of sampling or output voltage Io/Vo;
The in-phase input end of described differential amplifier receives reference signal Iref/Vref;
Between the inverting input that described compensating network is connected to described differential amplifier and output, export secondary signal Vf;
The output of described differential amplifier is the output that secondary signal produces circuit 205.
Figure 13 shows that secondary signal produces a kind of specific implementation form of circuit 205, be not specifically limited herein, can select according to its embody rule environment.
In concrete practical application, as Fig. 6,7,11 and 12 arbitrary shown in, comparison circuit 203 is comparator; The inverting input of described comparator is an input of comparison circuit 203, is connected with the output of zero passage compensating circuit 104; The in-phase input end of described comparator is another input of comparison circuit 203.
Fig. 6,7,11 and 12 arbitrary shown in, the object of described comparator is: when the signal that described in-phase input end receives be less than described inverting input receive signal time, control described switching tube turn off; Described switching tube conducting is controlled again by the predetermined time of turn-on control circuit 204 after described switching tube turns off.
Harmonic compensation circuit 103 for the electric current of described filter capacitor of sampling, its concrete way of realization can arbitrary see Fig. 5 to Figure 10 shown in, be not specifically limited, depending on its embody rule environment herein.
In this specification, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the utility model.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein when not departing from spirit or scope of the present utility model, can realize in other embodiments.Therefore, the utility model can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (13)

1. a pfc circuit, is characterized in that, is applied to Switching Power Supply, and described pfc circuit comprises: PFC main circuit, PFC control circuit, harmonic compensation circuit and zero passage compensating circuit; Wherein:
The input of described zero passage compensating circuit is connected with the switching tube in described PFC main circuit, and the sampled signal for the electric current by described switching tube is kept by peak value, generates and exports zero passage compensating signal;
Described harmonic compensation circuit is used for the electric current of sampling filter electric capacity, generates and output harmonic wave signal Vx;
Described PFC control circuit is connected with the input of the output of described switching tube, described harmonic compensation circuit, described PFC main circuit, the output of described zero passage compensating circuit and the output of described pfc circuit respectively, for:
The electric current of described switching tube of sampling generates the first signal V1, sample described pfc circuit input voltage generate the 3rd signal V3, and the output current of described pfc circuit of sampling or output voltage generate sampled signal, described sampled signal is compared with a reference signal, output feedback signal relatively, described feedback signal and the 3rd signal V3 carry out product calculation and generate secondary signal V2;
Receive described zero passage compensating signal and harmonic signal Vx, after described zero passage compensating signal is superposed with the first signal V1, base value is compared as one, compare with the difference of secondary signal V2 and harmonic signal Vx, or, described comparison after base value superposes with harmonic signal Vx is compared with secondary signal V2 again, generates according to comparative result and export the control signal of described switching tube.
2. pfc circuit according to claim 1, is characterized in that, described PFC control circuit comprises: the first signal generating circuit, secondary signal produce circuit, comparison circuit, feedback signal generation circuit and turn-on control circuit; Wherein:
The first end of described first signal generating circuit is connected with described switching tube, described first end is also connected with the input of zero passage compensating circuit, second end is connected with an input of the output of described zero passage compensating circuit, the output of described harmonic compensation circuit and described comparison circuit, and the electric current for described switching tube of sampling generates and exports the first signal V1;
The input that described secondary signal produces circuit is connected with the input of described PFC main circuit, for described pfc circuit of sampling input voltage and generate the 3rd signal V3, the output that another input produces circuit with described feedback signal is connected, for receiving described feedback signal, 3rd signal V3 and described feedback signal are input in multiplier and carry out product calculation by described secondary signal generation circuit, secondary signal V2 is generated after product, the output of described multiplier produces the output of circuit as described secondary signal and is connected with another input of described comparison circuit,
The output of described comparison circuit is all connected with the control end of described switching tube with the output of described turn-on control circuit; Described comparison circuit be used for when described compare value that base value superposes with harmonic signal Vx be more than or equal to secondary signal V2 time, control the shutoff of described switching tube;
The input that described feedback signal produces circuit is connected with the output of described pfc circuit, for output current or the output voltage of described pfc circuit of sampling, compare with described reference signal, export described feedback signal according to comparative result, the amplitude size of described feedback signal embodies the difference size of the output current of described pfc circuit or the sampled signal of output voltage and described reference signal.
3. pfc circuit according to claim 1, is characterized in that, described PFC control circuit comprises: the first signal generating circuit, secondary signal produce circuit, comparison circuit, feedback signal generation circuit, subtraction circuit and turn-on control circuit; Wherein:
The first end of described first signal generating circuit is connected with described switching tube, described first end is also connected with the input of zero passage compensating circuit, second end is connected with the output of described zero passage compensating circuit, tie point is connected with an input of described comparison circuit, and the electric current for described switching tube of sampling generates and exports the first signal V1;
The input that described secondary signal produces circuit is connected with the input of described PFC main circuit, for described pfc circuit of sampling input voltage and generate the 3rd signal V3, the output that another input produces circuit with described feedback signal is connected, for receiving described feedback signal, 3rd signal V3 and described feedback signal are input in multiplier and carry out product calculation by described secondary signal generation circuit, secondary signal V2 is generated after product, the output that the output of described multiplier produces circuit as described secondary signal is connected with the first input end of described subtraction circuit,
Second input of described subtraction circuit is connected with the output of described harmonic compensation circuit, for obtaining the difference of secondary signal V2 and harmonic signal Vx by subtraction and exporting;
Another input of described comparison circuit is connected with the output of described subtraction circuit, and the output of described comparison circuit is all connected with the control end of described switching tube with the output of described turn-on control circuit; Described comparison circuit be used for when described compare base value be more than or equal to the difference of secondary signal V2 and harmonic signal Vx time, control described switching tube shutoff;
The input that described feedback signal produces circuit is connected with the output of described pfc circuit, for output current or the output voltage of described pfc circuit of sampling, compare with described reference signal, export described feedback signal according to comparative result, the amplitude size of described feedback signal embodies the difference size of the output current of described pfc circuit or the sampled signal of output voltage and described reference signal.
4. pfc circuit according to claim 1, is characterized in that, described zero passage compensating circuit comprises: diode, the 3rd resistance and the first electric capacity; Wherein:
The anode of described diode is the input of described zero passage compensating circuit;
The negative electrode of described diode is connected with one end of described 3rd resistance and described first electric capacity respectively;
The other end ground connection of described first electric capacity;
The other end of described 3rd resistance is the output of described zero passage compensating circuit.
5. pfc circuit according to claim 1, is characterized in that, described harmonic compensation circuit comprises: the 3rd electric capacity, the 7th resistance and the 4th resistance; Wherein:
One end of described 3rd electric capacity is the input of described harmonic compensation circuit;
One end ground connection of described 7th resistance;
The other end of described 3rd electric capacity is connected with the other end of described 7th resistance, and tie point is connected with one end of described 4th resistance;
The other end of described 4th resistance is the output of described harmonic compensation circuit.
6. the pfc circuit according to Claims 2 or 3, is characterized in that, described first signal generating circuit comprises: the first resistance and the second resistance, wherein:
One end ground connection of described first resistance, the other end is connected with described switching tube, the tie point of described first resistance and described switching tube is as the first end of the first signal generating circuit, described first end is connected with described second resistance one end, and the described second resistance other end is as the second end of the first signal generating circuit.
7. a pfc circuit, is characterized in that, is applied to Switching Power Supply, and described pfc circuit comprises: PFC main circuit, PFC control circuit, harmonic compensation circuit and zero passage compensating circuit; Wherein:
The input of described zero passage compensating circuit is connected with the switching tube in described PFC main circuit, for the electric current of described switching tube of sampling, the sampled signal of the electric current of described switching tube is kept by peak value, generates and exports zero passage compensating signal;
Described harmonic compensation circuit is used for the electric current of sampling filter electric capacity, generates and output harmonic wave signal Vx;
Described PFC control circuit is connected with the output of described switching tube, described harmonic compensation circuit, the output of described zero passage compensating circuit and the output of described pfc circuit respectively, for:
Generate sawtooth signal and export as the first signal V1;
The sample output current of described pfc circuit or output voltage generates sampled signal, described sampled signal is compared with a reference signal, more afterwards output secondary signal V2;
Receive described zero passage compensating signal and harmonic signal Vx, after described zero passage compensating signal is superposed with the first signal V1, base value is compared as one, compare with the difference of secondary signal V2 and described harmonic signal Vx, or, described comparison after base value superposes with described harmonic signal Vx is compared with secondary signal V2 again, generates according to comparative result and export the control signal of described switching tube.
8. pfc circuit according to claim 7, is characterized in that, described PFC control circuit comprises: the first signal generating circuit, secondary signal produce circuit, comparison circuit and turn-on control circuit; Wherein:
The output of described first signal generating circuit is connected with the output of the output of described zero passage compensating circuit, described harmonic compensation circuit and an input of described comparison circuit, for generating described sawtooth signal and exporting as the first signal V1;
The output of described comparison circuit is all connected with the control end of described switching tube with the output of described turn-on control circuit; Described comparison circuit be used for when described compare value that base value superposes with harmonic signal Vx be more than or equal to secondary signal V2 time, control the shutoff of described switching tube;
The input that described secondary signal produces circuit is connected with the output of described pfc circuit, output is connected with another input of described comparison circuit, for output current or the output voltage of described pfc circuit of sampling, compare with described reference signal, export secondary signal V2 to described comparison circuit according to comparative result.
9. pfc circuit according to claim 7, is characterized in that, described PFC control circuit comprises: the first signal generating circuit, comparison circuit, secondary signal produce circuit, subtraction circuit and turn-on control circuit; Wherein:
The output of described first signal generating circuit is connected with the output of described zero passage compensating circuit, and tie point is connected with an input of described comparison circuit, for generating described sawtooth signal and exporting as the first signal V1;
The output that first input end and the described secondary signal of described subtraction circuit produce circuit is connected, second input is connected with the output of described harmonic compensation circuit, output is connected with another input of described comparison circuit, for being obtained the difference of secondary signal V2 and harmonic signal Vx by subtraction;
The output of described comparison circuit is all connected with the control end of described switching tube with the output of described turn-on control circuit; Described comparison circuit be used for when described compare base value be more than or equal to the difference of secondary signal V2 and harmonic signal Vx time, control described switching tube shutoff;
The input that described secondary signal produces circuit is connected with the output of described pfc circuit, for output current or the output voltage of described pfc circuit of sampling, compares with described reference signal, exports secondary signal V2 according to comparative result.
10. pfc circuit according to claim 8 or claim 9, it is characterized in that, described first signal generating circuit comprises: constant-current source and the first electric capacity; Wherein:
The input of described constant-current source is connected with power supply;
One end of described first electric capacity is connected with the output of described constant-current source, and tie point is the output of described first signal generating circuit;
The other end ground connection of described first electric capacity.
11. pfc circuits according to claim 7, is characterized in that, described zero passage compensating circuit comprises: sampling resistor, the first resistance, the second electric capacity and diode; Wherein:
One end ground connection of described sampling resistor, the other end is connected with the anode of described switching tube and described diode, and tie point is the input of described zero passage compensating circuit;
The negative electrode of described diode is connected with one end of one end of described first resistance and described second electric capacity;
The other end of described first resistance is the output of described zero passage compensating circuit;
The other end ground connection of described second electric capacity.
12. pfc circuits according to claim 7, is characterized in that, described harmonic compensation circuit comprises: the 3rd electric capacity, the 3rd resistance and the 4th resistance; Wherein:
One end of described 3rd electric capacity is the input of described harmonic compensation circuit;
One end ground connection of described 3rd resistance;
The other end of described 3rd electric capacity is connected with the other end of described 3rd resistance, and tie point is connected with one end of described 4th resistance;
The other end of described 4th resistance is the output of described harmonic compensation circuit.
13. pfc circuits according to claim 8 or claim 9, is characterized in that, described secondary signal produces circuit and comprises: differential amplifier and compensating network; Wherein:
The inverting input of described differential amplifier is connected with the output of described pfc circuit;
The in-phase input end of described differential amplifier receives described reference signal;
Between the inverting input that described compensating network is connected to described differential amplifier and output;
The output of described differential amplifier is the output that described secondary signal produces circuit.
CN201520594018.9U 2015-08-07 2015-08-07 PFC (power factor correction) circuit Withdrawn - After Issue CN205123575U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201520594018.9U CN205123575U (en) 2015-08-07 2015-08-07 PFC (power factor correction) circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201520594018.9U CN205123575U (en) 2015-08-07 2015-08-07 PFC (power factor correction) circuit

Publications (1)

Publication Number Publication Date
CN205123575U true CN205123575U (en) 2016-03-30

Family

ID=55579146

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201520594018.9U Withdrawn - After Issue CN205123575U (en) 2015-08-07 2015-08-07 PFC (power factor correction) circuit

Country Status (1)

Country Link
CN (1) CN205123575U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104993691A (en) * 2015-08-07 2015-10-21 英飞特电子(杭州)股份有限公司 PFC circuit
CN110492729A (en) * 2019-08-02 2019-11-22 深圳市崧盛电子股份有限公司 A kind of circuit and Switching Power Supply optimizing Switching Power Supply PF value and THDI

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104993691A (en) * 2015-08-07 2015-10-21 英飞特电子(杭州)股份有限公司 PFC circuit
CN104993691B (en) * 2015-08-07 2017-10-31 英飞特电子(杭州)股份有限公司 A kind of pfc circuit
CN110492729A (en) * 2019-08-02 2019-11-22 深圳市崧盛电子股份有限公司 A kind of circuit and Switching Power Supply optimizing Switching Power Supply PF value and THDI
CN110492729B (en) * 2019-08-02 2020-12-04 深圳市崧盛电子股份有限公司 Circuit for optimizing PF value and THDI of switching power supply and switching power supply

Similar Documents

Publication Publication Date Title
CN102882378B (en) Control method and device for unit power factor flyback converter in critical continuous mode
CN103973095B (en) A kind of control circuit in circuit of power factor correction
CN103390995B (en) A kind of pfc circuit
US9735670B2 (en) Power factor correction conversion device and control method thereof
CN103904880A (en) Part active power factor correction circuit controlled by input voltage threshold value
CN203933384U (en) A kind of high power factor correction control circuit and device
CN103117734B (en) Peak detection circuit, input feedforward compensation circuit and circuit of power factor correction
CN103066827A (en) Power factor correcting circuit and input feedforward compensating circuit thereof
CN204835912U (en) PFC circuit
CN108768156A (en) A kind of power supply unit and its power factor correction circuit
CN205123575U (en) PFC (power factor correction) circuit
CN103648222A (en) Non-isolated field light-emitting diode (LED) driving circuit with power factor corrector (PFC) and controller thereof
CN104578797B (en) Method and device for controlling discontinuous mode flyback converter with high power factor and high efficiency
CN104993691A (en) PFC circuit
CN104993692B (en) A kind of pfc circuit
CN203039585U (en) Critical continuous mode unity power factor flyback converter
CN203618197U (en) LED drive circuit of non-isolated solid zone PFC and controller thereof
CN203014671U (en) Power factor correcting circuit and input feedforward compensating circuit thereof
CN204290730U (en) A kind of control device of High Power Factor high efficiency anti exciting converter of discontinuous mode
CN104124869A (en) Boosted circuit and signal output method
CN107404250B (en) A kind of dead beat grid-connected control method of pulsewidth modulation
Ramos et al. High performance control of a three-phase PWM rectifier using odd harmonic high order repetitive control
CN202663289U (en) Single-cycle PWM (Pulse-Width Modulation) modulator for correcting power factor
CN204706890U (en) Secondary ripple wave cancellation element in a kind of easy pfc circuit
CN208638248U (en) A kind of power supply unit and its power factor correction circuit

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
AV01 Patent right actively abandoned

Granted publication date: 20160330

Effective date of abandoning: 20171031

AV01 Patent right actively abandoned