CN204886398U - Clock chip supply circuit - Google Patents
Clock chip supply circuit Download PDFInfo
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- CN204886398U CN204886398U CN201520539399.0U CN201520539399U CN204886398U CN 204886398 U CN204886398 U CN 204886398U CN 201520539399 U CN201520539399 U CN 201520539399U CN 204886398 U CN204886398 U CN 204886398U
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- power supply
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Abstract
The utility model provides a can provide stand -by power supply, the lower clock chip supply circuit of cost for clock chip. This supply circuit includes main power circuit, stand -by power supply circuit and clock chip, main power circuit includes the main circuit interface, spare power supply circuit includes backup circuit interface, diode, triode, first electric capacity, first resistance and second resistance, the voltage that the backup circuit interface has is not higher than the voltage of main circuit interface, ground connection port ground connection is connected with main power source port electricity to the main circuit interface, the backup circuit interface passes through the diode and is connected with first electric capacity electricity, the base of triode is connected to the backup circuit interface to through a grounding, the projecting pole and the first electric capacity electricity of triode are connected, the collecting electrode of triode passes through the stand -by power supply port of second ohmic connection to clock chip. Adopt this clock chip supply circuit, avoid clock outage inefficacy, can recycle simultaneously, it is with low costs.
Description
Technical field
The utility model relates to a kind of chip stand-by power supply, especially a kind of clock chip power supply circuits.
Background technology
Known: at electronics field, clock chip application is very extensive, clock chip is beyond doubt as a kind of electronic device of accurate timing, but electronic equipment clock chip when power-off needs stand-by power supply to power, otherwise re-power rear clock chip reset or walk to stop, but the general stand-by power supply scheme adopted is with button cell, button cell can be divided into disposable battery to follow rechargeable battery, it is very low that the stand-by power consumption of known clock chip has done, more than 3 years are maintained for the disposable button cell theory of 40mAh, but from button cell specifications, generally indicate battery lifetime 1 year, practical application is also.Chargeable button cell can use by cycle charge-discharge, but cost is higher.The disclosed a kind of farad capacitor that uses of the utility model does stand-by power supply energy storing members, realizes the circuit that main power source and stand-by power supply automatically switch, achieve the chargeable stand-by power supply of low cost by circuit design.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of clock chip power supply circuits, and these clock chip power supply circuits can provide stand-by power supply for clock chip, and possesses the cycle charge discharge Electricity Functional of low cost, meets the demand of general electronic products.
The utility model solves the technical scheme that its technical problem adopts: clock chip power supply circuits, comprise main power circuit, stand-by power supply circuit and clock chip;
Described main power circuit comprises main circuit interface; Described stand-by power supply circuit comprises stand-by circuit interface, diode, triode, the first electric capacity, the first resistance and the second resistance; Described clock chip has primary power port, stand-by power supply port and grounding ports;
The voltage that described stand-by circuit interface has is not higher than the voltage of main circuit interface;
Described main circuit interface is electrically connected with primary power port, described grounding ports ground connection; Described stand-by circuit interface is electrically connected with the positive pole that diode has, and the negative pole that described diode has is connected to the positive pole that the first electric capacity has, the minus earth that described first electric capacity has;
The base stage that described triode has is connected to stand-by circuit interface, and by the first grounding through resistance; The emitter that described triode has is electrically connected with the positive pole of the first electric capacity; The collector electrode that described triode has is connected to the stand-by power supply port of clock chip by the second resistance.
Further, clock chip power supply circuits, also comprise the second electric capacity; Described second electric capacity one termination main circuit interface, other end ground connection.
Preferably, described first electric capacity adopts farad capacitor.
Preferably, described diode adopts Schottky diode.
The beneficial effects of the utility model are: clock chip power supply circuits described in the utility model, by arranging stand-by power supply circuit, can, when primary power source de-energizes, replace traditional button cell to be that clock chip is powered; Colleague adopts electric capacity to carry out electric power storage in stand-by power supply circuit; Therefore clock chip power supply circuits described in the utility model can ensure clock continued power under powering-off state, avoid clock powers down to lose efficacy, and can recycle, cost is low simultaneously.
Accompanying drawing explanation
Fig. 1 is a kind of clock chip power supply circuits schematic diagram described in the utility model;
Indicate in figure: 1-main power circuit, 11-main circuit interface, 12-second electric capacity, 2-stand-by power supply circuit, 21-stand-by circuit interface, 22-diode, 23-triode, 24-first electric capacity, 25-first resistance, 26-second resistance, 3-clock chip.
Embodiment
Below in conjunction with drawings and Examples, the utility model is further illustrated.
As shown in Figure 1, clock chip power supply circuits described in the utility model, comprise main power circuit 1, stand-by power supply circuit 2 and clock chip 3;
Described main power circuit 1 comprises main circuit interface 11; Described stand-by power supply circuit 2 comprises stand-by circuit interface 21, diode 22, triode 23, first electric capacity 24, first resistance 25 and the second resistance 26; Described clock chip 3 has primary power port VCC2, stand-by power supply port VCC1 and grounding ports GND;
The voltage that described stand-by circuit interface 21 has is not higher than the voltage of main circuit interface 11;
Described main circuit interface 11 is electrically connected with primary power port VCC2, described grounding ports GND ground connection; The positive pole that described stand-by circuit interface 21 and diode 22 have is electrically connected, and the negative pole that described diode 22 has is connected to the positive pole that the first electric capacity 24 has, the minus earth that described first electric capacity 24 has;
The base stage that described triode 23 has is connected to stand-by circuit interface 21, and by the first resistance 25 ground connection; The emitter that described triode 23 has is electrically connected with the positive pole of the first electric capacity 24; The collector electrode that described triode 23 has is connected to the stand-by power supply port VCC1 of clock chip 3 by the second resistance 26.
Described clock chip power supply circuits, comprise main power circuit 1, stand-by power supply circuit 2; The voltage (F-Vcc) that described stand-by power supply circuit 1 has is not higher than the voltage (Z-Vcc) that main power circuit 2 has.When external power normal power supply, main power circuit 1 is all connected with external power with stand-by power supply circuit 2.According to the chip data of clock chip, the Power supply scope of certain clock chip known, known, during the main power voltage > backup power source voltage of clock chip 3, powered by main power circuit 1, during main power voltage < backup power source voltage, powered by stand-by power supply circuit 2, above because of clock chip difference slightly difference.
In the course of work:
Main circuit interface 11 and stand-by circuit interface 21 are all energized with external power source.Same external power source can be adopted to connect with main circuit interface 11 and stand-by circuit interface 21 respectively, just between external power source and stand-by circuit interface 21, arrange dropping equipment, the voltage that described stand-by circuit interface 21 is had is not higher than the voltage of main circuit interface 11.
During external power source normal power supply, clock chip 3 is electrically connected with external power source by main circuit interface 11, and external power source is directly powered to clock chip 3.Now the emitter of described triode 23 is connected with external power source by diode 22 and stand-by circuit interface 21, the base stage of described triode 23 is directly connected to stand-by circuit interface 21, therefore the emitter voltage of triode 23 is lower than the voltage of base stage, and triode 23 ends.Therefore the power supply inputted from stand-by circuit interface 21 only can be charged, until the first electric capacity 24 is full of to the first electric capacity 24 by diode 22.
When external power source power-off, main power circuit 1 is stopped power supply, the emitter of described first electric capacity 24 positive pole connecting triode 23, the base stage of triode 23 is connected to ground by the first resistance 25, stand-by circuit interface 21 power-off be simultaneously connected with the base stage of triode 23; Therefore triode 23 conducting, the first electric capacity 24 discharges, and electric current powers to the second source port VCC2 of clock chip 3 through triode 23 emitter, collector electrode, the second resistance 26 successively, realizes power-off automatic switchover stand-by power supply.
According to practical situations by arranging the value size of the first resistance 25, second resistance 26, first electric capacity 24, discharge time can be changed simultaneously, can realize through test the continued power being greater than 30 days.
In sum, a kind of clock chip power supply circuits described in the utility model, when power supply when achieving clock chip 3 external power source normal power supply and external power source disconnect, stand-by power supply automatically switches and the function of continued power, the energy-storage travelling wave tube simultaneously adopted in stand-by power supply circuit 2 is the second capacitor 24, cost is lower, and can also use by cycle charge-discharge, when can ensure that power-off clock is normally walked like this, the trouble changing button cell can be solved again, it also avoid the problem adopting the cost of chargeable button cell higher.
Further, clock chip power supply circuits, also comprise the second electric capacity 12; Described second electric capacity 12 1 termination main circuit interface 11, other end ground connection.Described second electric capacity 12 can play filter action.
In order to meet larger charge capacity, reduce costs, preferably, described first electric capacity 24 adopts farad capacitor simultaneously.
In order to reduce pressure drop, preferred described diode 22 adopts Schottky diode.Described Schottky diode conduction voltage drop is low, when making the first electric capacity 24 be full of electricity voltage and charging voltage closer to.
Claims (4)
1. clock chip power supply circuits, is characterized in that: comprise main power circuit (1), stand-by power supply circuit (2) and clock chip (3);
Described main power circuit (1) comprises main circuit interface (11); Described stand-by power supply circuit (2) comprises stand-by circuit interface (21), diode (22), triode (23), the first electric capacity (24), the first resistance (25) and the second resistance (26); Described clock chip (3) has primary power port (VCC2), stand-by power supply port (VCC1) and grounding ports (GND);
The voltage that described stand-by circuit interface (21) has is not higher than the voltage of main circuit interface (11);
Described main circuit interface (11) is electrically connected with primary power port (VCC2), described grounding ports (GND) ground connection; The positive pole that described stand-by circuit interface (21) and diode (22) have is electrically connected, the negative pole that described diode (22) has is connected to the positive pole that the first electric capacity (24) has, the minus earth that described first electric capacity (24) has;
The base stage that described triode (23) has is connected to stand-by circuit interface (21), and by the first resistance (25) ground connection; The emitter that described triode (23) has is electrically connected with the positive pole of the first electric capacity (24); The collector electrode that described triode (23) has is connected to the stand-by power supply port (VCC1) of clock chip (3) by the second resistance (26).
2. clock chip power supply circuits as claimed in claim 1, is characterized in that: also comprise the second electric capacity (12); Described second electric capacity (12) one termination main circuit interface (11), other end ground connection.
3. clock chip power supply circuits as claimed in claim 2, is characterized in that: described first electric capacity (24) adopts farad capacitor.
4. clock chip power supply circuits as claimed in claim 2, is characterized in that: described diode (22) adopts Schottky diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520539399.0U CN204886398U (en) | 2015-07-24 | 2015-07-24 | Clock chip supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520539399.0U CN204886398U (en) | 2015-07-24 | 2015-07-24 | Clock chip supply circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204886398U true CN204886398U (en) | 2015-12-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520539399.0U Active CN204886398U (en) | 2015-07-24 | 2015-07-24 | Clock chip supply circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204886398U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106356987A (en) * | 2016-09-20 | 2017-01-25 | 北京机械设备研究所 | RTC (real time clock) circuit |
| CN109375703A (en) * | 2018-08-31 | 2019-02-22 | 出门问问信息科技有限公司 | Clock circuit and electronic equipment |
-
2015
- 2015-07-24 CN CN201520539399.0U patent/CN204886398U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106356987A (en) * | 2016-09-20 | 2017-01-25 | 北京机械设备研究所 | RTC (real time clock) circuit |
| CN106356987B (en) * | 2016-09-20 | 2019-04-23 | 北京机械设备研究所 | A kind of RTC clock circuit |
| CN109375703A (en) * | 2018-08-31 | 2019-02-22 | 出门问问信息科技有限公司 | Clock circuit and electronic equipment |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170505 Address after: 750000 the Ningxia Hui Autonomous Region Plover Jinfeng District Road No. 402 Yinchuan Tianjia office building 1-2 layer Patentee after: Ningxia Saiwen technology Limited by Share Ltd Address before: 750000 -57 factory building, B District, Jinfeng Industrial Zone, Jinfeng, the Ningxia Hui Autonomous Region, Yinchuan, Yinchuan Patentee before: NINGXIA SAIWEN ENERGY SAVING EQUIPMENT MANUFACTURING CO., LTD. |
|
| TR01 | Transfer of patent right |