CN204857149U - High resolution liquid crystal mosaicing processing ware - Google Patents
High resolution liquid crystal mosaicing processing ware Download PDFInfo
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- CN204857149U CN204857149U CN201520341762.8U CN201520341762U CN204857149U CN 204857149 U CN204857149 U CN 204857149U CN 201520341762 U CN201520341762 U CN 201520341762U CN 204857149 U CN204857149 U CN 204857149U
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- input interface
- processor
- decoder
- liquid crystal
- digital video
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Abstract
The utility model provides a high resolution liquid crystal mosaicing processing ware, include: input interface, input decoder, many screen concatenation cards, microcontroller, digital video treater, distributor and display module, input interface connection the input decoder the input decoder is connected the digital video treater is connected, microcontroller connects the digital video treater the output of digital video treater is connected many screen concatenation cards, many screen concatenation cards with microcontroller connects, the output of many screen concatenation cards with the distributor is connected, the output of distributor with the display module is connected. The utility model provides a signal of multiple general form can be received to the treater to can the real time output video, have extensive suitability, and simple structure, easy and simple to handle, the practicality is strong.
Description
Technical field
The utility model relates to a kind of multi-screen splicing processor, is specifically related to the liquid crystal-spliced processor of a kind of high-res.
Background technology
Multi-screen splicing processor is widely used in the fields such as video display, watch-dog, major function distributes to multiple video display unit after a complete picture signal is divided into polylith, complete and form a jumbotron dynamic image display screen with multiple ordinary video display unit, access while simultaneously can supporting various video equipment, as DVD, video camera, satellite receiver, Set Top Box, standard computer a-signal.Multi-screen splicing processor can realize multiple physics and export the ultrahigh resolution display translation after being combined into the superposition of resolution, make screen wall form a ultrahigh resolution, super brightness, super large display size logic display screen, complete the Presentation Functions such as multiple signal source windowing on screen wall, mobile and convergent-divergent.
Existing large screen display wall is all the display device of fixed resolution, if input video is different with the specification of display screen resolution, easily cause the appearance of screen slots, thus the globality of effect diagram picture display and consistance, and available liquid crystal display and plasma display have a physics frame, consisting of combination, all there is splicing gap in various degree, perfect visual effect cannot be reached.
Utility model content
The utility model, for the technical matters of above-mentioned existence, proposes the liquid crystal-spliced processor of a kind of high-res.
The technical solution of the utility model is: the liquid crystal-spliced processor of a kind of high-res, comprising: input interface, input decoder, multi-screen splicing card, microcontroller, digital video processor, divider and display module; Described input interface connects described input decoder, described input decoder connects described digital video processor and connects, described microcontroller connects described digital video processor, the output terminal of described digital video processor connects described multi-screen splicing card, described multi-screen splicing card is connected with described microcontroller, the output terminal of described multi-screen splicing card is connected with described divider, and the output terminal of described divider is connected with described display module.
Further, described input interface comprises DVI input interface, HDMI input interface, SDI input interface, YCbCr input interface, YPbPr input interface and VGA input interface.
Further, described input decoder comprises video receiver, Video Decoder and analog to digital converter, described video receiver and is connected described DVI input interface and is connected described SDI input interface and described YCbCr input interface with described HDMI input interface, described Video Decoder; Described analog to digital converter connects described YPbPr input interface and described VGA input interface.
Further, also comprise storer, described storer is connected with described microcontroller.
The beneficial effects of the utility model: the utility model solves video image, transmitting chip limitation necessary consistent in resolution, thus achieve the seamless spliced of image display, this processor can receive the signal of many general form, thus can output video in real time, there is applicability widely, and structure is simple, easy and simple to handle, practical.
Accompanying drawing explanation
Fig. 1 is the liquid crystal-spliced processor structure figure of a kind of high-res that the utility model proposes.
Embodiment
See Fig. 1, be the liquid crystal-spliced processor structure figure of a kind of high-res that the utility model proposes.
As shown in Figure 1, the liquid crystal-spliced processor of a kind of high-res, comprising: input interface, input decoder, multi-screen splicing card, microcontroller, digital video processor, divider and display module; Described input interface connects described input decoder, described input decoder connects described digital video processor and connects, described microcontroller connects described digital video processor, the output terminal of described digital video processor connects described multi-screen splicing card, described multi-screen splicing card is connected with described microcontroller, the output terminal of described multi-screen splicing card is connected with described divider, and the output terminal of described divider is connected with described display module.
In the utility model embodiment, be connected with external unit by input interface, by input decoder, the information that input interface transmits is decoded, then be sent in digital video processor and carry out Video processing, by microcontroller, digital video processor is controlled, be connected with divider by multi-screen splicing card, shown by display module by the video image of divider by display, adopt multi-screen splicing card to realize the function simultaneously shown by multiple image, and realize multiple display module by divider and show a complete image.
Further, described input interface comprises DVI input interface, HDMI input interface, SDI input interface, YCbCr input interface, YPbPr input interface and VGA input interface.
Further, described input decoder comprises video receiver, Video Decoder and analog to digital converter, described video receiver and is connected described DVI input interface and is connected described SDI input interface and described YCbCr input interface with described HDMI input interface, described Video Decoder; Described analog to digital converter connects described YPbPr input interface and described VGA input interface.
Further, also comprise storer, described storer is connected with described microcontroller.
In the utility model embodiment, stored control information by storer, storer stores connecting method and display module parameter, during use, called by microcontroller and directly send to display module steering order, control information stores in advance, easy to use.
In the utility model embodiment, display module adopts series system to carry out cascade by control signal wire, display control signal is sent to display unit by the control signal of microcontroller, display module makes corresponding process after receiving the control signal belonging to self, and display module receives the control signal not belonging to self and is then transmitted to next display module.
In the utility model embodiment, microprocessor-based control signal can adjust the picture position of display module, enlargement ratio, brightness, contrast, saturation degree and sharpness, thus makes the display effect that display module reaches excellent.
Above the utility model is described in detail, but the utility model is not limited to above-mentioned embodiment, in the ken that those of ordinary skill in the art possess, can also makes a variety of changes under the prerequisite not departing from the utility model aim.Do not depart from design of the present utility model and scope can make many other and change and remodeling.Should be appreciated that the utility model is not limited to specific embodiment, scope of the present utility model is defined by the following claims.
Claims (4)
1. the liquid crystal-spliced processor of high-res, is characterized in that, comprising: input interface, input decoder, multi-screen splicing card, microcontroller, digital video processor, divider and display module; Described input interface connects described input decoder, described input decoder connects described digital video processor and connects, described microcontroller connects described digital video processor, the output terminal of described digital video processor connects described multi-screen splicing card, described multi-screen splicing card is connected with described microcontroller, the output terminal of described multi-screen splicing card is connected with described divider, and the output terminal of described divider is connected with described display module.
2. the liquid crystal-spliced processor of a kind of high-res according to claim 1, is characterized in that, described input interface comprises DVI input interface, HDMI input interface, SDI input interface, YCbCr input interface, YPbPr input interface and VGA input interface.
3. the liquid crystal-spliced processor of a kind of high-res according to claim 2, it is characterized in that, described input decoder comprises video receiver, Video Decoder and analog to digital converter, described video receiver and is connected described DVI input interface and is connected described SDI input interface and described YCbCr input interface with described HDMI input interface, described Video Decoder; Described analog to digital converter connects described YPbPr input interface and described VGA input interface.
4. the liquid crystal-spliced processor of a kind of high-res according to claim 1, it is characterized in that, also comprise storer, described storer is connected with described microcontroller.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520341762.8U CN204857149U (en) | 2015-05-23 | 2015-05-23 | High resolution liquid crystal mosaicing processing ware |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520341762.8U CN204857149U (en) | 2015-05-23 | 2015-05-23 | High resolution liquid crystal mosaicing processing ware |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204857149U true CN204857149U (en) | 2015-12-09 |
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| CN201520341762.8U Expired - Fee Related CN204857149U (en) | 2015-05-23 | 2015-05-23 | High resolution liquid crystal mosaicing processing ware |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111385492A (en) * | 2020-03-15 | 2020-07-07 | 深圳市飓风智云科技有限公司 | Video partition display method and device |
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2015
- 2015-05-23 CN CN201520341762.8U patent/CN204857149U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111385492A (en) * | 2020-03-15 | 2020-07-07 | 深圳市飓风智云科技有限公司 | Video partition display method and device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151209 Termination date: 20190523 |