CN204559544U - L-band frequency synthesizer circuit - Google Patents
L-band frequency synthesizer circuit Download PDFInfo
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- CN204559544U CN204559544U CN201520170837.0U CN201520170837U CN204559544U CN 204559544 U CN204559544 U CN 204559544U CN 201520170837 U CN201520170837 U CN 201520170837U CN 204559544 U CN204559544 U CN 204559544U
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Abstract
The utility model discloses a kind of L-band frequency synthesizer circuit, for Tacan ground station, DME equipment.The design comprises phase-locked loop circuit, loop filter, voltage-controlled oscillator, puts frequency control circuit and reference frequency source circuit, put frequency control circuit and be connected phase-locked loop circuit respectively with reference frequency source circuit, phase-locked loop circuit linkloop filter, loop filter connects voltage-controlled oscillator, and voltage-controlled oscillator connects phase-locked loop circuit.By taking the circuit design of above improvement, final design goes out advanced technology, working stability, dependable performance, volume L-band frequency synthesizer circuit little, low in energy consumption, thus solve available circuit poor stability, debug difficulties, to make an uproar the problems such as index error mutually, meet the demand that Tacan, DME equipment working frequency range are wide.Reduce the size of circuit simultaneously, reduce cost.
Description
Technical field
The utility model relates to electronic digital communication system, particularly a kind of L-band frequency synthesizer circuit, for Tacan ground station, DME equipment.
Background technology
In Modern Communication System, all require very high to the frequency stability of equipment and accuracy.For the communication system of broadband operation, not only require high frequency stability and accuracy, and require that it can change frequency easily and fast.Tacan, DME(distance measuring equipment) working frequency range of equipment is wide, these requirements of demand fulfillment.
Due to the restriction of technology and components and parts, there is following problem in existing L-band frequency synthesizer circuit: 1, adopts the voltage-controlled oscillator (hereinafter referred to as VCO) that resolution element is built, and cause output frequency unstable, phase noise is larger.2, use active loop filter, introduce noise, increase phase noise.3, control signal uses parallel signal pattern, controls complicated.4, adopt independently frequency divider and phase discriminator, circuit composition is complicated.Due to above problem, cause L-band frequency synthesizer circuit job insecurity, performance unreliable, the demand that Tacan, DME equipment working frequency range are wide can not be met, also there is the problems such as cost is high, power consumption is large simultaneously.How to address this problem the problem just becoming those skilled in the art and will study and solve.
Summary of the invention
The purpose of this utility model is exactly for overcoming the deficiencies in the prior art, the problems such as, circuit composition large for available circuit phase noise is complicated, there is provided a kind of design of L-band frequency synthesizer circuit: 1, by selecting integrated VCO chip, output frequency phase noise reduces greatly, rate-adaptive pacemaker stability improves, and reduces complexity in circuits simultaneously.2, use passive loop filter instead, the loop bandwidth of adjustment loop filter, phase-locked speed is improved.3, select novel PLL chip, this integrated chip frequency divider and phase discriminator, reduce circuit scale, this chip uses three Bits Serial control signals simultaneously, reduces control complexity.
The utility model is realized by such technical scheme: a kind of L-band frequency synthesizer circuit, it is characterized in that: comprise phase-locked loop circuit, loop filter, voltage-controlled oscillator, put frequency control circuit and reference frequency source circuit, put frequency control circuit and be connected phase-locked loop circuit respectively with reference frequency source circuit, phase-locked loop circuit linkloop filter, loop filter connects voltage-controlled oscillator, and voltage-controlled oscillator connects phase-locked loop circuit.
The beneficial effects of the utility model are: by taking the circuit design of above improvement, final design goes out advanced technology, working stability, dependable performance, volume L-band frequency synthesizer circuit little, low in energy consumption, thus solve available circuit poor stability, debug difficulties, to make an uproar the problems such as index error mutually, meet the demand that Tacan, DME equipment working frequency range are wide.Reduce the size of circuit simultaneously, reduce cost.
Accompanying drawing explanation
Fig. 1 is that the utility model frequency synthesizer circuit connects block diagram;
Fig. 2 is reference frequency source circuit theory diagrams in Fig. 1;
Fig. 3 is the mid-frequency control circuit schematic diagram of Fig. 1;
Phase-locked loop circuit, loop filter and voltage-controlled oscillator schematic diagram in Fig. 4 bitmap 1.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail:
As shown in Figure 1, a kind of L-band frequency synthesizer circuit comprises phase-locked loop circuit (PLL), loop filter, voltage-controlled oscillator (VCO), puts frequency control circuit and reference frequency source circuit, put frequency control circuit and be connected phase-locked loop circuit respectively with reference frequency source circuit, phase-locked loop circuit linkloop filter, loop filter connects voltage-controlled oscillator, and voltage-controlled oscillator connects phase-locked loop circuit.
This circuit utilizes a reference frequency source, produces a large amount of combination of frequencies by harmonic oscillator mixing and frequency division, then uses phase-locked loop the Frequency Locking of VCO in a certain frequency, indirectly produces required frequency by VCO.
As shown in Figure 2, reference frequency source circuit of the present utility model adopts an active crystal oscillator Y1, one end of resistance R1 and one end of electric capacity C2, + 3.3V power supply is connect after one end of electric capacity C3 and 4 pin of active crystal oscillator Y1 connect, the other end of electric capacity C2 is connected rear ground connection with the other end of electric capacity C3, one end of the other end contact resistance R2 of resistance R1 and 1 pin of active crystal oscillator Y1, the other end ground connection of resistance R2, 3 pin of active crystal oscillator Y1 connect one end of electric capacity C1 and one end of electric capacity C4, the other end ground connection of electric capacity C1, the other end of electric capacity C4 connects one end of inductance L 1, the other end of inductance L 1 is reference frequency output, the 2 pin ground connection of active crystal oscillator Y1.
Reference frequency source circuit adopts active crystal oscillator, and output frequency is 10MHz, and the waveform of output is sinusoidal wave.
As shown in Figure 3, frequency control circuit of putting of the present utility model adopts a LPC1114 ARM chip D1, one end of 4 pin contact resistance R3 of ARM chip D1 and the negative terminal of electrochemical capacitor C5, connect+5V power supply, the other end ground connection of resistance R3 after being connected with the anode of electrochemical capacitor C5 by touch-switch S1 again simultaneously; The two ends of crystal oscillator G1 connect 14 pin of ARM chip D1,15 pin and one end of electric capacity C6, one end of electric capacity C7 respectively, ground connection after the other end of electric capacity C6 is connected with the other end of electric capacity C7; 16 pin of ARM chip D1,17 pin ground connection respectively; 29 pin, 38 pin of ARM chip D1 connect+5V power supply respectively; 44 pin of ARM chip D1,43 pin and 42 pin link 1 pin of connector P2,2 pin and 3 pin respectively.
Adopt three I/O communication interfaces of ARM chip pin to carry out control phase-locked loop circuit, output signal is the serial control signal of three.
Putting frequency control circuit adopts three I/O communication interfaces of LPC1114 ARM chip pin to carry out control phase-locked loop circuit, and output signal is the serial control signal of three.
As shown in Figure 4, phase-locked loop circuit of the present utility model adopts an ADF4113 PLL chip D2, loop filter adopts passive resistance and electric capacity, and voltage-controlled oscillator adopts a ROS-1250W-119+ integrated chip V1, and 5 pin of PLL chip D2 are by electric capacity C15 ground connection; 8 pin of PLL chip D2 are by one end of electric capacity C17 contact resistance R11 and one end of electric capacity C22, and the other end of electric capacity C22 is reference frequency input, the other end ground connection of resistance R11; 13 pin one end of contact resistance R13 and one end of resistance R16 respectively of PLL chip D2,12 pin one end of contact resistance R14 and one end of resistance R17 respectively of PLL chip D2,11 pin one end of contact resistance R15 and one end of resistance R18 respectively of PLL chip D2,10 pin of PLL chip D2 connect+3.3V power supply, the other end of the other end of resistance R13, the other end of resistance R14 and resistance R15 links 3 pin of connector P1,2 pin and 1 pin respectively, the other end ground connection respectively of the other end of resistance R16, the other end of resistance R17 and resistance R18; Ground connection after 3 pin of PLL chip D2,4 pin are connected with 9 pin; 1 pin of PLL chip D2 is by resistance R12 ground connection; 2 pin of PLL chip D2 connect one end of electric capacity C19, one end of resistance R10 and one end of resistance R6, and the other end of resistance R10 is by electric capacity C23 ground connection; The other end of resistance R6 connects one end of electric capacity C18 and one end of resistance R7, and the other end of resistance R7 connects one end of electric capacity C20 and 2 pin of integrated chip V1, the other end ground connection respectively of the other end of electric capacity C19, the other end of electric capacity C18 and electric capacity C20; Ground connection after 1 pin of integrated chip V1,3 pin are connected with 4 pin, connects+5V power supply after one end of 14 pin of integrated chip V1 and one end of electric capacity C24 and electric capacity C25 is connected; 10 pin of integrated chip V1 pass through one end of electric capacity C21 contact resistance R8, one end of other end contact resistance R5 of resistance R8 and one end of resistance R9, and the other end of resistance R9 connects one end of electric capacity C16, and the other end of electric capacity C16 is frequency output terminal; One end of other end contact resistance R4 of resistance R5 and one end of electric capacity C14, the other end of electric capacity C14 is connected to 6 pin of PLL chip D2, the other end ground connection of resistance R4; 7 pin of PLL chip D2 and 15 pin connect+3.3V power supply with one end of electric capacity C11, one end of electric capacity C12 and one end of electric capacity C8, one end of electric capacity C9 after being connected respectively simultaneously; + 5V power supply is connect after one end of 16 pin of PLL chip D2 and one end of electric capacity C13 and electric capacity C10 is connected; The other end ground connection respectively of the other end of the other end of electric capacity C11, the other end of electric capacity C12, electric capacity C8, the other end of electric capacity C9, the other end of electric capacity C13 and electric capacity C10.
Phase-locked loop circuit forms primarily of PLL chip ADF4113, has integrated frequency divider and phase discriminator in chip, and loop filter adopts passive resistance and electric capacity composition, and voltage-controlled oscillator adopts integrated chip ROS-1250W-119+.Phase-locked loop circuit compares rear output square-wave signal with reference to frequency source and output frequency, exports to loop filter, and after loop filter filtering, the d. c. voltage signal that the amplitude that becomes is certain, control voltage controls oscillator, thus changes output frequency.
The workflow of this circuit is: when putting control signal change frequently, and phase-locked loop circuit output signal changes, and the direct voltage that loop filter exports thereupon also changes, and control VCO output frequency changes.The change of VCO output frequency affects again frequency divider and exports.And so forth, until frequency stabilization exports, the frequency required for work is.
The technical indicator that this circuit reaches is as follows:
1, the frequency exported: 920MHz ~ 1213MHz;
2, frequency departure: be less than 2 × 10-5;
3, type is outputed signal: continuous wave;
4, phase noise: be less than 80dBc;
5, output signal power: 0 ± 2dBm.
According to the above description, scheme of the present utility model can be realized in conjunction with art technology.
Claims (4)
1. a L-band frequency synthesizer circuit, it is characterized in that: comprise phase-locked loop circuit, loop filter, voltage-controlled oscillator, put frequency control circuit and reference frequency source circuit, put frequency control circuit and be connected phase-locked loop circuit respectively with reference frequency source circuit, phase-locked loop circuit linkloop filter, loop filter connects voltage-controlled oscillator, and voltage-controlled oscillator connects phase-locked loop circuit.
2. L-band frequency synthesizer circuit according to claim 1, it is characterized in that: described reference frequency source circuit adopts an active crystal oscillator Y1, one end of resistance R1 and one end of electric capacity C2, + 3.3V power supply is connect after one end of electric capacity C3 and 4 pin of active crystal oscillator Y1 connect, the other end of electric capacity C2 is connected rear ground connection with the other end of electric capacity C3, one end of the other end contact resistance R2 of resistance R1 and 1 pin of active crystal oscillator Y1, the other end ground connection of resistance R2, 3 pin of active crystal oscillator Y1 connect one end of electric capacity C1 and one end of electric capacity C4, the other end ground connection of electric capacity C1, the other end of electric capacity C4 connects one end of inductance L 1, the other end of inductance L 1 is reference frequency output, active crystal vibrates
The 2 pin ground connection of device Y1.
3. L-band frequency synthesizer circuit according to claim 1, it is characterized in that: described frequency control circuit of putting adopts a LPC1114 ARM chip D1, one end of 4 pin contact resistance R3 of ARM chip D1 and the negative terminal of electrochemical capacitor C5, connect+5V power supply, the other end ground connection of resistance R3 after being connected with the anode of electrochemical capacitor C5 by touch-switch S1 again simultaneously; The two ends of crystal oscillator G1 connect 14 pin of ARM chip D1,15 pin and one end of electric capacity C6, one end of electric capacity C7 respectively, ground connection after the other end of electric capacity C6 is connected with the other end of electric capacity C7; 16 pin of ARM chip D1,17 pin ground connection respectively; 29 pin, 38 pin of ARM chip D1 connect+5V power supply respectively; 44 pin of ARM chip D1,43 pin and 42 pin link 1 pin of connector P2,2 pin and 3 pin respectively.
4. L-band frequency synthesizer circuit according to claim 1, it is characterized in that: described phase-locked loop circuit adopts an ADF4113 PLL chip D2, loop filter adopts passive resistance and electric capacity, voltage-controlled oscillator adopts a ROS-1250W-119+ integrated chip V1, and 5 pin of PLL chip D2 are by electric capacity C15 ground connection; 8 pin of PLL chip D2 are by one end of electric capacity C17 contact resistance R11 and one end of electric capacity C22, and the other end of electric capacity C22 is reference frequency input, the other end ground connection of resistance R11; 13 pin one end of contact resistance R13 and one end of resistance R16 respectively of PLL chip D2,12 pin one end of contact resistance R14 and one end of resistance R17 respectively of PLL chip D2,11 pin one end of contact resistance R15 and one end of resistance R18 respectively of PLL chip D2,10 pin of PLL chip D2 connect+3.3V power supply, the other end of the other end of resistance R13, the other end of resistance R14 and resistance R15 links 3 pin of connector P1,2 pin and 1 pin respectively, the other end ground connection respectively of the other end of resistance R16, the other end of resistance R17 and resistance R18; Ground connection after 3 pin of PLL chip D2,4 pin are connected with 9 pin; 1 pin of PLL chip D2 is by resistance R12 ground connection; 2 pin of PLL chip D2 connect one end of electric capacity C19, one end of resistance R10 and one end of resistance R6, and the other end of resistance R10 is by electric capacity C23 ground connection; The other end of resistance R6 connects one end of electric capacity C18 and one end of resistance R7, and the other end of resistance R7 connects one end of electric capacity C20 and 2 pin of integrated chip V1, the other end ground connection respectively of the other end of electric capacity C19, the other end of electric capacity C18 and electric capacity C20; Ground connection after 1 pin of integrated chip V1,3 pin are connected with 4 pin, connects+5V power supply after one end of 14 pin of integrated chip V1 and one end of electric capacity C24 and electric capacity C25 is connected; 10 pin of integrated chip V1 pass through one end of electric capacity C21 contact resistance R8, one end of other end contact resistance R5 of resistance R8 and one end of resistance R9, and the other end of resistance R9 connects one end of electric capacity C16, and the other end of electric capacity C16 is frequency output terminal; One end of other end contact resistance R4 of resistance R5 and one end of electric capacity C14, the other end of electric capacity C14 is connected to 6 pin of PLL chip D2, the other end ground connection of resistance R4; 7 pin of PLL chip D2 and 15 pin connect+3.3V power supply with one end of electric capacity C11, one end of electric capacity C12 and one end of electric capacity C8, one end of electric capacity C9 after being connected respectively simultaneously; + 5V power supply is connect after one end of 16 pin of PLL chip D2 and one end of electric capacity C13 and electric capacity C10 is connected; The other end ground connection respectively of the other end of the other end of electric capacity C11, the other end of electric capacity C12, electric capacity C8, the other end of electric capacity C9, the other end of electric capacity C13 and electric capacity C10.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520170837.0U CN204559544U (en) | 2015-03-25 | 2015-03-25 | L-band frequency synthesizer circuit |
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| CN201520170837.0U CN204559544U (en) | 2015-03-25 | 2015-03-25 | L-band frequency synthesizer circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104660257A (en) * | 2015-03-25 | 2015-05-27 | 天津七六四通信导航技术有限公司 | L-band frequency synthesizer circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104660257A (en) * | 2015-03-25 | 2015-05-27 | 天津七六四通信导航技术有限公司 | L-band frequency synthesizer circuit |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150812 |
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| CF01 | Termination of patent right due to non-payment of annual fee |