CN204498091U - A kind of timer circuit - Google Patents
A kind of timer circuit Download PDFInfo
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- CN204498091U CN204498091U CN201520266956.6U CN201520266956U CN204498091U CN 204498091 U CN204498091 U CN 204498091U CN 201520266956 U CN201520266956 U CN 201520266956U CN 204498091 U CN204498091 U CN 204498091U
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Abstract
The utility model discloses a kind of timer circuit, comprise transformer T, rectifier bridge Q, chip U1, chip U2, triode VT1, resistance R1, electric capacity C1 and diode D1.The utility model timer circuit utilizes the forced resetting function of 555 chip 4 pin to realize jamproof timer circuit, and circuit structure is simple, and function-stable, is applicable to promoting the use of.
Description
Technical field
The utility model relates to a kind of timing circuit, specifically a kind of timer circuit.
Background technology
In the timer circuit of utilization 555 chip design, generally all 555 chips are connected into monostable flipflop, such connection makes circuit design simple, only needs several resistor and capacitor just can realize Trigger Function, but also there is the outside interference problem to 555 chip 2 pin simultaneously.
Utility model content
The purpose of this utility model is the timer circuit providing a kind of antijamming capability strong, to solve the problem proposed in above-mentioned background technology.
For achieving the above object, the utility model provides following technical scheme:
A kind of timer circuit, comprises transformer T, rectifier bridge Q, chip U1, chip U2, triode VT1, resistance R1, electric capacity C1 and diode D1, described elementary one end of transformer T connects 220V alternating current one end and load RL respectively, the elementary other end of transformer T connects the 220V alternating current other end and relay K contact K-1 respectively, the relay K contact K-1 other end connects the load RL other end, transformer T level two ends connect rectifier bridge Q pin 1 respectively and rectifier bridge Q pin 3, rectifier bridge Q pin 2 connects electric capacity C6 respectively, chip U2 pin 2, electric capacity C5, resistance R6, relay K coil, diode D4 positive pole, electric capacity C4, chip U1 pin 1, electric capacity C3, triode VT1 emitter, resistance R2 and electric capacity C1 ground connection, rectifier bridge Q pin 4 connects chip U2 pin 3 and the electric capacity C6 other end respectively, and chip U2 pin 1 connects the electric capacity C5 other end respectively, chip U1 pin 8, resistance R5, resistance R4, resistance R3 and key switch S, the key switch S other end is contact resistance R1 and diode D1 positive pole respectively, and diode D1 negative pole connects chip U1 pin 4 respectively, diode D2 negative pole and the resistance R6 other end, diode D2 positive pole connects chip U1 pin 3 and light-emitting diode D3 positive pole respectively, light-emitting diode D3 negative pole connects diode D4 negative pole and the relay K coil other end respectively, described chip U1 pin 5 connects the electric capacity C4 other end, and chip U1 pin 7 connects chip U1 pin 6 respectively, the electric capacity C3 other end and the resistance R5 other end, chip U1 pin 2 is the contact resistance R4 other end and electric capacity C2, the electric capacity C2 other end contact resistance R3 other end and triode VT1 collector electrode respectively respectively, and triode VT1 base stage is the contact resistance R2 other end respectively, the electric capacity C1 other end and the resistance R1 other end.
As further program of the utility model: described chip U1 model is NE555.
As the utility model further scheme: described chip U2 model is 7809.
Compared with prior art, the beneficial effects of the utility model are: the utility model timer circuit utilizes the forced resetting function of 555 chip 4 pin to realize jamproof timer circuit, and circuit structure is simple, and function-stable, is applicable to promoting the use of.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of timer circuit.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Refer to Fig. 1, in the utility model embodiment, a kind of timer circuit, comprises transformer T, rectifier bridge Q, chip U1, chip U2, triode VT1, resistance R1, electric capacity C1 and diode D1, the elementary one end of transformer T connects 220V alternating current one end and load RL respectively, the elementary other end of transformer T connects the 220V alternating current other end and relay K contact K-1 respectively, the relay K contact K-1 other end connects the load RL other end, transformer T level two ends connect rectifier bridge Q pin 1 respectively and rectifier bridge Q pin 3, rectifier bridge Q pin 2 connects electric capacity C6 respectively, chip U2 pin 2, electric capacity C5, resistance R6, relay K coil, diode D4 positive pole, electric capacity C4, chip U1 pin 1, electric capacity C3, triode VT1 emitter, resistance R2 and electric capacity C1 ground connection, rectifier bridge Q pin 4 connects chip U2 pin 3 and the electric capacity C6 other end respectively, and chip U2 pin 1 connects the electric capacity C5 other end respectively, chip U1 pin 8, resistance R5, resistance R4, resistance R3 and key switch S, the key switch S other end is contact resistance R1 and diode D1 positive pole respectively, and diode D1 negative pole connects chip U1 pin 4 respectively, diode D2 negative pole and the resistance R6 other end, diode D2 positive pole connects chip U1 pin 3 and light-emitting diode D3 positive pole respectively, light-emitting diode D3 negative pole connects diode D4 negative pole and the relay K coil other end respectively, chip U1 pin 5 connects the electric capacity C4 other end, and chip U1 pin 7 connects chip U1 pin 6 respectively, the electric capacity C3 other end and the resistance R5 other end, chip U1 pin 2 is the contact resistance R4 other end and electric capacity C2, the electric capacity C2 other end contact resistance R3 other end and triode VT1 collector electrode respectively respectively, and triode VT1 base stage is the contact resistance R2 other end respectively, the electric capacity C1 other end and the resistance R1 other end.
Chip U1 model is NE555.
Chip U2 model is 7809.
Operation principle of the present utility model is: when key switch S disconnects, 4 pin of 555 chips are connected to the ground by resistance R6, 555 chips are forced to reset, now, no matter 555 chip 2 pin are subject to great interference, 555 chips do not work, when after the switch S that pushes button, power supply adds to 555 chip 4 pin high level by diode D1, the forced resetting function of 555 chips is removed, power supply is added to by resistor R1 in the base stage of triode VT1 simultaneously, make VT1 conducting, electric capacity C2 exports a low level by 2 pin of backward 555 chips that are connected with triode VT1 collector electrode, 555 chip upset set, 555 chip 3 pin export high level, light-emitting diode D3 lights, relay K obtains electric, contact K-1 closes, load RL connects work, the high level of 555 chip 3 pin exports a high level by diode D2 to 555 chip 4 pin and makes circuit self-locking simultaneously, after transient state terminates, circuit turns back stable state, 555 chip 3 pin output low levels, relay K dead electricity, contact K-1 disconnects, load RL quits work, circuit returns to initial condition.
Claims (3)
1. a timer circuit, comprises transformer T, rectifier bridge Q, chip U1, chip U2, triode VT1, resistance R1, electric capacity C1 and diode D1, it is characterized in that, described elementary one end of transformer T connects 220V alternating current one end and load RL respectively, the elementary other end of transformer T connects the 220V alternating current other end and relay K contact K-1 respectively, the relay K contact K-1 other end connects the load RL other end, transformer T level two ends connect rectifier bridge Q pin 1 respectively and rectifier bridge Q pin 3, rectifier bridge Q pin 2 connects electric capacity C6 respectively, chip U2 pin 2, electric capacity C5, resistance R6, relay K coil, diode D4 positive pole, electric capacity C4, chip U1 pin 1, electric capacity C3, triode VT1 emitter, resistance R2 and electric capacity C1 ground connection, rectifier bridge Q pin 4 connects chip U2 pin 3 and the electric capacity C6 other end respectively, and chip U2 pin 1 connects the electric capacity C5 other end respectively, chip U1 pin 8, resistance R5, resistance R4, resistance R3 and key switch S, the key switch S other end is contact resistance R1 and diode D1 positive pole respectively, and diode D1 negative pole connects chip U1 pin 4 respectively, diode D2 negative pole and the resistance R6 other end, diode D2 positive pole connects chip U1 pin 3 and light-emitting diode D3 positive pole respectively, light-emitting diode D3 negative pole connects diode D4 negative pole and the relay K coil other end respectively, described chip U1 pin 5 connects the electric capacity C4 other end, and chip U1 pin 7 connects chip U1 pin 6 respectively, the electric capacity C3 other end and the resistance R5 other end, chip U1 pin 2 is the contact resistance R4 other end and electric capacity C2, the electric capacity C2 other end contact resistance R3 other end and triode VT1 collector electrode respectively respectively, and triode VT1 base stage is the contact resistance R2 other end respectively, the electric capacity C1 other end and the resistance R1 other end.
2. timer circuit according to claim 1, is characterized in that, described chip U1 model is NE555.
3. timer circuit according to claim 1, is characterized in that, described chip U2 model is 7809.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520266956.6U CN204498091U (en) | 2015-04-21 | 2015-04-21 | A kind of timer circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520266956.6U CN204498091U (en) | 2015-04-21 | 2015-04-21 | A kind of timer circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204498091U true CN204498091U (en) | 2015-07-22 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520266956.6U Expired - Fee Related CN204498091U (en) | 2015-04-21 | 2015-04-21 | A kind of timer circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204498091U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112564680A (en) * | 2020-12-09 | 2021-03-26 | 杭州乾龙电器有限公司 | Power-on time delay hardware automatic reset circuit |
-
2015
- 2015-04-21 CN CN201520266956.6U patent/CN204498091U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112564680A (en) * | 2020-12-09 | 2021-03-26 | 杭州乾龙电器有限公司 | Power-on time delay hardware automatic reset circuit |
| CN112564680B (en) * | 2020-12-09 | 2023-10-20 | 杭州乾龙电器有限公司 | Automatic reset circuit for power-on time-delay hardware |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150722 Termination date: 20160421 |
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| CF01 | Termination of patent right due to non-payment of annual fee |