CN204334297U - A kind of power-supply system - Google Patents

A kind of power-supply system Download PDF

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Publication number
CN204334297U
CN204334297U CN201420843179.2U CN201420843179U CN204334297U CN 204334297 U CN204334297 U CN 204334297U CN 201420843179 U CN201420843179 U CN 201420843179U CN 204334297 U CN204334297 U CN 204334297U
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China
Prior art keywords
tube
resistance
power
termination
circuit
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Expired - Fee Related
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CN201420843179.2U
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Chinese (zh)
Inventor
王文建
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Hangzhou Kuanfu Technology Co Ltd
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Hangzhou Kuanfu Technology Co Ltd
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Abstract

The utility model discloses a kind of power-supply system.Power-supply system comprises error amplifier, pulse-width modulation circuit, drive circuit, power tube, lock-in tube, energy storage inductor, filter capacitor, the first resistance, the second resistance, zero cross detection circuit and zero passage detection imbalance correction circuit. and the inductive current that prevents that the power-supply system utilizing the utility model to provide can carry out zero passage detection imbalance correction pours in down a chimney.

Description

A kind of power-supply system
Technical field
The utility model relates to zero passage detection technology, refers more particularly to zero passage detection imbalance correcting device.
Background technology
In the power supply system, when lock-in tube electric current decline close to zero time, because comparator has the existence of offset voltage, the moment of turning off lock-in tube has deviation, in inductance, electric current has and pours in down a chimney, in order to prevent avoiding this phenomenon caused due to offset voltage to occur, being provided with zero passage detection imbalance comparator and revising.
Summary of the invention
The utility model is intended to solve the deficiencies in the prior art, provides a kind of power-supply system preventing inductive current from pouring in down a chimney can carried out zero passage detection imbalance and revise.
Power-supply system, comprises error amplifier, pulse-width modulation circuit, drive circuit, power tube, lock-in tube, energy storage inductor, filter capacitor, the first resistance, the second resistance, zero cross detection circuit and zero passage detection imbalance correction circuit:
Described error amplifier amplifies the difference of the feedback voltage produced through described first resistance and described second electric resistance partial pressure and reference voltage V REF1;
Described pulse-width modulation circuit is the opening time carrying out regulating described power tube and described lock-in tube according to the height of the output of described error amplifier;
Described drive circuit drives described power tube and described lock-in tube;
Described power tube carries out energy storage to described energy storage inductor, and output current;
Described lock-in tube is in order to described energy storage inductor afterflow;
Described energy storage inductor carries out energy storage to the electric current that described power tube flows through, and carries out afterflow to the electric current that described lock-in tube flows through;
Described filter capacitor carries out filtering to the voltage that described energy storage inductor exports and produces direct voltage;
Described first resistance becomes dividing potential drop feedback resistance to be carry out dividing potential drop to output voltage to feed back to described error amplifier with described second resistor group;
Described zero cross detection circuit be be used for inductance freewheeling period detect inductive current whether drop to zero, when described lock-in tube electric current decline close to zero time, zero-crossing comparator output low level, closes described lock-in tube, prevents electric current in inductance from pouring in down a chimney;
Described zero passage detection imbalance correction circuit carries out offset voltage correction to described zero cross detection circuit.
One end of first resistance described in the negative input termination of described error amplifier and one end of described second resistance, positive input termination reference voltage V REF1, exports pulse-width modulation circuit described in termination;
The output of error amplifier described in the input termination of described pulse-width modulation circuit, exports drive circuit described in termination;
The output of pulse-width modulation circuit and the output of described zero cross detection circuit described in one input termination of described drive circuit, the grid of power tube described in an output termination, another exports the grid of lock-in tube described in termination;
The grid of described power tube connects described drive circuit, and source electrode meets input power VCC, and drain electrode connects one end of described energy storage inductor and the drain electrode of described zero passage detection imbalance correction circuit and described zero cross detection circuit and described lock-in tube;
The grid of described lock-in tube connects another output of described drive circuit, source ground, and drain electrode connects the drain electrode of described power tube and one end of described zero cross detection circuit and described zero passage detection imbalance correction circuit and described energy storage inductor;
The drain electrode of power tube described in one termination of described energy storage inductor and the drain electrode of described lock-in tube and described zero cross detection circuit and described zero passage detection imbalance correction circuit, one end of the output of another termination power-supply system and one end of described filter capacitor and described first resistance, the other end ground connection of described filter capacitor;
The output of one termination power-supply system of described first resistance and one end of described energy storage inductor, one end of the second resistance described in another termination and the negative input end of described error amplifier, the other end ground connection of described second resistance;
Described zero cross detection circuit comprises zero-crossing comparator offset voltage and zero-crossing comparator:
One end of the drain electrode of power tube and the drain electrode of described lock-in tube and described energy storage inductor described in the positive input termination of described zero-crossing comparator and described zero passage detection imbalance correction circuit, negative input end connects the output of described zero passage detection imbalance correction circuit by described zero-crossing comparator offset voltage, output is synchronously controlled described by described drive circuit, when output is low level, described lock-in tube is closed;
Described zero-crossing comparator offset voltage is the offset voltage of zero-crossing comparator, due to the existence of offset voltage, zero passage detection can be caused inaccurate, and electric current in inductance will be made like this to pour in down a chimney, and exports unstable; When the output of described zero-crossing comparator is low level, close described lock-in tube, prevent electric current in inductance from pouring in down a chimney;
Described zero passage detection imbalance correction circuit comprises the first current source I, comparator, the first NMOS tube and the 3rd resistance:
The one termination power VCC of described first current source I, the drain electrode of the first NMOS tube described in another termination;
One end of the drain electrode of zero cross detection circuit and described power tube and the drain electrode of described lock-in tube and described energy storage inductor described in the negative input termination of described comparator, positive input termination reference voltage V REF2, exports the grid of the first NMOS tube described in termination;
The grid of described first NMOS tube connects the output of described comparator, and drain electrode meets described first current source I, and source electrode connects one end of described 3rd resistance and described zero cross detection circuit;
The source electrode of the first NMOS tube described in one termination of described 3rd resistance and described zero cross detection circuit, other end ground connection;
The drain voltage of described comparator to the reference voltage V REF2 arranged and described lock-in tube compares, when the drain voltage of described lock-in tube is reduced to below reference voltage V REF2, described comparator exports high level and makes described first NMOS tube conducting, there is electric current to flow down on described 3rd resistance, to produce voltage and described zero-crossing comparator offset voltage is compensated for offsetting offset voltage, preventing described zero-crossing comparator from causing can not detecting during the reverse direction current flow due to described lock-in tube because there being the existence of described zero-crossing comparator offset voltage.
Input power VCC passes through described power tube to described energy storage inductor output current, the feedback voltage that output voltage VO UT obtains through described first resistance and described second electric resistance partial pressure and reference voltage V REF1 amplify through described error amplifier the duty ratio that the error voltage signal obtained determines the pulse that described pulse-width modulation circuit exports, thus determine inductive current; When described power tube turns off, afterflow is carried out in described lock-in tube conducting, until described Zero-cross comparator testing circuit detects that the electric current of described energy storage inductor is reverse, the comparator of described zero cross detection circuit exports as low level, closes described lock-in tube; The change of feedback voltage will cause the change driving described power tube signal dutyfactor by described error amplifier, thus controls the conducting of described power tube and deadline to reach the object of voltage stabilizing.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of power-supply system of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model content is further illustrated.
Power-supply system, as shown in Figure 1, error amplifier 101, pulse-width modulation circuit 102, drive circuit 103, power tube 104, lock-in tube 105, energy storage inductor 106, filter capacitor 107, first resistance 108, second resistance 109, zero cross detection circuit 110 and zero passage detection imbalance correction circuit 200 is comprised:
Described error amplifier 101 amplifies the difference of the feedback voltage produced through described first resistance 108 and described second resistance 109 dividing potential drop and reference voltage V REF1;
Described pulse-width modulation circuit 102 is the opening times carrying out regulating described power tube 104 and described lock-in tube 105 according to the height of the output of described error amplifier 101;
Described drive circuit 103 drives described power tube 104 and described lock-in tube 105;
Described power tube 104 carries out energy storage to described energy storage inductor 106, and output current;
Described lock-in tube 105 is in order to the afterflow of described energy storage inductor 106;
Described energy storage inductor 106 carries out energy storage to the electric current that described power tube 104 flows through, and carries out afterflow to the electric current that described lock-in tube 105 flows through;
Described filter capacitor 107 carries out filtering to the voltage that described energy storage inductor 106 exports and produces direct voltage;
It is carry out dividing potential drop to output voltage to feed back to described error amplifier 101 that described first resistance 108 and described second resistance 109 form dividing potential drop feedback resistance;
Described zero cross detection circuit 110 be be used for inductance freewheeling period detect inductive current whether drop to zero, when described lock-in tube 105 electric current decline close to zero time, zero-crossing comparator output low level, closes described lock-in tube 105, prevents electric current in inductance from pouring in down a chimney;
Described zero passage detection imbalance correction circuit 200 carries out offset voltage correction to described zero cross detection circuit 110.
One end of first resistance 108 described in the negative input termination of described error amplifier 101 and one end of described second resistance 109, positive input termination reference voltage V REF1, exports pulse-width modulation circuit 102 described in termination;
The output of error amplifier 101 described in the input termination of described pulse-width modulation circuit 102, exports drive circuit 103 described in termination;
The output of pulse-width modulation circuit 102 and the output of described zero cross detection circuit 110 described in one input termination of described drive circuit 103, the grid of power tube 104 described in an output termination, another exports the grid of lock-in tube 105 described in termination;
The grid of described power tube 104 connects described drive circuit 103, and source electrode meets input power VCC, and drain electrode connects one end of described energy storage inductor 106 and the drain electrode of described zero passage detection imbalance correction circuit 200 and described zero cross detection circuit 110 and described lock-in tube 105;
The grid of described lock-in tube 105 connects another output of described drive circuit 103, source ground, and drain electrode connects the drain electrode of described power tube 104 and one end of described zero cross detection circuit 110 and described zero passage detection imbalance correction circuit 200 and described energy storage inductor 106;
The drain electrode of power tube 104 described in one termination of described energy storage inductor 106 and the drain electrode of described lock-in tube 105 and described zero cross detection circuit 110 and described zero passage detection imbalance correction circuit 200, one end of the output of another termination power-supply system and one end of described filter capacitor 107 and described first resistance 108, the other end ground connection of described filter capacitor 107;
The output of one termination power-supply system of described first resistance 108 and one end of described energy storage inductor 106, one end of the second resistance 109 described in another termination and the negative input end of described error amplifier 101, the other end ground connection of described second resistance 109;
Described zero cross detection circuit 110 comprises zero-crossing comparator offset voltage 111 and zero-crossing comparator 112:
One end of the drain electrode of power tube 104 and the drain electrode of described lock-in tube 105 and described energy storage inductor 106 described in the positive input termination of described zero-crossing comparator 112 and described zero passage detection imbalance correction circuit 200, negative input end connects the output of described zero passage detection imbalance correction circuit 200 by described zero-crossing comparator offset voltage 111, output is controlled described synchronous 105 by described drive circuit 103, when output is low level, described lock-in tube 105 is closed;
Described zero-crossing comparator offset voltage 111 is offset voltages of zero-crossing comparator 112, due to the existence of offset voltage, zero passage detection can be caused inaccurate, and electric current in inductance will be made like this to pour in down a chimney, and exports unstable; When the output of described zero-crossing comparator 112 is low level, close described lock-in tube 105, prevent electric current in inductance from pouring in down a chimney;
Described zero passage detection imbalance correction circuit 200 comprises the first current source I, comparator 201, first NMOS tube 202 and the 3rd resistance 203:
The one termination power VCC of described first current source I, the drain electrode of the first NMOS tube 202 described in another termination;
One end of the drain electrode of zero cross detection circuit 110 and described power tube 104 and the drain electrode of described lock-in tube 105 and described energy storage inductor 106 described in the negative input termination of described comparator 201, positive input termination reference voltage V REF2, exports the grid of the first NMOS tube 202 described in termination;
The grid of described first NMOS tube 202 connects the output of described comparator 201, and drain electrode meets described first current source I, and source electrode connects one end and the described zero cross detection circuit 110 of described 3rd resistance 203;
The source electrode of the first NMOS tube 202 described in one termination of described 3rd resistance 203 and described zero cross detection circuit 110, other end ground connection;
The drain voltage of described comparator 201 to the reference voltage V REF2 arranged and described lock-in tube 105 compares, when the drain voltage of described lock-in tube 105 is reduced to below reference voltage V REF2, described comparator 201 exports high level and makes described first NMOS tube 202 conducting, there is electric current to flow down on described 3rd resistance 203, to produce voltage and compensate for offsetting offset voltage to described zero-crossing comparator offset voltage 111, prevent described zero-crossing comparator 112 from causing can not detecting during the reverse direction current flow due to described lock-in tube 105 because there being the existence of described zero-crossing comparator offset voltage 111.
Input power VCC passes through described power tube 104 to described energy storage inductor 106 output current, the feedback voltage that output voltage VO UT obtains through described first resistance 108 and described second resistance 109 dividing potential drop and reference voltage V REF1 amplify through described error amplifier 101 duty ratio that the error voltage signal obtained determines the pulse that described pulse-width modulation circuit 102 exports, thus determine inductive current; When described power tube 104 turns off, afterflow is carried out in the conducting of described lock-in tube 105, until described Zero-cross comparator testing circuit 110 detects that the electric current of described energy storage inductor 106 is reverse, the comparator 112 of described zero cross detection circuit 110 exports as low level, closes described lock-in tube 105; The change of feedback voltage will cause the change driving described power tube 104 signal dutyfactor by described error amplifier 101, thus controls the conducting of described power tube 104 and deadline to reach the object of voltage stabilizing.

Claims (1)

1. power-supply system, comprise error amplifier, pulse-width modulation circuit, drive circuit, power tube, lock-in tube, energy storage inductor, filter capacitor, the first resistance, the second resistance, zero cross detection circuit and zero passage detection imbalance correction circuit, it is characterized in that described zero passage detection imbalance correction circuit comprises the first current source I, comparator, the first NMOS tube and the 3rd resistance:
The one termination power VCC of described first current source I, the drain electrode of the first NMOS tube described in another termination;
One end of the drain electrode of zero cross detection circuit and described power tube and the drain electrode of described lock-in tube and described energy storage inductor described in the negative input termination of described comparator, positive input termination reference voltage V REF2, exports the grid of the first NMOS tube described in termination;
The grid of described first NMOS tube connects the output of described comparator, and drain electrode meets described first current source I, and source electrode connects one end of described 3rd resistance and described zero cross detection circuit;
The source electrode of the first NMOS tube described in one termination of described 3rd resistance and described zero cross detection circuit, other end ground connection.
CN201420843179.2U 2014-12-25 2014-12-25 A kind of power-supply system Expired - Fee Related CN204334297U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420843179.2U CN204334297U (en) 2014-12-25 2014-12-25 A kind of power-supply system

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Application Number Priority Date Filing Date Title
CN201420843179.2U CN204334297U (en) 2014-12-25 2014-12-25 A kind of power-supply system

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CN204334297U true CN204334297U (en) 2015-05-13

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115864343A (en) * 2023-03-03 2023-03-28 珠海智融科技股份有限公司 Current limiting circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115864343A (en) * 2023-03-03 2023-03-28 珠海智融科技股份有限公司 Current limiting circuit
CN115864343B (en) * 2023-03-03 2023-05-23 珠海智融科技股份有限公司 Current limiting circuit

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150513

Termination date: 20151225

EXPY Termination of patent right or utility model