CN204302407U - A kind of super high band RFID test macro - Google Patents
A kind of super high band RFID test macro Download PDFInfo
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- CN204302407U CN204302407U CN201420703461.0U CN201420703461U CN204302407U CN 204302407 U CN204302407 U CN 204302407U CN 201420703461 U CN201420703461 U CN 201420703461U CN 204302407 U CN204302407 U CN 204302407U
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Abstract
The utility model relates to electronic label technology field, particularly about a kind of super high band RFID test macro, comprise controller for generating content measurement, and the communication data receiving fpga chip is analyzed; Communication connection between controller and fpga chip can be used for by reprovision I/O unit; Fpga chip is used for generating test instruction according to content measurement, communicates with super high band electronic tag; First upconverter and the second upconverter are used for the test instruction of low frequency being converted to the superfrequency radiofrequency signal being sent to super high band electronic tag; The superfrequency answer signal that the super high band electronic tag received sends is converted to low-frequency digital signal by the second low-converter and the first low-converter, and low-frequency digital signal is sent to fpga chip.By the system of the utility model embodiment, can be tested for superfrequency RFID by the introducing of fpga chip and multiple upconverter and low-converter.
Description
Technical field
The utility model relates to electronic label technology field, particularly about a kind of super high band RFID test macro.
Background technology
RFID is the abbreviation of the English (Radio Frequency Identification, RFID) of REID, also known as electronic tag.REID is a kind of automatic identification technology starting the nineties in 20th century to rise, and utilizes radiofrequency signal to realize contactless information transmission and pass through transmitted information reaching identifying purpose by Space Coupling (alternating magnetic field or electromagnetic field).
REID, by automatically identifying assets and image data, for production and administration provides accurately real-time information, thus reaches the object that simple flow raises the efficiency.RFID label tag can support that fast reading and writing, non-visual recognition, mobile identifications, multi-targets recognition, status and long-term follow manage, in logistics management, false proof, transport information, industrial automation, have important application.At present, China is using the key data acquisition mode one of of RFID technique as Internet of Things collection tube Ore-controlling Role.RFID assets follow the trail of, administer and maintain in there is irreplaceable value, various fields has had the RFID application of relative maturity, constantly bringing forth new ideas in recent years along with RFID technique, more application is implemented, and the tracking function of RFID is expanding in increasing Asset Type.
Rapidly, application gets more and more, and adheres to the label extensive use of product surface in RFID technique development.But in the application of different field, some article material can be larger on the impact of RFID label tag.Such as in many applications, RFID label tag needs to be attached to metal object surface, but there is the problem of the strong or impaired performance of discernment for the metal of overlay coating.
This is because, when RFID label tag is applied to metal surface, because electromagnetic wave can by metallic reflection, its impedance matching, radiation efficiency and radiation direction all can change, thus cause the degradation of ordinary electronic label, reading/writing distance shortens, and even cannot be correctly validated in metal surface.
Flexible anti-metal tag adopts superfrequency REID to be the RFID that adaptive Curved surface metal material article design, in electric power measure device (especially transformer) calibrating, delivery management, asset management etc., application prospect is extensive, for research and development and the production of satisfied flexible anti-metal tag, need design or introduce a kind of reliability test system for this type of label.
According to demand, the key project such as interface protocol, data rate, operating temperature, working relative humidity, reading/writing distance, vibration, impact, collision, security, Electro Magnetic Compatibility that content measurement generally comprises read write line is tested, and tests the operating frequency of electronic tag, air interface protocol, modulation system, memory capacity, working environment, anti-ray, anti-alternating electromagnetic field, shock resistance, mechanical oscillation, free-electron model, the key project such as antistatic simultaneously; And under actual application environment, carry out the interoperation test of read write line and label, the operational effect of further verification system.
The reliability testing of label is mainly uniformity test, radio frequency testing is most important content measurement, as the reading and writing data etc. under RF envelope test, testing response time and different modulating parameter and coded system, to verify whether the radio-frequency performance of RFID label tag meets standard.The impact of chip design, the impact of manufacturing process or be the different antenna of different classes of product design, capital causes the radio-frequency performance of RFID label tag to change, therefore must test the radio-frequency performance of this product, to ensure that its RF index meets the requirement of RFID radio frequency standard in research and development and production process.
Host Based test macro is applicable to low frequency RFID tag, adopts vector signal generator and VSA as radio frequency instrument, adopts embedded controller as command generator and response analysis instrument.
Flexible anti-metal tag meets superfrequency RFID technique standard, and need between responder and label, set up Microsecond grade real-time communication, existing technology can not meet the communication frequency of superfrequency RFID label tag.
Utility model content
In order to solve the problem cannot tested superfrequency RFID in prior art, propose a kind of super high band RFID test macro, can be tested for superfrequency RFID by the introducing of fpga chip and multiple upconverter and low-converter.
The utility model embodiment provides a kind of super high band RFID test macro, comprises controller, can reprovision I/O unit, fpga chip, first upconverter, digital/analog converter, the second upconverter, first low-converter, analog/digital converter, the second low-converter;
Described controller is for generating content measurement, and the communication data receiving described fpga chip is analyzed;
Describedly can be used for communication connection between described controller and described fpga chip by reprovision I/O unit;
Described fpga chip is used for generating test instruction according to described content measurement, communicates with super high band electronic tag;
Described first upconverter is used for the test instruction of low frequency to be converted to digital intermediate frequency signal;
Described digital intermediate frequency signal is converted to analog signal by described digital/analog converter;
Described analog signal is converted to the superfrequency radiofrequency signal being sent to described super high band electronic tag by described second upconverter;
The superfrequency answer signal that the described super high band electronic tag received sends is converted to intermediate frequency answer signal by described second low-converter;
Described intermediate frequency answer signal is converted to digital intermediate frequency signal by described analog/digital converter;
Described medium-high frequency data signal is converted to low-frequency digital signal by described first low-converter, and described low-frequency digital signal is sent to described fpga chip.
A further aspect of a kind of super high band RFID test macro according to the utility model embodiment, described fpga chip comprises modulator further, described modulator comprises data input module further, carrier generation block, amplitude modulation(PAM) module, single sideband filter, selector, output module;
Wherein said data input module and described carrier generation block are connected with described amplitude modulation(PAM) module respectively, described amplitude modulation(PAM) module is connected with described single sideband filter, described amplitude modulation(PAM) module is connected with described selector respectively with described single sideband filter, and described selector is connected with described output module;
Described data input module receives described test instruction, and described carrier generation block produces the sinusoidal carrier needed for modulation, and described test command and described sinusoidal carrier are carried out computing by described amplitude modulation(PAM) module, obtain modulation signal; The modulation signal that described amplitude modulation(PAM) module exports is carried out monolateral filtering by described single sideband filter, and by the selection of described selector, described modulation signal or described monolateral filtered modulation signal export by described output module.
Another further aspect of a kind of super high band RFID test macro according to the utility model embodiment, described fpga chip comprises demodulator further, and described demodulator comprises signal input module further, signal processing module, comparator, demodulation judge module, output module;
Described signal input module receives the digital intermediate frequency signal that described first low-converter 107 sends, described signal processing module processes described digital intermediate frequency signal, the phase information of the digital intermediate frequency signal after described comparator obtains described process is exported to described controller and is analyzed, described demodulation judge module judges the demodulation mode of the digital intermediate frequency signal after described process, and demodulation is carried out to the digital intermediate frequency signal after described process, obtain the digital intermediate frequency signal after demodulation, by described output module, the digital intermediate frequency signal after described demodulation is exported.
By the system of the utility model embodiment, can be tested for superfrequency RFID by the introducing of fpga chip and multiple upconverter and low-converter, and do not need to rely on and test with extra read-write equipment, achieve and use same system just can test the RFID label tag of various criterion.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the utility model embodiment, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.In the accompanying drawings:
Figure 1 shows that the structural representation of a kind of super high band RFID of the utility model embodiment test macro;
Figure 2 shows that the structural representation of modulator in the utility model embodiment F PGA chip;
Figure 3 shows that the structural representation of demodulator in the utility model embodiment F PGA chip.
Detailed description of the invention
For making the object of the utility model embodiment, technical scheme and advantage clearly understand, below in conjunction with accompanying drawing, the utility model embodiment is described in further details.At this, schematic description and description of the present utility model for explaining the utility model, but not as to restriction of the present utility model.
Be illustrated in figure 1 the structural representation of a kind of super high band RFID of the utility model embodiment test macro.
Comprise controller 101, can reprovision I/O unit 102, fpga chip 103, first upconverter 104, digital/analog converter (DAC) 105, second upconverter 106, first low-converter 107, analog/digital converter (ADC) 108, second low-converter 109.
Described controller 101 is for generating content measurement, and the communication data receiving described fpga chip 103 is analyzed;
Described can reprovision I/O unit 102 for the communication connection between described controller 101 and described fpga chip 103;
Described fpga chip 103, for generating test instruction according to described content measurement, communicates with super high band electronic tag; The frequency data signal that fpga chip exports is generally tens to hundreds of KHz.
Described first upconverter 104 is for being converted to digital intermediate frequency signal by the test instruction of low frequency; The frequency of described digital intermediate frequency signal can be 20MHz;
Described digital intermediate frequency signal is converted to analog signal by described digital/analog converter (DAC) 105;
Described analog signal is converted to the superfrequency radiofrequency signal being sent to described super high band electronic tag by described second upconverter 106; The frequency of described superfrequency radiofrequency signal can be 800MHz to 1GHz.
The superfrequency answer signal that the described super high band electronic tag received sends is converted to intermediate frequency answer signal by described second low-converter 109; The frequency of described superfrequency radiofrequency signal can be 800MHz to 1GHz.
Described intermediate frequency answer signal is converted to digital intermediate frequency signal by described analog/digital converter (ADC) 108; The frequency of described superfrequency radiofrequency signal can be 800MHz to 1GHz.
Described digital intermediate frequency signal is converted to low-frequency digital signal by described first low-converter 107, and described low-frequency digital signal is sent to described fpga chip 103.The frequency of described low-frequency digital signal is generally tens to hundreds of KHz.
According to an embodiment of the present utility model, described fpga chip 103 comprises modulator further, and described modulator comprises data input module further, carrier generation block, amplitude modulation(PAM) module, single sideband filter, selector, output module;
Wherein said data input module and described carrier generation block are connected with described amplitude modulation(PAM) module respectively, described amplitude modulation(PAM) module is connected with described single sideband filter, described amplitude modulation(PAM) module is connected with described selector respectively with described single sideband filter, and described selector is connected with described output module;
Described data input module receives described test instruction, and described carrier generation block produces the sinusoidal carrier needed for modulation, and described test command and described sinusoidal carrier are carried out computing by described amplitude modulation(PAM) module, obtain modulation signal; The modulation signal that described amplitude modulation(PAM) module exports is carried out monolateral filtering by described single sideband filter, and by the selection of described selector, described modulation signal or described monolateral filtered modulation signal export by described output module.
According to an embodiment of the present utility model, described fpga chip 103 comprises demodulator further, and described demodulator comprises signal input module further, signal processing module, comparator, demodulation judge module, output module;
Described signal input module receives the digital intermediate frequency signal that described first low-converter 107 sends, described signal processing module processes described digital intermediate frequency signal, the homophase of input and orthogonal (IQ:Inphase and quadrature) signal are become absolute value, described comparator is utilized to obtain the phase information of the orthogonal I/Q signal of two-way, for controller analysis, described demodulation judge module judges the demodulation mode of the digital intermediate frequency signal after described process, and demodulation is carried out to the digital intermediate frequency signal after described process, obtain the digital intermediate frequency signal after demodulation, by described output module, the digital intermediate frequency signal after described demodulation is exported.
According to an embodiment of the present utility model, described signal processing module comprises 2 squarers further, becomes absolute value respectively by squared for orthogonal for the two-way of input I/Q signal.
By the system of the utility model embodiment, can be tested for superfrequency RFID by the introducing of fpga chip and multiple upconverter and low-converter, and do not need to rely on and test with extra read-write equipment, achieve and use same system just can test the RFID label tag of various criterion.
User is by option input in the controller, can test for the RFID of different agreement, fpga chip generates the test instruction being adapted to specific protocol according to the configuration parameter prestored in the option of controller and chip, described configuration parameter comprises the RFID of various criterion, and modulation system, modulation parameter and coded system, realize the various tests from physical layer to protocol layer, can also expand and support self-defining instruction set, thus support the RFID product that different vendor produces.
For EPC Class 1Gen 2 agreement, namely whole real-time communication (Inventory) process all completes in 1.8 milliseconds, wherein contain 3 instructions and 3 responses, namely content measurement selected by controller, fpga chip generates Query (instruction), improved the frequency of test instruction by first and second upconverter, be transmitted into superfrequency electronic tag by radio-frequency antenna; Described superfrequency electronic tag feedback response (RN16,16 random numbers); System receives described response by radio-frequency antenna, and by first and second low-converter, the response of described superfrequency is mixed down to intermediate frequency, then ACK (instruction) is generated by fpga chip for this response, comprise fpga chip at this ACK to decode 16 random numbers obtained, then launched after described ACK raising frequency to superfrequency by radio-frequency antenna by first and second upconverter; After described superfrequency electronic tag receives ACK, verify that whether 16 random numbers are correct, then return PC+EPC+CRC16 (response); After system acceptance to above-mentioned response, by first and second low-converter, the response of superfrequency is reduced to intermediate frequency, then to be decoded described response and produce corresponding test instruction ReqRN (instruction) by fpga chip, by first and second upconverter, described instruction is sent to superfrequency electronic tag by radio-frequency antenna; After described superfrequency electronic tag receives described instruction, produce Handle (response) and feed back to system.During this period, fpga chip carries out data in communication process and parameter all by can described controller be sent to analyze by reprovision I/O unit.
According to its standard, 16 random numbers in the response of last bar correctly must be comprised in ACK instruction, and reaction time T2 should (about a few microsecond be to tens microseconds within 3-20Tpri, such as 4.5 microseconds), otherwise communication will be failed, therefore the mode adopting the modes such as computer to generate instruction in advance cannot complete real-time communication, and test macro must have the ability generating instruction within the extremely short time in real time.Have employed the combination that plate carries fpga chip and multiple upconverter and low-converter, can ultrahigh speed processing capability in real time, in standard official hour, complete the demodulation of response, decoding, random number is extracted, the coding of instruction, random number embed, the overall process of modulation.
Be illustrated in figure 2 the structural representation of modulator in the utility model embodiment F PGA chip.
Figure comprises data input module 201, carrier generation block 202, amplitude modulation(PAM) module 203, single sideband filter 204, selector 205, output module 206.
Described data input module 201 receives the test instruction that prime functional module exports, namely the test parameter needed for current content measurement, test command and communication process etc. all need to generate signal of communication by the modulation of this modulator and communicate with superfrequency electronic tag, described carrier generation block 202 produces the sinusoidal carrier needed for modulation, described test command and described sinusoidal carrier are carried out computing by described amplitude modulation(PAM) module 203, obtain modulation signal; The modulation signal that described amplitude modulation(PAM) module exports is carried out monolateral filtering by described single sideband filter 204, and by the selection of described selector 205, described modulation signal or described monolateral filtered modulation signal export by described output module.
Be illustrated in figure 3 the structural representation of demodulator in the utility model embodiment F PGA chip.
Comprise signal input module 301, signal processing module 302, comparator 303, demodulation judge module 304, output module 305.
Described signal input module 301 receives the digital intermediate frequency signal that described first low-converter sends, this digital intermediate frequency signal is that the answer signal sent by superfrequency electronic tag to be measured is obtained by frequency reducing, described signal processing module 302 processes described digital intermediate frequency signal, by two squarers, described digital intermediate frequency signal (I/Q signal) is processed in this example, obtain the absolute value of this I/Q signal, described comparator 303 compares Output rusults respectively, obtain the phase information of I/Q signal and feed back to controller analysis, described demodulation judge module 304 judges the demodulation mode of the digital intermediate frequency signal after described process, call corresponding agreement or parameter carries out demodulation to the digital intermediate frequency signal after described process, obtain the digital intermediate frequency signal after demodulation, by described output module 305, the digital intermediate frequency signal after described demodulation is outputted to rear class functional module to process, it is corresponding that described rear class process can comprise response message, such as, response in the communication processes such as aforesaid ACK.
By the system of the utility model embodiment, can be tested for superfrequency RFID by the introducing of fpga chip and multiple upconverter and low-converter, and do not need to rely on and test with extra read-write equipment, achieve and use same system just can test the RFID label tag of various criterion.
Above-described specific embodiment; the purpose of this utility model, technical scheme and beneficial effect are further described; be understood that; the foregoing is only specific embodiment of the utility model; and be not used in restriction protection domain of the present utility model; all within spirit of the present utility model and principle, any amendment made, equivalent replacement, improvement etc., all should be included within protection domain of the present utility model.
Claims (3)
1. a super high band RFID test macro, is characterized in that,
Comprise controller, can reprovision I/O unit, fpga chip, the first upconverter, digital/analog converter, the second upconverter, the first low-converter, analog/digital converter, the second low-converter;
Described controller is for generating content measurement, and the communication data receiving described fpga chip is analyzed;
Describedly can be used for communication connection between described controller and described fpga chip by reprovision I/O unit;
Described fpga chip is used for generating test instruction according to described content measurement, communicates with super high band electronic tag;
Described first upconverter is used for the test instruction of low frequency to be converted to digital intermediate frequency signal;
Described digital intermediate frequency signal is converted to analog signal by described digital/analog converter;
Described analog signal is converted to the superfrequency radiofrequency signal being sent to described super high band electronic tag by described second upconverter;
The superfrequency answer signal that the described super high band electronic tag received sends is converted to intermediate frequency answer signal by described second low-converter;
Described intermediate frequency answer signal is converted to digital intermediate frequency signal by described analog/digital converter;
Described medium-high frequency data signal is converted to low-frequency digital signal by described first low-converter, and described low-frequency digital signal is sent to described fpga chip.
2. a kind of super high band RFID test macro according to claim 1, it is characterized in that, described fpga chip comprises modulator further, described modulator comprises data input module further, carrier generation block, amplitude modulation(PAM) module, single sideband filter, selector, output module;
Wherein said data input module and described carrier generation block are connected with described amplitude modulation(PAM) module respectively, described amplitude modulation(PAM) module is connected with described single sideband filter, described amplitude modulation(PAM) module is connected with described selector respectively with described single sideband filter, and described selector is connected with described output module;
Described data input module receives described test instruction, and described carrier generation block produces the sinusoidal carrier needed for modulation, and described test command and described sinusoidal carrier are carried out computing by described amplitude modulation(PAM) module, obtain modulation signal; The modulation signal that described amplitude modulation(PAM) module exports is carried out monolateral filtering by described single sideband filter, and by the selection of described selector, described modulation signal or described monolateral filtered modulation signal export by described output module.
3. a kind of super high band RFID test macro according to claim 1, it is characterized in that, described fpga chip comprises demodulator further, described demodulator comprises signal input module further, signal processing module, comparator, demodulation judge module, output module;
Described signal input module receives the digital intermediate frequency signal that described first low-converter sends, described signal processing module processes described digital intermediate frequency signal, the phase information of the digital intermediate frequency signal after described comparator obtains described process is exported to described controller and is analyzed, described demodulation judge module judges the demodulation mode of the digital intermediate frequency signal after described process, and demodulation is carried out to the digital intermediate frequency signal after described process, obtain the digital intermediate frequency signal after demodulation, by described output module, the digital intermediate frequency signal after described demodulation is exported.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104360199A (en) * | 2014-11-21 | 2015-02-18 | 国家电网公司 | Ultrahigh-frequency-band RFID testing system |
| CN110008765A (en) * | 2018-01-05 | 2019-07-12 | 三星电子株式会社 | Test device, test macro, test method and the method for manufacturing integrated circuit |
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2014
- 2014-11-21 CN CN201420703461.0U patent/CN204302407U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104360199A (en) * | 2014-11-21 | 2015-02-18 | 国家电网公司 | Ultrahigh-frequency-band RFID testing system |
| CN110008765A (en) * | 2018-01-05 | 2019-07-12 | 三星电子株式会社 | Test device, test macro, test method and the method for manufacturing integrated circuit |
| CN110008765B (en) * | 2018-01-05 | 2024-02-02 | 三星电子株式会社 | Test apparatus, test system, test method, and method of manufacturing integrated circuit |
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