CN204258996U - A kind of low delay high definition encoder of multitone video interface - Google Patents

A kind of low delay high definition encoder of multitone video interface Download PDF

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Publication number
CN204258996U
CN204258996U CN201420781356.9U CN201420781356U CN204258996U CN 204258996 U CN204258996 U CN 204258996U CN 201420781356 U CN201420781356 U CN 201420781356U CN 204258996 U CN204258996 U CN 204258996U
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interface
high definition
low delay
multitone
input interface
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CN201420781356.9U
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Chinese (zh)
Inventor
刘波
宁自力
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Chengdu German core digital Polytron Technologies Inc
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CHENGDU DEXIN DIGITAL TECHNOLOGY Co Ltd
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Abstract

The utility model provides a kind of low delay high definition encoder of multitone video interface, comprise FPGA/CPU processing module, coding module, OSD image processing module and power module, audio input interface comprises SDI interface and HDMI, and video input interface comprises SDI interface and HDMI.Described audio input interface also comprises YPbPr interface, and described video input interface also comprises AES interface.Multitone video input interface, applied range, adapts to day by day complicated network environment demand; Reduce encoding time delay, meet the problem of the real-time coding of high-definition digital program; Adopt independent 5V power supply, for coding module is powered, solve coding module electricity shortage and the weak problem of antijamming capability.

Description

A kind of low delay high definition encoder of multitone video interface
Technical field
The utility model relates to a kind of low delay high definition encoder of multitone video interface, particularly relates to a kind of broadcast television industry audio/video coder.
Background technology
1, traditional digital television encoder adopts single chip solution, and input interface is single, there is range of application little, the difficult network environment demand adapting to complexity day by day.
2, along with the development of Digital Television industry, in digital TV in high resolution on-the-spot broadcasting business, it is large to there is encoding time delay in existing encoder, is difficult to the problem of the real-time coding meeting high-definition digital program.
3, conventional codec is when input source switches fast, owing to not having corresponding safeguard procedures, easily occurs picture flower screen, the problems such as encoder deadlock.
Utility model content
The technical problems to be solved in the utility model is to provide a kind of encoder of multitone video interface, and the technical problem of its secondary solution is to provide the low encoder of a kind of time delay.
The technical solution adopted in the utility model is as follows: a kind of low delay high definition encoder of multitone video interface, comprise FPGA/CPU processing module, coding module, OSD image processing module and power module, audio input interface comprises SDI interface and HDMI, video input interface comprises SDI interface and HDMI, it is characterized in that, described audio input interface also comprises YPbPr interface, and described video input interface also comprises AES interface.
As preferably, described audio input interface also comprises CVBS interface.
As preferably, described video input interface also comprises RCA interface.
As preferably, described video input interface also comprises XLR interface.
As preferably, described coding module adopts Magnum D7Pro coding chip.
As preferably, described coding module adopts independent 5V power supply.
As preferably, described SDI interface is connected to switch chip 74AVC16245 by GS2971 interface chip.
As preferably, described HDMI, YPbPr interface and CVBS interface are connected to switch chip 74AVC16245 by ADV7441 chip.
As preferably, described RCA interface and XLR interface are connected to switch chip 74AVC16245 by CS5368 chip.
Compared with prior art, the beneficial effects of the utility model are: multitone video input interface, applied range, adapt to day by day complicated network environment demand; Reduce encoding time delay, meet the problem of the real-time coding of high-definition digital program; Adopt independent 5V power supply, for coding module is powered, solve coding module electricity shortage and the weak problem of antijamming capability.
Accompanying drawing explanation
Fig. 1 is the principle schematic of the utility model wherein embodiment.
Fig. 2 be embodiment illustrated in fig. 1 in interface structure schematic diagram.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
Arbitrary feature disclosed in this specification (comprising any accessory claim, summary and accompanying drawing), unless specifically stated otherwise, all can be replaced by other equivalences or the alternative features with similar object.That is, unless specifically stated otherwise, each feature is an example in a series of equivalence or similar characteristics.
As shown in Figure 1, a kind of low delay high definition encoder of multitone video interface, comprise FPGA/CPU processing module, coding module, OSD image processing module and power module, audio input interface comprises SDI interface and HDMI, and video input interface comprises SDI interface and HDMI.As shown in Figure 2, described audio input interface also comprises YPbPr interface, and described video input interface also comprises AES interface.
In this specific embodiment, described audio input interface also comprises CVBS interface; Described video input interface also comprises RCA interface; Described video input interface also comprises XLR interface.Multitone video input interface, applied range, adapts to day by day complicated network environment demand.
In this specific embodiment, described coding module adopts Magnum D7Pro coding chip, Magnum D7Pro coding chip is a high-performance low delay coding chip, coding method adopts existing coding method that is that it carries or that match with it, reduce encoding time delay, meet the problem of the real-time coding of high-definition digital program.
In prior art, because coding module is with other module common sources, in generation, has carried out the phenomenon of electricity shortage, and during common source, antijamming capability is weak.In this specific embodiment, described coding module adopts independent 5V power supply to be that coding module is powered, and solves coding module electricity shortage and the weak problem of antijamming capability.
In addition, in this specific embodiment, described SDI interface is connected to switch chip 74AVC16245 by GS2971 interface chip; Described HDMI, YPbPr interface and CVBS interface are connected to switch chip 74AVC16245 by ADV7441 chip; Described RCA interface and XLR interface are connected to switch chip 74AVC16245 by CS5368 chip.

Claims (9)

1. the low delay high definition encoder of a multitone video interface, comprise FPGA/CPU processing module, coding module, OSD image processing module and power module, audio input interface comprises SDI interface and HDMI, video input interface comprises SDI interface and HDMI, it is characterized in that, described audio input interface also comprises YPbPr interface, and described video input interface also comprises AES interface.
2. the low delay high definition encoder of multitone video interface according to claim 1, is characterized in that, described audio input interface also comprises CVBS interface.
3. the low delay high definition encoder of multitone video interface according to claim 1, is characterized in that, described video input interface also comprises RCA interface.
4. the low delay high definition encoder of multitone video interface according to claim 3, is characterized in that, described video input interface also comprises XLR interface.
5. the low delay high definition encoder of multitone video interface according to claim 1, is characterized in that, described coding module adopts Magnum D7Pro coding chip.
6. the low delay high definition encoder of multitone video interface according to claim 1 or 5, it is characterized in that, described coding module adopts independent 5V power supply.
7. the low delay high definition encoder of multitone video interface according to claim 1, is characterized in that, described SDI interface is connected to switch chip 74AVC16245 by GS2971 interface chip.
8. the low delay high definition encoder of multitone video interface according to claim 2, is characterized in that, described HDMI, YPbPr interface and CVBS interface are connected to switch chip 74AVC16245 by ADV7441 chip.
9. the low delay high definition encoder of multitone video interface according to claim 4, is characterized in that, described RCA interface and XLR interface are connected to switch chip 74AVC16245 by CS5368 chip.
CN201420781356.9U 2014-12-12 2014-12-12 A kind of low delay high definition encoder of multitone video interface Active CN204258996U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111405213A (en) * 2020-03-24 2020-07-10 京东方科技集团股份有限公司 Interface access method, display device and electronic equipment
CN112532978A (en) * 2020-11-25 2021-03-19 中国电子科技集团公司第五十四研究所 High-performance audio and video coding device based on HEVC

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111405213A (en) * 2020-03-24 2020-07-10 京东方科技集团股份有限公司 Interface access method, display device and electronic equipment
US11812190B2 (en) 2020-03-24 2023-11-07 Boe Technology Group Co., Ltd. Interface access method, display apparatus and electronic device
CN112532978A (en) * 2020-11-25 2021-03-19 中国电子科技集团公司第五十四研究所 High-performance audio and video coding device based on HEVC

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee
CP01 Change in the name or title of a patent holder

Address after: 610046, No. 10, No. four, 12 Xing Wu Road, Chengdu, Sichuan, Wuhou District

Patentee after: Chengdu German core digital Polytron Technologies Inc

Address before: 610046, No. 10, No. four, 12 Xing Wu Road, Chengdu, Sichuan, Wuhou District

Patentee before: Chengdu Dexin Digital Technology Co., Ltd.

CU03 Correction of utility model patent gazette

Correction item: Patentee|Address

Correct: Chengdu core digital Polytron Technologies Inc|610046, No. 10, No. four, 12 Xing Wu Road, Chengdu, Sichuan, Wuhou District

False: Chengdu German core digital Polytron Technologies Inc|610046, No. 10, No. four, 12 Xing Wu Road, Chengdu, Sichuan, Wuhou District

Number: 21

Volume: 32

ERR Gazette correction