CN204089784U - The change code receiver of inverter controlling - Google Patents

The change code receiver of inverter controlling Download PDF

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Publication number
CN204089784U
CN204089784U CN201420511415.0U CN201420511415U CN204089784U CN 204089784 U CN204089784 U CN 204089784U CN 201420511415 U CN201420511415 U CN 201420511415U CN 204089784 U CN204089784 U CN 204089784U
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China
Prior art keywords
integrated package
code
inverter
decoding
decoding integrated
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Expired - Fee Related
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CN201420511415.0U
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Chinese (zh)
Inventor
郑敏芝
蒋丹
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Chongqing Zunlai Technology Co Ltd
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Chongqing Zunlai Technology Co Ltd
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Abstract

The change code receiver of inverter controlling, belong to electronic technology field, relate to a kind of change code receiver, especially a kind of change code receiver of inverter controlling, propose to launch with single ripple dicode a kind of dicode receiving circuit matched, realize the reception of " 1 " and " 0 " code twice change code that radiating portion sends, by radio frequency reception demodulation part, inverter becomes decoding circuit, performance element, decoding integrated package forms jointly, in an initial condition, the change code end of decoding integrated package is 1 signal, with send first time signal for high-order corresponding, the first time signal launched can be received, after decoding integrated package receives first time signal, first output has high pressure, the inverter that inverter is become in decoding circuit is anti-phase, decoding integrated package is made to become code end identical with the variation code of transmitting, so the different coded signal of second time can be received, second of decoding integrated package exports has voltage to export, start performance element, twice receiving course is not disorderly, launch for research dicode and create better condition.

Description

The change code receiver of inverter controlling
Technical field
This patent belongs to electronic technology field, relates to a kind of change code receiver, especially a kind of change code receiver of inverter controlling.
Background technology
Remote control coding lift-off technology, is a very wide range of electronic technology of a kind of application, occurs very widely in the life of the masses, the security and anti-theft as being used in almost car close the door with open the door on, the enabling being used in high quality anti-theft door with close the door upper etc.
The quality of the coding techniques direct relation remote control product of remote control, our unit once have developed the transmitting Decision Making of Line Schemes of multiple single ripple dicode, it is based on the 2262 coding integrated packages that are representative, utilize the advantage that it is cheap, promote its coding level of confidentiality degree, make its product in market competition, possess very large competitiveness, but also need multiple receiving circuit that can receive change code, therefore, special research can launch with single ripple dicode the receiving circuit mated, fit in it as a whole, the development for remote control product provides safer guarantee.
Summary of the invention
The main purpose of this patent proposes to launch with single ripple dicode a kind of dicode receiving circuit matched, realize the reception of " 1 " and " 0 " code twice change code that radiating portion sends, launch for research dicode and create better condition, after enforcement, be conducive to the lifting of the anti-ability of cracking of tri-state coding adhesive integrated circuit, with the advantage that it is cheap, be conducive to the competition in market, encode after integrated package combines with other senior class, be conducive to the larger lifting of level of confidentiality degree.
The measure that this patent proposes is:
1, the change code receiver of inverter controlling is made up of jointly radio frequency reception demodulation part, inverter change decoding circuit, performance element, decoding integrated package.
Wherein: the output of radio frequency reception demodulation part connects the input of decoding integrated package, first of decoding integrated package exports connection inverter circuit, and second of decoding integrated package exports and connects performance element.
Wherein 7 connections of decoding integrated package 8 bit code position are fixed code, and another one becomes and becomes code end.
Inverter becomes decoding circuit: the input of inverter connects first of decoding integrated package and exports, and the output connection of inverter becomes code end.
2, decoding integrated package used is non-locking type.
3, the connected mode of the fixed code of decoding integrated package should be the same with the fixed code connected mode of integrated package of encoding in corresponding transmitting.
4, inverter is integrated circuit.
This measure is explained as follows further:
1, sketch the cardinal principle of single ripple dicode transmitting that our unit for the previous period develops: in 8 bit codes of coding integrated package, wherein 7 is fixed code, wherein one is variation code, and radiating portion, when launching, launch two subcategory numbers.Wherein transmitter code is 7 fixed code wherein for the first time, and first subcategory number of " variation " code of one, and the code that second time is launched is 7 constant fixed code, and the coded signal after one " variation code " variation.And the first time coded signal of the receiving unit that the present invention the matches integrated middle variation that is received code is " 1 ", second time signal is the situation of " 0 ".And present receiving lines of the present invention, reliably will can receive the variation code sent for the first time is exactly " 1 ", and second time signal is the signal of the situation of " 0 ", but current scheme is different from the patent formula applied for last time.
2, in this measure 1, the line construction of the decode in two phases of generation: with 8 bit code lines in decoding integrated package and radiating portion integrated package of encoding corresponding.7 bit codes have wherein connected into fixed code (9 in Fig. 2).Last bit code becomes the change code end (8 in Fig. 2) of a kind of reception twice signal, and when initial condition, the code bit that in receiving unit, " displacement code " position presents all the time is the stationary state of 1, and after receiving signal just produce decoding in change code become " 0 " state.Its decoding is integrated with two outputs, wherein first output, and being also called is that inverter becomes decoding circuit control end, and this end directly controls to become code.Another one is second output (6 in Fig. 2), and this output is connected with rear class, is directly to export decoded result at the corresponding levels.The structure of this circuit can realize the present invention and receive the requirement becoming code.In above-mentioned line construction, first exports the input connecting inverter, and the output of inverter connects change code end.
3, inverter becomes the reason that decoding circuit realizes the change code of 1 and 0 and is: when decode integrated first export no-output into zero time, the input no-voltage of institute's connection inverter, so its output is high-order, switch on power into a high position so become code bit line, i.e. one state, export as time high-order when integrated first output of decoding has, connect inverter input for high-order, so its output is low level, so becoming code bit line is low level, namely " 0 " state, thus achieves the displacement of 1 and 0.
4, the single ripple dicode once applied for our unit invents the decoding principle matching and produce.
This circuit produces four kinds of functions and corresponding principle:
(1), receive the first subcategory number of sending of radiating portion principle: as Fig. 2, when first of integrated package of decoding exports Non voltage output, the input of inverter is low level, according to the principle of inverter, can learn, its output must be high-order, i.e. " 1 ", and the change code end that output connects also is just " 1 ", with send first time signal for high-order corresponding, so first signal that radiating portion sends can be received.
(2), receive the second subcategory number of sending of radiating portion principle: after receiving the first signal sent, at this moment to encode the first output of integrated circuit, the high signal of 1 is had to input, the input of inverter is exactly high-order, its output must low level, and i.e. " 0 ", inverter exports change code end namely " 0 " state connect, identical with the variation code " 0 " launched, so the different coded signal of second time can be received.
(3), receive the sequential that has that twice change code must have successively to limit and principle: because the initial shape of decoding integrated package flexure curve in the present invention is 1, so only have radiating portion to send variation code for time high-order, launching and receiving code could be corresponding, the output of coding integrated package first just has output, thus decoding integrated package is caused to become the new code that code just has " 0 ", and this new code could coincide with transmitting, thus integrated second output that makes to decode in the present invention has high-order output.Otherwise radiating portion is if first launching is secondary " 0 " signal, now because the change code bit line of coding integrated package of the present invention is that a high position " 1 " under initial condition does not meet with transmitter code, do not have the output be connected with rear class.More than analyze, the present invention's decoding is integrated with output, after must first receiving primary correct signal, just may receive the correct signal that second time is launched.
(4), twice emitting signal has the strict demand receiving the time limit, (its benefit greatly can improve the ability of cracking) and principle: the transient state output type decoding integrated package that its decoding integrated package adopts in this measure, its benefit is, decoding integrated package is after receiving the signal sent for the first time, and the first output has high-order output, but is not permanent, second time signal can only be received time of short duration, otherwise from action expense, need again to receive first time signal, could secondary signal be received.Thus to crack and must form important elements.Thus the level of confidentiality cracked is greatly increased.
5, inverter is used for logical inversion, has good carrying load ability, when voltage is by high step-down, has cushioning effect, decoding integrated package can not be damaged.
After the invention process, after coordinating with the radiating portion applied for before our unit, below outstanding feature:
1, the change code form of the coding integrated circuit of low price is achieved, improve the character of coding integrated circuit, just output is had after must receiving two subcategory numbers after the receiving circuit decoding of present inventor, thus there is the very high anti-ability of cracking, because rudimentary coding integrated package has cheap advantage, so its product has very strong competitiveness.
If 2 with the combination again of rolling code circuit, it decodes difficulty is superpower, because rolling code is the coding of a class character, and in this measure, dicode transmitting is the coding of a class character, two kinds of coded combinations of different nature are larger than a kind of code breaks difficulty of character.
3, the dicode receiving lines of this measure receives reliable.
Its reason is that the decoding integrated package fixed code in the present invention conforms to completely with the fixed code of radiating portion.And the change code part received, signal code is " 1 " for the first time, and the code of second time signal is " 0 ", and the twice change code sent with radiating portion definitely conforms to, and signal is " 1 " for the first time, and second signal is also " 0 ".Have followed the rule of this kind of encoding and decoding integrated package completely.Another very important reason is, what the decoding in receiving lines in the present invention realized is " tracking system ", that is to say that just automatically become the code " 0 " needed for second time, twice receiving course is not disorderly, onside after receiving first change code " 1 ".
4, crack very difficult: mainly contain three reasons, one is to have twice different code could realize decoding, just has output.Two is that different code needed for twice has timing requirements, can not be disorderly, 3rd major reason is, the requirement that this twice different change codes is also necessary free when launching, because the integrated output of the coding adopted in the present invention is the transient state output type adopted, in other words after receiving signal, its output can only remain a transient state high position, will disappear after blink.If criminal, after correct code is made in exploration in first time, want that within the very of short duration time, feel out the correct code of second time is more obviously very difficult.Also be that criminal wants to crack the present invention must by three passes: one is must twice different dicode, and two is also must have sequential, and three is also must be limited within the very short time just can complete, and therefore adopts " the barcode scanning instrument " of crime to crack and hardly may.From meaning in a certain respect, higher than rolling code, because crack rolling code in theory, there is certain probability in this level of confidentiality, and just this probability is very low, very low, and the present invention is because exist the above-mentioned three elements that crack, this crack probability just may be lower.
5, circuit is reliable, and one is that circuit is simplified.Two is that inverter has good carrying load ability, when voltage is by high step-down, has cushioning effect, decoding integrated package can not be damaged.
6, produce easily, one be need not be valuable equipment and instrument, two is that technology is simple, and three are that circuit is simplified and component requirements used is low, so can produce very high first-pass yield, very applicable minuscule-type-enterprise produces.
Accompanying drawing explanation
Fig. 1 is total measure schematic diagram of the change code receiver of inverter controlling.
In figure: 1, radio frequency reception demodulation part (as superregenerative reception demodulating unit, or beat reception demodulating unit); 2, decoding integrated package; 3, performance element; 4, integrated package first of decoding exports; 5, inverter becomes decoding circuit; 6, integrated package second of decoding exports.
Fig. 2 is the practical circuit diagram of this measure relative section.
In figure: 1, radio frequency reception demodulation part (as superregenerative reception demodulating unit, or beat reception demodulating unit); 2, decoding integrated package; 3, performance element; 4, integrated package first of decoding exports; What integrated package of 6, decoding was connected with rear class second exports; 7, inverter; 8, the output of inverter, the change code end of integrated package of namely decoding; 9, the fixed code of decoding integrated package.
Embodiment
Fig. 1 and Fig. 2 describes the concrete a kind of mode implemented jointly.
1, select element: integrated package of wherein decoding selects 2272, inverter can be serial with CMOS, and available CD series, as CD4069.
2, weld: weld by Fig. 2.
3, adjustment and detection:
(1), can the Function detection of automatic changing code bit line: when launching first time signal, energy reliable reception of the present invention: the first output having universal instrument to survey decoding integrated package has high-order output.
(2), twice signal receiving function detects: after receiving the first signal, secondary signal of fasting ejection very much, integrated package second of at this moment decoding exports high-order output.Have voltage to export when having universal instrument to survey this, if when adopting oscilloscope, display screen has high-order reaction.
(3), detect Received signal strength whether sequential: the second output universal instrument or oscilloscope being received decoding integrated package, if first launch secondary signal, integrated package second of now decoding exports without high pressure, if there is high pressure, illustrates that inverter has damaged.
(4), detect whether decoding integrated package is non-interlocking type: first output and second of universal instrument or oscilloscope being received decoding integrated package exports to be observed, and after receiving signal, signal can disappear within the time of short duration, otherwise should change the model of decoding integrated package.

Claims (4)

1. the change code receiver of inverter controlling, is characterized in that: be jointly made up of radio frequency reception demodulation part, inverter change decoding circuit, performance element, decoding integrated package;
Wherein: the output of radio frequency reception demodulation part connects the input of decoding integrated package, first of decoding integrated package exports connection inverter circuit, and second of decoding integrated package exports and connects performance element;
Wherein 7 connections of decoding integrated package 8 bit code position are fixed code, and another one becomes and becomes code end;
Inverter becomes decoding circuit: the input of inverter connects first of decoding integrated package and exports, and the output connection of inverter becomes code end.
2. the change code receiver of inverter controlling according to claim 1, is characterized in that: decoding integrated package used is non-locking type.
3. the change code receiver of inverter controlling according to claim 1, is characterized in that: the connected mode of the fixed code of decoding integrated package should be the same with the fixed code connected mode of integrated package of encoding in corresponding transmitting.
4. the change code receiver of inverter controlling according to claim 1, is characterized in that: inverter is integrated circuit.
CN201420511415.0U 2014-09-07 2014-09-07 The change code receiver of inverter controlling Expired - Fee Related CN204089784U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420511415.0U CN204089784U (en) 2014-09-07 2014-09-07 The change code receiver of inverter controlling

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420511415.0U CN204089784U (en) 2014-09-07 2014-09-07 The change code receiver of inverter controlling

Publications (1)

Publication Number Publication Date
CN204089784U true CN204089784U (en) 2015-01-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201420511415.0U Expired - Fee Related CN204089784U (en) 2014-09-07 2014-09-07 The change code receiver of inverter controlling

Country Status (1)

Country Link
CN (1) CN204089784U (en)

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150107

Termination date: 20160907

CF01 Termination of patent right due to non-payment of annual fee