CN204012673U - For the over circuit of storage battery - Google Patents
For the over circuit of storage battery Download PDFInfo
- Publication number
- CN204012673U CN204012673U CN201420465170.2U CN201420465170U CN204012673U CN 204012673 U CN204012673 U CN 204012673U CN 201420465170 U CN201420465170 U CN 201420465170U CN 204012673 U CN204012673 U CN 204012673U
- Authority
- CN
- China
- Prior art keywords
- resistance
- raceway groove
- gate fet
- isolated gate
- groove isolated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
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- Charge And Discharge Circuits For Batteries Or The Like (AREA)
- Secondary Cells (AREA)
Abstract
The utility model discloses a kind of over circuit for storage battery, comprise the first resistance～ten resistance, the one P raceway groove isolated gate FET, the 2nd P raceway groove isolated gate FET, N raceway groove isolated gate FET, comparator, shunt regulator, triode, storage battery and load, the one P raceway groove isolated gate FET and the first resistance form power control circuit, the 4th resistance, the 7th resistance, the 8th resistance, the 9th resistance, N raceway groove isolated gate FET and comparator form comparison circuit, the 2nd P raceway groove isolated gate FET, the 6th resistance and triode form protection control circuit.Over circuit for storage battery described in the utility model, prevents circuit oscillation with hysteresis function, and high voltage conduction threshold and low-voltage shutoff door limit value can pass through the 3rd resistance and the 8th resistance setting.This over circuit can disconnect in the time that battery tension is too low, reduces the energy consumption of storage battery, protection storage battery.
Description
Technical field
The utility model relates to a kind of over circuit for storage battery.
Background technology
For guarantee equipment can also move after power-off, conventionally need to add storage battery power supply in support.Now need to arrange protective circuit, in case battery over-discharge and vibration, affect the useful life of storage battery, even damage storage battery.At present, the protective circuit of battery be applicable to the battery that voltage is low, cannot be applicable to the battery that voltage is high.
Summary of the invention
For above-mentioned the deficiencies in the prior art part, the utility model provides a kind of over circuit for storage battery.
To achieve these goals, the technical solution adopted in the utility model is:
Over circuit for storage battery described in the utility model, comprises the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance, the tenth resistance, the one P raceway groove isolated gate FET, the 2nd P raceway groove isolated gate FET, N raceway groove isolated gate FET, comparator, shunt regulator, triode, storage battery and load, the anodal while of described storage battery and the first end of the first resistance, the source electrode of the one P raceway groove isolated gate FET connects, the second end while of described the first resistance and the first end of the second resistance, the first end of the 3rd resistance, the grid of the one P raceway groove isolated gate FET connects, and described the second resistance is connected with the positive pole of shunt regulator, the drain electrode while of a described P raceway groove isolated gate FET and the first end of the 4th resistance, the first end of the 5th resistance, the first end of the 6th resistance, the source electrode of the 2nd P raceway groove isolated gate FET connects, the second end while of described the 4th resistance and the first end of the 7th resistance, the in-phase input end of comparator connects, the second end while of described the 3rd resistance and the inverting input of comparator, the first end of the 8th resistance connects, the second end while of described the 8th resistance and the first end of the 9th resistance, the drain electrode of N raceway groove isolated gate FET connects, the output while of described comparator and the second end of the 5th resistance, the first end of the tenth resistance, the grid of N raceway groove isolated gate FET connects, and the second end of described the tenth resistance is connected with the base stage of triode, the collector electrode while of described triode and the second end of the 6th resistance, the grid of the 2nd P raceway groove isolated gate FET connects, and the drain electrode of described the 2nd P raceway groove isolated gate FET is connected with the positive pole of load, the negative pole while of described shunt regulator and the second end of the 7th resistance, the second end of the 9th resistance, the source electrode of N raceway groove isolated gate FET, the emitter of triode, the negative pole of load connects.
Compared with prior art, the beneficial effects of the utility model:
Over circuit for storage battery described in the utility model, prevents circuit oscillation with hysteresis function, and high voltage conduction threshold and low-voltage shutoff door limit value can pass through the 3rd resistance and the 8th resistance setting.This over circuit can disconnect in the time that battery tension is too low, reduces the energy consumption of storage battery, protection storage battery.
Brief description of the drawings
Fig. 1 is the circuit diagram of the over circuit for storage battery described in the utility model.
Embodiment
Below in conjunction with drawings and the specific embodiments, the utility model is described in further detail.
As shown in Figure 1, the over circuit for storage battery described in the utility model, comprises the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, the one P raceway groove isolated gate FET MP1, the 2nd P raceway groove isolated gate FET MP2, N raceway groove isolated gate FET MN, comparator A, shunt regulator U, triode Q, storage battery Vdd and load RL, the anodal while of storage battery Vdd and the first end of the first resistance R 1, the source electrode of the one P raceway groove isolated gate FET MP1 connects, the second end while of the first resistance R 1 and the first end of the second resistance R 2, the first end of the 3rd resistance R 3, the grid of the one P raceway groove isolated gate FET MP1 connects, and the second resistance R 2 is connected with the positive pole of shunt regulator U, the drain electrode while of a P raceway groove isolated gate FET MP1 and the first end of the 4th resistance R 4, the first end of the 5th resistance R 5, the first end of the 6th resistance R 6, the source electrode of the 2nd P raceway groove isolated gate FET MP2 connects, the second end while of the 4th resistance R 4 and the first end of the 7th resistance R 7, the in-phase input end of comparator A connects, the second end while of the 3rd resistance R 3 and the inverting input of comparator A, the first end of the 8th resistance R 8 connects, the second end while of the 8th resistance R 8 and the first end of the 9th resistance R 9, the drain electrode of N raceway groove isolated gate FET MN connects, the output while of comparator A and the second end of the 5th resistance R 5, the first end of the tenth resistance R 10, the grid of N raceway groove isolated gate FET MN connects, and the second end of the tenth resistance R 10 is connected with the base stage of triode Q, the collector electrode while of triode Q and the second end of the 6th resistance R 6, the grid of the 2nd P raceway groove isolated gate FET MP2 connects, and the drain electrode of the 2nd P raceway groove isolated gate FET MP2 is connected with the positive pole of load RL, the negative pole while of shunt regulator U and the second end of the 7th resistance R 7, the second end of the 9th resistance R 9, the source electrode of N raceway groove isolated gate FET MN, the emitter of triode Q, the negative pole of load RL connects.
Over circuit for storage battery described in the utility model; the one P raceway groove isolated gate FET MP1 and the first resistance R 1 form power control circuit; the 4th resistance R 4, the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, N raceway groove isolated gate FET MN and comparator A form hysteresis comparison circuit, and the 2nd P raceway groove isolated gate FET MP2, the 6th resistance R 6 and triode Q form protection control circuit.Shunt regulator U provides reference voltage, and hysteresis comparison circuit is with hysteresis function, and high voltage conduction threshold and low-voltage shutoff door limit value can arrange by the 3rd resistance R 3 and the 8th resistance R 8.Comparator A input voltage output low level during lower than low-voltage shutoff door limit value, the 2nd P raceway groove isolated gate FET MP2 disconnects, and stops powering to load RL; Comparator A input voltage is exported high level during higher than high voltage conduction threshold, and load RL power supply is given in the 2nd P raceway groove isolated gate FET MP2 conducting.When storage battery Vdd voltage is during lower than certain value, a P raceway groove isolated gate FET MP1 disconnects, and stops, to protective circuit power supply, reducing the energy consumption of storage battery Vdd.Wherein, the model of shunt regulator U is LM285Z-2.5.
Claims (1)
1. for an over circuit for storage battery, it is characterized in that: comprise the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance, the tenth resistance, the one P raceway groove isolated gate FET, the 2nd P raceway groove isolated gate FET, N raceway groove isolated gate FET, comparator, shunt regulator, triode, storage battery and load, the anodal while of described storage battery and the first end of the first resistance, the source electrode of the one P raceway groove isolated gate FET connects, the second end while of described the first resistance and the first end of the second resistance, the first end of the 3rd resistance, the grid of the one P raceway groove isolated gate FET connects, and described the second resistance is connected with the positive pole of shunt regulator, the drain electrode while of a described P raceway groove isolated gate FET and the first end of the 4th resistance, the first end of the 5th resistance, the first end of the 6th resistance, the source electrode of the 2nd P raceway groove isolated gate FET connects, the second end while of described the 4th resistance and the first end of the 7th resistance, the in-phase input end of comparator connects, the second end while of described the 3rd resistance and the inverting input of comparator, the first end of the 8th resistance connects, the second end while of described the 8th resistance and the first end of the 9th resistance, the drain electrode of N raceway groove isolated gate FET connects, the output while of described comparator and the second end of the 5th resistance, the first end of the tenth resistance, the grid of N raceway groove isolated gate FET connects, and the second end of described the tenth resistance is connected with the base stage of triode, the collector electrode while of described triode and the second end of the 6th resistance, the grid of the 2nd P raceway groove isolated gate FET connects, and the drain electrode of described the 2nd P raceway groove isolated gate FET is connected with the positive pole of load, the negative pole while of described shunt regulator and the second end of the 7th resistance, the second end of the 9th resistance, the source electrode of N raceway groove isolated gate FET, the emitter of triode, the negative pole of load connects.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420465170.2U CN204012673U (en) | 2014-08-18 | 2014-08-18 | For the over circuit of storage battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420465170.2U CN204012673U (en) | 2014-08-18 | 2014-08-18 | For the over circuit of storage battery |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204012673U true CN204012673U (en) | 2014-12-10 |
Family
ID=52052616
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420465170.2U Expired - Fee Related CN204012673U (en) | 2014-08-18 | 2014-08-18 | For the over circuit of storage battery |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204012673U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114156836A (en) * | 2021-11-10 | 2022-03-08 | 深圳欣锐科技股份有限公司 | High-voltage discharge protection circuit, high-voltage discharger and electric equipment |
-
2014
- 2014-08-18 CN CN201420465170.2U patent/CN204012673U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114156836A (en) * | 2021-11-10 | 2022-03-08 | 深圳欣锐科技股份有限公司 | High-voltage discharge protection circuit, high-voltage discharger and electric equipment |
| CN114156836B (en) * | 2021-11-10 | 2023-06-20 | 深圳欣锐科技股份有限公司 | High-voltage discharge protection circuit, high-voltage discharger and electric equipment |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141210 Termination date: 20150818 |
|
| EXPY | Termination of patent right or utility model |