CN203911970U - Multi-display-screen concurrent display system - Google Patents
Multi-display-screen concurrent display system Download PDFInfo
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- CN203911970U CN203911970U CN201420294692.0U CN201420294692U CN203911970U CN 203911970 U CN203911970 U CN 203911970U CN 201420294692 U CN201420294692 U CN 201420294692U CN 203911970 U CN203911970 U CN 203911970U
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Abstract
The utility model discloses a multi-display-screen concurrent display system including one display drive circuit (1), n display control circuits (2) and n liquid-crystal display screens (3). An A wireless receiving and transmitting module (4) is disposed on the display drive circuit (1). B wireless receiving and transmitting modules (5) are disposed on the display control circuits (2). The A wireless receiving and transmitting module (4) is in wireless connection with the B wireless receiving and transmitting modules (5), and communicates with the B wireless receiving and transmitting modules (5) by using the diffusion routing algorithm and the CSMA/CD protocol. The n display control circuits (2) and the n liquid-crystal display screens (3) are connection in a one-to-one correspondence manner. According to the multi-display-screen concurrent display system, wireless liquid-crystal display is realized through arrangement of the display control circuits and the wireless receiving and transmitting modules on the display drive circuit and the display control circuits, and the wireless liquid-crystal display system has good communication quality and low requirement of hardware. In addition, since the wireless receiving and transmitting modules communicate with each other by using the diffusion routing algorithm and the CSMA/CD protocol, security and accuracy of the liquid-crystal display data transmission can be further ensured.
Description
Technical field
The utility model relates to a kind of multi-display parallel display system, belongs to liquid crystal display systems technical field.
Background technology
The application of LCD MODULE is more and more extensive, it is often used on the products such as the liquid crystal instrument of water meter, ammeter, gas meter, electronic scale, industrial instrument, PDA, telephone set, facsimile machine, instrument and meter, Medical Devices display screen, household electrical appliances and automobile and the motorcycle of communicating terminal, plurality of specifications, can show numeral, man, figure etc.
Existing LCD MODULE by interface wired connection, is broadly divided into two kinds mostly:
A kind of is the LCD MODULE that there is transfer of data same outside, if realize long-distance transmissions by wire communication, the not only many difficult wiring of line, and the communication distance of wire communication increase can reduce communication quality, but also has improved the requirement to communication system hardware; In addition, the communication distance of existing wired liquid crystal display generally all in 10m, cannot meet people's demand;
Another kind is and the LCD MODULE of outside without transfer of data that it adopts a fixing embedded system to coordinate liquid crystal display drive circuit to show through row.This mode not only makes displaying contents relatively fixing, and system conversion or upgrading also more difficult.
In addition, also there is following defect in existing LCD MODULE: with high costs, message transmission rate is lower, the fail safe of transfer of data does not ensure, and do not have special technological means to guarantee the accuracy of transfer of data simultaneously yet; In addition, existing LCD MODULE is mostly a display screen of the corresponding driving of a drive circuit and carrys out demonstration information, and realize multi-display demonstration needs multiple drive circuits to drive, and cost is higher.
Utility model content
The purpose of this utility model is, a kind of multi-display parallel display system is provided, and it can effectively solve problems of the prior art, and especially wire communication distance is short, increase communication distance and can reduce communication quality, improve the problem of the hardware requirement to liquid crystal display systems simultaneously.
For solving the problems of the technologies described above, the utility model adopts following technical scheme: a kind of multi-display parallel display system, comprise m display driver circuit, a n display control circuit and n LCDs, display driver circuit is provided with A wireless receiving and dispatching module, display control circuit is provided with B wireless receiving and dispatching module, A wireless receiving and dispatching module and the wireless connections of B wireless receiving and dispatching module, and A wireless receiving and dispatching module and B wireless receiving and dispatching module adopt diffusion routing algorithm and CSMA/CD agreement to communicate; N display control circuit and n LCDs connect one to one.
Preferably, described A wireless receiving and dispatching module and B wireless receiving and dispatching module are by nRF2401A chip and the first peripheral circuit composition.
Preferred, the first described peripheral circuit comprises: 6 resistance R 1, R2, R3, R4, R5, R6, the A end of R1, R2, R3, R4, R5, R6 is connected with Vcc end and the CLK2 end of nRF2401A chip respectively, and the B end of R1, R2, R3, R4, R5, R6 connects one to one with the CE end of nRF2401A chip, CS end, DATA end, CLK1 end, DR1 end, PWR_UP end.By adopting nRF2401A chip and the first peripheral circuit as A wireless receiving and dispatching module and B wireless receiving and dispatching module and adopting above-mentioned connected mode, thereby can realize accurately, fast, cheaply transfer of data, the matching degree of synchronous signal is best.
Display driver circuit described in the utility model also comprises: a MCU, and a MCU is connected with A wireless receiving and dispatching module, and a MCU adopts STC15F2K60S2 chip.
Preferably, the B end of R1, the R2 of the P0.0 end of described STC15F2K60S2 chip, P0.1 end, P0.2 end, P0.3 end, P0.4 end, P0.5 end and the first peripheral circuit, R3, R4, R5, R6 connects one to one, and connects one to one with CE end, CS end, DATA end, CLK1 end, DR1 end, the PWR_UP end of nRF2401A chip simultaneously.
Display control circuit described in the utility model also comprises: the 2nd MCU, the 2nd MCU is connected with B wireless receiving and dispatching module and LCDs respectively, the 2nd described MCU comprises STC89C51 chip and the second peripheral circuit, and described LCDs comprises 12864 chips and the 3rd peripheral circuit.
Preferably, the B end of R1, the R2 of the P0.0 end of the STC89C51 chip of the 2nd described MCU, P0.1 end, P0.2 end, P0.3 end, P0.4 end, P0.5 end and the first peripheral circuit, R3, R4, R5, R6 connects one to one, and connects one to one with CE end, CS end, DATA end, CLK1 end, DR1 end, the PWR_UP end of nRF2401A chip simultaneously; The second described peripheral circuit comprises: the peripheral crystal oscillating circuit of A reset circuit and A; A reset circuit is connected with the RST end of STC89C51 chip; The peripheral crystal oscillating circuit of A is connected with XTAL1 end and the XTAL2 end of STC89C51 chip respectively; The 3rd described peripheral circuit comprises: range is the slide rheostat of 2K Ω, and the cursor slide end of slide rheostat is connected with the pin 3 of 12864 chips, a end ground connection of slide rheostat, and b end is connected with the pin two of power supply and 12864 chips respectively; The pin one of 12864 chips, 20 ground connection, pin two, 17,19 is connected with power supply; The T1 of 12864 chips holds, WR holds, T0 holds, RD end is held with the T1 of STC89C51 chip,
end, T0 end,
connect.
The method of attachment of aforesaid the 2nd MCU and B wireless receiving and dispatching module is with the method for attachment of a MCU and A wireless receiving and dispatching module (be the P0 of STC89C51 chip hold be connected with nRF2401A chip and the first peripheral circuit).
In aforesaid multi-display parallel display system, PC terminal, PC terminal is provided with mapping program, PC terminal is connected with a MCU and the 5th peripheral circuit by max232 serial port chip and the 4th peripheral circuit, max232 serial port chip has AES (Advanced Encryption Standard) coprocessor, thereby can further ensure the fail safe of transfer of data in communication process.
Preferably, the R1OUT of described max232 serial port chip end and T1IN end connect one to one with RXD end and the TXD end of STC15F2K60S2 chip, the 4th described peripheral circuit comprises: the exclusion of 9 pins and capacitor C 1, C2, C3, C4, C5, pin 5 ground connection of exclusion, pin 3 is connected with the TIOUT end of max232 serial port chip, pin two is connected with the R1IN end of max232 serial port chip, capacitor C 1 is connected with C1+ end and the C1-end of max232 serial port chip respectively, capacitor C 2 is connected with C2+ end and the C2-end of max232 serial port chip respectively, capacitor C 3 is connected with V+ end and the Vcc end of max232 serial port chip respectively, capacitor C 4 is connected with Vcc end and the GND end of max232 serial port chip respectively, one end ground connection of capacitor C 5, the other end is connected with the V-end of max232 serial port chip, the 5th described peripheral circuit comprises: the peripheral crystal oscillating circuit of B reset circuit and B, and B reset circuit is connected with the RST end of STC15F2K60S2 chip, the peripheral crystal oscillating circuit of B is connected with XTAL1 end, the XTAL2 end of STC15F2K60S2 chip.
In aforesaid multi-display parallel display system, described 1≤n≤256,1≤m≤256.
Compared with prior art, the utlity model has following advantage:
1, by display control circuit being set and wireless receiving and dispatching module being set on display driver circuit and display control circuit, thereby realized wireless liquid crystal display, and the communication quality of this wireless liquid crystal display systems is better, also lower to the requirement of hardware; In addition, between the wireless receiving and dispatching module in the utility model, adopt diffusion routing algorithm and CSMA/CD agreement to communicate, thereby can further guarantee fail safe and the accuracy of liquid crystal display data transmission;
2, the display system in the utility model can realize point-to-point, point-to-multipoint, how point-to-point, multi-multipoint data transmission, can transmit contents to multiple LCDs, thereby save cost, makes the application of this display system more flexible;
3, by adopting circuit connection structure of the present utility model, can make the efficiency of transmission of whole display system reach 1～2M/s, the real-time Transmission that has substantially realized data-signal shows; And adopt circuit connection structure of the present utility model, can make the transmission range of display system reach more than 1000 meters.In addition, hardware quantity of the present utility model is few, and volume is little, and information display mode is more flexible, and communication is stable, reliable;
4, adopt after circuit connection structure of the present utility model, the matching performance between signal is best, and cost is minimum simultaneously;
5, make the display control circuit increasing on the basis of the former protocols having of the existing display unit of compatibility, (new communication protocol is to adopt 2.4G wireless network can to use new communication protocol by wireless receiving and dispatching module, use the conventional communication protocol that meets wave point LCD MODULE that IEEE802.15.4 communication protocol is formulated for communication protocol basis (mainly to comprise: increase self-defining data packet format agreement, wherein, custom protocol comprises: frame length, Target id, valid data, verification mode etc., arrange simple and convenient), it provides guarantee and the support of radio communication for display driver circuit and display control circuit), simple to operation.
Brief description of the drawings
Fig. 1 is the circuit connection diagram of a kind of embodiment of the present utility model;
Fig. 2 is the circuit connection diagram of a MCU and A wireless receiving and dispatching module (being the P0 end and nRF2401A chip and the first peripheral circuit of STC15F2K60S2 chip);
Fig. 3 is the circuit connection diagram of the 2nd MCU and LCDs (being STC89C51 chip and the second peripheral circuit and 12864 chips and the 3rd peripheral circuit);
Fig. 4 is the circuit connection diagram of a MCU and PC terminal (being STC15F2K60S2 chip and the 5th peripheral circuit and max232 serial port chip and the 4th peripheral circuit);
Fig. 5 is the circuit connection diagram of another kind of embodiment of the present utility model.
Reference numeral: 1-display driver circuit, 2-display control circuit, 3-LCDs, 4-A wireless receiving and dispatching module, 5-B wireless receiving and dispatching module, 6-the one MCU, 7-the 2nd MCU, 8-PC terminal.
Below in conjunction with the drawings and specific embodiments, the utility model is further described.
Embodiment
Embodiment 1 of the present utility model: a kind of multi-display parallel display system, as shown in Figure 1 to 4, comprise 1 display driver circuit 1, a n display control circuit 2 and n LCDs 3, display driver circuit 1 is provided with A wireless receiving and dispatching module 4, display control circuit 2 is provided with B wireless receiving and dispatching module 5, A wireless receiving and dispatching module 4 and 5 wireless connections of B wireless receiving and dispatching module (in A wireless receiving and dispatching module 4 and B wireless receiving and dispatching module 5, being embedded with 2.4G wireless network protocol), and adopt diffusion routing algorithm and CSMA/CD agreement to communicate; N display control circuit 2 connects one to one with n LCDs 3, wherein 1≤n≤256.Described A wireless receiving and dispatching module 4 and B wireless receiving and dispatching module 5 are by nRF2401A chip and the first peripheral circuit composition.The first described peripheral circuit comprises: 6 resistance R 1, R2, R3, R4, R5, R6, the A end of R1, R2, R3, R4, R5, R6 is connected with Vcc end and the CLK2 end of nRF2401A chip respectively, and the B end of R1, R2, R3, R4, R5, R6 connects one to one with the CE end of nRF2401A chip, CS end, DATA end, CLK1 end, DR1 end, PWR_UP end.Described display driver circuit 1 also comprises: a MCU6, and a MCU6 is connected with A wireless receiving and dispatching module 4, and a MCU6 adopts STC15F2K60S2 chip.The B end of R1, the R2 of the P0.0 end of described STC15F2K60S2 chip, P0.1 end, P0.2 end, P0.3 end, P0.4 end, P0.5 end and the first peripheral circuit, R3, R4, R5, R6 connects one to one, and connects one to one with CE end, CS end, DATA end, CLK1 end, DR1 end, the PWR_UP end of nRF2401A chip simultaneously.Described display control circuit 2 also comprises: the 2nd MCU7, the 2nd MCU7 is connected with B wireless receiving and dispatching module 5 and LCDs 3 respectively, the 2nd described MCU7 comprises STC89C51 chip and the second peripheral circuit, and described LCDs 3 comprises 12864 chips and the 3rd peripheral circuit.The B end of R1, the R2 of the P0.0 end of the STC89C51 chip of the 2nd described MCU7, P0.1 end, P0.2 end, P0.3 end, P0.4 end, P0.5 end and the first peripheral circuit, R3, R4, R5, R6 connects one to one, and connects one to one with CE end, CS end, DATA end, CLK1 end, DR1 end, the PWR_UP end of nRF2401A chip simultaneously; The second described peripheral circuit comprises: the peripheral crystal oscillating circuit of A reset circuit and A; A reset circuit is connected with the RST end of STC89C51 chip; The peripheral crystal oscillating circuit of A is connected with XTAL1 end and the XTAL2 end of STC89C51 chip respectively; The 3rd described peripheral circuit comprises: range is the slide rheostat of 2K Ω, and the cursor slide end of slide rheostat is connected with the pin 3 of 12864 chips, a end ground connection of slide rheostat, and b end is connected with the pin two of power supply and 12864 chips respectively; The pin one of 12864 chips, 20 ground connection, pin two, 17,19 is connected with power supply; The T1 of 12864 chips holds, WR holds, T0 holds, RD end is held with the T1 of STC89C51 chip,
end, T0 end,
connect.Described system also comprises: PC terminal 8, and PC terminal 8 is provided with mapping program, and PC terminal 8 is connected with a MCU6 and the 5th peripheral circuit by max232 serial port chip and the 4th peripheral circuit.The R1OUT end of described max232 serial port chip and T1IN end connect one to one with RXD end and the TXD end of STC15F2K60S2 chip, the 4th described peripheral circuit comprises: the exclusion of 9 pins and capacitor C 1, C2, C3, C4, C5, pin 5 ground connection of exclusion, pin 3 is connected with the TIOUT end of max232 serial port chip, pin two is connected with the R1IN end of max232 serial port chip, capacitor C 1 is connected with C1+ end and the C1-end of max232 serial port chip respectively, capacitor C 2 is connected with C2+ end and the C2-end of max232 serial port chip respectively, capacitor C 3 is connected with V+ end and the Vcc end of max232 serial port chip respectively, capacitor C 4 is connected with Vcc end and the GND end of max232 serial port chip respectively, one end ground connection of capacitor C 5, the other end is connected with the V-end of max232 serial port chip, the 5th described peripheral circuit comprises: the peripheral crystal oscillating circuit of B reset circuit and B, and B reset circuit is connected with the RST end of STC15F2K60S2 chip, the peripheral crystal oscillating circuit of B is connected with XTAL1 end, the XTAL2 end of STC15F2K60S2 chip.Hardware in the present embodiment is commercially available prod.
Embodiment 2: a kind of multi-display parallel display system, as shown in Fig. 2, Fig. 3, Fig. 5, comprise 2 and 1 LCDs 3 of 1,1 display control circuit of m display driver circuit, display driver circuit 1 is provided with A wireless receiving and dispatching module 4, display control circuit 2 is provided with B wireless receiving and dispatching module 5, A wireless receiving and dispatching module 4 and 5 wireless connections of B wireless receiving and dispatching module, and adopt diffusion routing algorithm and CSMA/CD agreement to communicate; Display control circuit 2 is connected with LCDs 3, wherein 1≤m≤256.Described A wireless receiving and dispatching module 4 and B wireless receiving and dispatching module 5 are by nRF2401A chip and the first peripheral circuit composition.The first described peripheral circuit comprises: 6 resistance R 1, R2, R3, R4, R5, R6, the A end of R1, R2, R3, R4, R5, R6 is connected with Vcc end and the CLK2 end of nRF2401A chip respectively, and the B end of R1, R2, R3, R4, R5, R6 connects one to one with the CE end of nRF2401A chip, CS end, DATA end, CLK1 end, DR1 end, PWR_UP end.Described display driver circuit 1 also comprises: a MCU6, and a MCU6 is connected with A wireless receiving and dispatching module 4, and a MCU6 adopts STC15F2K60S2 chip.The B end of R1, the R2 of the P0.0 end of described STC15F2K60S2 chip, P0.1 end, P0.2 end, P0.3 end, P0.4 end, P0.5 end and the first peripheral circuit, R3, R4, R5, R6 connects one to one, and connects one to one with CE end, CS end, DATA end, CLK1 end, DR1 end, the PWR_UP end of nRF2401A chip simultaneously.Described display control circuit 2 also comprises: the 2nd MCU7, the 2nd MCU7 is connected with B wireless receiving and dispatching module 5 and LCDs 3 respectively, the 2nd described MCU7 comprises STC89C51 chip and the second peripheral circuit, and described LCDs 3 comprises 12864 chips and the 3rd peripheral circuit.The B end of R1, the R2 of the P0.0 end of the STC89C51 chip of the 2nd described MCU7, P0.1 end, P0.2 end, P0.3 end, P0.4 end, P0.5 end and the first peripheral circuit, R3, R4, R5, R6 connects one to one, and connects one to one with CE end, CS end, DATA end, CLK1 end, DR1 end, the PWR_UP end of nRF2401A chip simultaneously; The second described peripheral circuit comprises: the peripheral crystal oscillating circuit of A reset circuit and A; A reset circuit is connected with the RST end of STC89C51 chip; The peripheral crystal oscillating circuit of A is connected with XTAL1 end and the XTAL2 end of STC89C51 chip respectively; The 3rd described peripheral circuit comprises: range is the slide rheostat of 2K Ω, and the cursor slide end of slide rheostat is connected with the pin 3 of 12864 chips, a end ground connection of slide rheostat, and b end is connected with the pin two of power supply and 12864 chips respectively; The pin one of 12864 chips, 20 ground connection, pin two, 17,19 is connected with power supply; The T1 of 12864 chips holds, WR holds, T0 holds, RD end is held with the T1 of STC89C51 chip,
end, T0 end,
connect.Described system also comprises: PC terminal 8, and PC terminal 8 is provided with mapping program, and PC terminal 8 is connected with a MCU6 and the 5th peripheral circuit by max232 serial port chip and the 4th peripheral circuit.The R1OUT end of described max232 serial port chip and T1IN end connect one to one with RXD end and the TXD end of STC15F2K60S2 chip, the 4th described peripheral circuit comprises: the exclusion of 9 pins and capacitor C 1, C2, C3, C4, C5, pin 5 ground connection of exclusion, pin 3 is connected with the TIOUT end of max232 serial port chip, pin two is connected with the R1IN end of max232 serial port chip, capacitor C 1 is connected with C1+ end and the C1-end of max232 serial port chip respectively, capacitor C 2 is connected with C2+ end and the C2-end of max232 serial port chip respectively, capacitor C 3 is connected with V+ end and the Vcc end of max232 serial port chip respectively, capacitor C 4 is connected with Vcc end and the GND end of max232 serial port chip respectively, one end ground connection of capacitor C 5, the other end is connected with the V-end of max232 serial port chip, the 5th described peripheral circuit comprises: the peripheral crystal oscillating circuit of B reset circuit and B, and B reset circuit is connected with the RST end of STC15F2K60S2 chip, the peripheral crystal oscillating circuit of B is connected with XTAL1 end, the XTAL2 end of STC15F2K60S2 chip.Hardware in the present embodiment is commercially available prod.
Embodiment 3: a kind of multi-display parallel display system, as shown in Figure 1, comprise m display driver circuit 1, a n display control circuit 2 and n LCDs 3, display driver circuit 1 is provided with A wireless receiving and dispatching module 4, display control circuit 2 is provided with B wireless receiving and dispatching module 5, A wireless receiving and dispatching module 4 and 5 wireless connections of B wireless receiving and dispatching module, and adopt diffusion routing algorithm and CSMA/CD agreement to communicate; N display control circuit 2 connects one to one with n LCDs 3.
The operation principle of a kind of embodiment of the present utility model:
Send out public notice as example taking building pipe (property): locate to be provided with 8 and 1 display driver circuit 1 of 1 PC terminal at building pipe (property), PC terminal input message is in display driver circuit 1; Each residential quarter is all provided with 2 and 1 LCDs 3 of 1 display control circuit (supposing total n community), and LCDs 3 is controlled by display control circuit 2.Display driver circuit 1 is provided with A wireless receiving and dispatching module 4 and a MCU6, display control circuit 2 is provided with B wireless receiving and dispatching module 5 and the 2nd MCU7, A wireless receiving and dispatching module 4 has formed a wireless data transmission network with B wireless receiving and dispatching module 5, adopt diffusion routing algorithm and CSMA/CD agreement to communicate, now m LCDs 3 will show the data of inputting in the PC of property place terminal in real time.Without removing to put up advice note to each community.
The operation principle of another kind of embodiment of the present utility model:
Carry out radio meter register as example taking certain unit of certain residential building: locate 1 LCDs 3 towards owner at building pipe (property), this LCDs 3 is controlled by display control circuit 2.This unit is often equipped with per family display driver circuit 1 and drives (supposing m family altogether), and the input of display driver circuit 1 is respectively water meter information, ammeter information, estate management platform etc.Display driver circuit 1 is provided with A wireless receiving and dispatching module 4 and a MCU6, display control circuit 2 is provided with B wireless receiving and dispatching module 5 and the 2nd MCU7, A wireless receiving and dispatching module 4 has formed a wireless data transmission network with B wireless receiving and dispatching module 5, adopt diffusion routing algorithm and CSMA/CD agreement to communicate, now LCDs 3 will show required data in real time.Do not need working master's house that data wire is linked into property place, every part only needs independently Power supply.
Claims (10)
1. a multi-display parallel display system, it is characterized in that: comprise m display driver circuit (1), a n display control circuit (2) and n LCDs (3), display driver circuit (1) is provided with A wireless receiving and dispatching module (4), display control circuit (2) is provided with B wireless receiving and dispatching module (5), A wireless receiving and dispatching module (4) and B wireless receiving and dispatching module (5) wireless connections; N display control circuit (2) connects one to one with n LCDs (3).
2. multi-display parallel display system according to claim 1, is characterized in that, described A wireless receiving and dispatching module (4) and B wireless receiving and dispatching module (5) are by nRF2401A chip and the first peripheral circuit composition.
3. multi-display parallel display system according to claim 2, it is characterized in that, the first described peripheral circuit comprises: 6 resistance R 1, R2, R3, R4, R5, R6, the A end of R1, R2, R3, R4, R5, R6 is connected with Vcc end and the CLK2 end of nRF2401A chip respectively, and the B end of R1, R2, R3, R4, R5, R6 connects one to one with the CE end of nRF2401A chip, CS end, DATA end, CLK1 end, DR1 end, PWR_UP end.
4. multi-display parallel display system according to claim 3, it is characterized in that, described display driver circuit (1) also comprises: a MCU(6), a MCU(6) be connected a MCU(6 with A wireless receiving and dispatching module (4)) employing STC15F2K60S2 chip.
5. multi-display parallel display system according to claim 4, it is characterized in that, the B end of R1, the R2 of the P0.0 end of described STC15F2K60S2 chip, P0.1 end, P0.2 end, P0.3 end, P0.4 end, P0.5 end and the first peripheral circuit, R3, R4, R5, R6 connects one to one, and connects one to one with CE end, CS end, DATA end, CLK1 end, DR1 end, the PWR_UP end of nRF2401A chip simultaneously.
6. according to the arbitrary described multi-display parallel display system of claim 1～5, it is characterized in that, described display control circuit (2) also comprises: the 2nd MCU(7), the 2nd MCU(7) be connected with B wireless receiving and dispatching module (5) and LCDs (3) respectively, the 2nd described MCU(7) comprise STC89C51 chip and the second peripheral circuit, described LCDs (3) comprises 12864 chips and the 3rd peripheral circuit.
7. multi-display parallel display system according to claim 6, it is characterized in that, the 2nd described MCU(7) the P0.0 end, P0.1 end, P0.2 end, P0.3 end, P0.4 end, P0.5 end of STC89C51 chip and the B end of R1, the R2 of the first peripheral circuit, R3, R4, R5, R6 connect one to one, connect one to one with CE end, CS end, DATA end, CLK1 end, DR1 end, the PWR_UP end of nRF2401A chip simultaneously; The second described peripheral circuit comprises: the peripheral crystal oscillating circuit of A reset circuit and A; A reset circuit is connected with the RST end of STC89C51 chip; The peripheral crystal oscillating circuit of A is connected with XTAL1 end and the XTAL2 end of STC89C51 chip respectively; The 3rd described peripheral circuit comprises: range is 2
slide rheostat, the cursor slide end of slide rheostat is connected with the pin 3 of 12864 chips, a of slide rheostat end ground connection, b end is connected with the pin two of power supply and 12864 chips respectively; The pin one of 12864 chips, 20 ground connection, pin two, 17,19 is connected with power supply; The T1 of 12864 chips holds, WR holds, T0 holds, RD end is held with the T1 of STC89C51 chip,
end, T0 end,
connect.
8. multi-display parallel display system according to claim 5, it is characterized in that, described system also comprises: PC terminal (8), PC terminal (8) is by max232 serial port chip and the 4th peripheral circuit and a MCU(6) and the 5th peripheral circuit be connected.
9. multi-display parallel display system according to claim 8, is characterized in that, the R1OUT end of described max232 serial port chip and T1IN end connect one to one with RXD end and the TXD end of STC15F2K60S2 chip, the 4th described peripheral circuit comprises: the exclusion of 9 pins and capacitor C 1, C2, C3, C4, C5, pin 5 ground connection of exclusion, pin 3 is connected with the TIOUT end of max232 serial port chip, pin two is connected with the R1IN end of max232 serial port chip, capacitor C 1 is connected with C1+ end and the C1-end of max232 serial port chip respectively, capacitor C 2 is connected with C2+ end and the C2-end of max232 serial port chip respectively, capacitor C 3 is connected with V+ end and the Vcc end of max232 serial port chip respectively, capacitor C 4 is connected with Vcc end and the GND end of max232 serial port chip respectively, one end ground connection of capacitor C 5, the other end is connected with the V-end of max232 serial port chip, the 5th described peripheral circuit comprises: the peripheral crystal oscillating circuit of B reset circuit and B, and B reset circuit is connected with the RST end of STC15F2K60S2 chip, the peripheral crystal oscillating circuit of B is connected with XTAL1 end, the XTAL2 end of STC15F2K60S2 chip.
10. multi-display parallel display system according to claim 1, is characterized in that, described
,
.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201420294692.0U CN203911970U (en) | 2014-06-04 | 2014-06-04 | Multi-display-screen concurrent display system |
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| CN201420294692.0U CN203911970U (en) | 2014-06-04 | 2014-06-04 | Multi-display-screen concurrent display system |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104009996A (en) * | 2014-06-04 | 2014-08-27 | 东北大学 | Multi-display-screen parallel display system |
| CN110955627A (en) * | 2019-12-25 | 2020-04-03 | 顾荣华 | Double-screen display |
| CN111883045A (en) * | 2019-04-15 | 2020-11-03 | 三星电子株式会社 | Display device and control method thereof |
-
2014
- 2014-06-04 CN CN201420294692.0U patent/CN203911970U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104009996A (en) * | 2014-06-04 | 2014-08-27 | 东北大学 | Multi-display-screen parallel display system |
| CN111883045A (en) * | 2019-04-15 | 2020-11-03 | 三星电子株式会社 | Display device and control method thereof |
| CN110955627A (en) * | 2019-12-25 | 2020-04-03 | 顾荣华 | Double-screen display |
| CN110955627B (en) * | 2019-12-25 | 2024-04-26 | 顾荣华 | Double-screen display |
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