CN203882588U - Pixel drive circuit, array substrate and display device - Google Patents

Pixel drive circuit, array substrate and display device Download PDF

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Publication number
CN203882588U
CN203882588U CN201420318421.4U CN201420318421U CN203882588U CN 203882588 U CN203882588 U CN 203882588U CN 201420318421 U CN201420318421 U CN 201420318421U CN 203882588 U CN203882588 U CN 203882588U
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transistor
memory capacitance
connects
voltage
line
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孙亮
王颖
孙拓
马占洁
殷新社
张林涛
皇甫鲁江
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Abstract

The utility model relates to the technical field of display and discloses a pixel drive circuit. The pixel drive circuit comprises a data line, a grid wire, a first power line, a second power line, a lighting element, a drive transistor, a storage capacitor, a reset unit, a data write-in unit, a compensation unit and a lighting control unit. The utility model further discloses an array substrate and a display device. The pixel drive circuit can compensate and eliminate display unevenness caused by a threshold voltage difference of the drive transistor.

Description

Pixel-driving circuit, array base palte and display device
Technical field
The utility model relates to display technique field, particularly a kind of pixel-driving circuit, array base palte and display device.
Background technology
Organic electroluminescent LED (Organic Light-Emitting Diode, OLED) is applied in high-performance active matrix light-emitting organic electroluminescence display tube more and more as a kind of current mode luminescent device.Traditional passive matrix ORGANIC ELECTROLUMINESCENCE DISPLAYS pipe (Passive Matrix OLED), along with the increase of display size, needs the driving time of shorter single pixel, thereby need to increase transient current, increases power consumption.The simultaneously application of large electric current can cause on tin indium oxide metal oxide line pressure drop excessive, and makes OLED operating voltage too high, and then reduces its efficiency.And active matrix OLED pipe (Active Matrix OLED, AMOLED) is by the switching transistor input OLED electric current of lining by line scan, can address these problems well.
In the pixel circuit design of AMOLED, the problem that mainly needs to solve is the heterogeneity of the OLED device brightness that drives of each AMOLED pixel drive unit.
First, AMOLED adopts thin film transistor (TFT) (Thin-Film Transistor, TFT) to build pixel drive unit and provides corresponding drive current for luminescent device.In prior art, mostly adopt low-temperature polysilicon film transistor or oxide thin film transistor.Compared with general amorphous silicon film transistor, low-temperature polysilicon film transistor and oxide thin film transistor have higher mobility and more stable characteristic, are more suitable for being applied to during AMOLED shows.But due to the limitation of crystallization process, the low-temperature polysilicon film transistor of making on large-area glass substrate, usually on such as the electrical parameter such as threshold voltage, mobility, there is heterogeneity, this heterogeneity can be converted into drive current difference and the luminance difference of OLED device, and by the perception of human eye institute, i.e. look uneven phenomenon.Although the homogeneity of oxide thin film transistor technique is better, but similar with amorphous silicon film transistor, under long-time pressurization and high temperature, its threshold voltage there will be drift, due to display frame difference, the threshold drift amount difference of panel each several part thin film transistor (TFT), can cause display brightness difference, due to this species diversity with before show image-related, be therefore often rendered as ghost phenomena.
Because the luminescent device of OLED is current driving apparatus, therefore, in the luminous pixel drive unit of driving luminescent device, the threshold property of its driving transistors is very large on drive current and the final brightness impact showing.Driving transistors is subject to voltage stress and illumination all can make its threshold value drift about, and this threshold values drift meeting is presented as brightness disproportionation in display effect.
In addition, the image element circuit of existing AMOLED, conventionally can be by the more complicated of the structural design of image element circuit in order to eliminate the impact that drive transistor threshold voltage is poor caused, and this can directly cause the image element circuit of AMOLED to make the reduction of yields.
Therefore,, for addressing the above problem, the utility model is badly in need of providing a kind of pixel drive unit and driving method thereof, image element circuit.
Utility model content
(1) technical matters that will solve
The technical problems to be solved in the utility model is: how to realize a kind of AMOLED pixel-driving circuit that has compensation and eliminate the ability of the demonstration inequality that drive transistor threshold voltage is poor caused.
(2) technical scheme
For solving the problems of the technologies described above, the utility model provides a kind of pixel-driving circuit, comprise: data line, grid line, the first power lead, second source line, luminescent device, driving transistors, memory capacitance, reset unit, data write unit, compensating unit and luminous controling unit
Described data line is used for providing data voltage;
Described grid line is used for providing scanning voltage;
Described the first power lead is used for providing the first supply voltage, and described second source line is used for providing second source voltage;
Described reset unit connects described the first power lead and memory capacitance, is predetermined signal voltage for the voltage at the described memory capacitance two ends that reset;
Described data write unit connects the second end of grid line, data line and described memory capacitance, writes for the second end to described memory capacitance the information that comprises data voltage,
Described compensating unit connects first end and the driving transistors of grid line, memory capacitance, comprises the information of drive transistor threshold voltage and the information of the first supply voltage for writing to the first end of memory capacitance;
Described luminous controling unit connects the second end, driving transistors and the described luminescent device of described the first power lead, described memory capacitance, for writing described the first supply voltage to the second end of described memory capacitance, and it is luminous to control described driving transistors driving luminescent device;
The first end of described memory capacitance connects the grid of driving transistors, for comprising that the information transcription of data voltage is to the grid of driving transistors;
Described driving transistors connects the first power lead, described luminescent device connects second source line, and described driving transistors comprises that for basis under the control of luminous controling unit the information control flow of described data voltage, drive transistor threshold voltage and the first supply voltage is to the size of current of luminescent device.
Wherein, described reset unit comprises: reset control line, reseting signal line, the first transistor and transistor seconds, the grid of described the first transistor connects described reset control line, source electrode and connects the first end that described reseting signal line, drain electrode connect described memory capacitance, and described the first transistor is for writing reseting signal line voltage the first end of described memory capacitance; The grid of described transistor seconds connects described reset control line, source electrode and connects the second end that described the first power lead, drain electrode connect described memory capacitance, and described transistor seconds is for writing described the first supply voltage at the second end of described memory capacitance.
Wherein, described the first transistor and transistor seconds are P transistor npn npn.
Wherein, described data write unit comprises: the 4th transistor, described the 4th transistorized grid connects described grid line, source electrode and connects the second end that described data line, drain electrode connect described memory capacitance, and described the 4th transistor is for writing data voltage at the second end of memory capacitance.
Wherein, described the 4th transistor is P transistor npn npn.
Wherein, described compensating unit comprises: the 3rd transistor, described the 3rd transistorized grid connects described grid line, source electrode connects the first end of described memory capacitance, the drain electrode that drain electrode connects described driving transistors, and described the 3rd transistor is for comprising that the threshold voltage information of driving transistors and the information of the first supply voltage write the first end of described memory capacitance.
Wherein, described the 3rd transistor is P transistor npn npn.
Wherein, described luminous controling unit comprises: light emitting control line, the 5th transistor and the 6th transistor; Described the 5th transistorized grid connects described light emitting control line, source electrode and connects the second end that described the first power lead, drain electrode connect described memory capacitance, described the 5th transistor is for described the first supply voltage being write to the second end of memory capacitance, and by memory capacitance transcription to drive transistor gate; Described the 6th transistorized grid connects described light emitting control line, source electrode and connects the drain electrode that described luminescent device, drain electrode connect described driving transistors, it is luminous that described the 6th transistor is used for controlling luminescent device, and described driving transistors comprises that for basis under the control of luminous controling unit the information control flow of described data voltage, drive transistor threshold voltage and the first supply voltage is to the size of current of luminescent device.
Wherein, described the 5th transistor and the 6th transistor are P transistor npn npn.
Wherein, described driving transistors is P transistor npn npn.
The utility model also provides a kind of array base palte, comprises the pixel-driving circuit described in above-mentioned any one.
The utility model also provides a kind of display device, comprises above-mentioned array base palte.
(3) beneficial effect
Pixel drive unit of the present utility model, the structure being connected with drain electrode by the grid of driving transistors is (in the time that grid control signal is opened, the grid of driving transistors is connected by the 3rd switching transistor with drain electrode), make the drain electrode of described driving transistors that described the first supply voltage is loaded on to memory capacitance first end together with the threshold voltage of described driving transistors, and offset the threshold voltage of driving transistors with this; Can be in the process that luminescent device is driven, the ghost phenomena of effectively eliminating heterogeneity that driving transistors causes by self threshold voltage and causing because of threshold voltage shift; Avoid between the luminescent device of different pixels driver element in active matrix light-emitting organic electroluminescence display tube the problem because of the different active matrix light-emitting organic electroluminescence display tube brightness disproportionations that cause of threshold voltage of its driving transistors; Improve the driving effect of pixel drive unit to luminescent device, further improved the quality of active matrix light-emitting organic electroluminescence display tube.
Brief description of the drawings
Fig. 1 is a kind of pixel-driving circuit figure of the utility model embodiment;
Fig. 2 is the sequential chart of pixel-driving circuit in Fig. 1.
Embodiment
Below in conjunction with drawings and Examples, embodiment of the present utility model is described in further detail.Following examples are used for illustrating the utility model, but are not used for limiting scope of the present utility model.
It should be noted that, in the utility model embodiment, defined each transistorized grid is to control one end that transistor is opened, source electrode and drain electrode are the two ends of transistor except grid, source electrode and the transistorized annexation for convenience of description that drains just herein, be not the restriction that current trend is done, those skilled in the art can clearly know according to contents such as transistorized type, signal connected modes principle and the state of its work.
As shown in Figure 1, the pixel-driving circuit of the utility model embodiment, comprising: data line Data, grid line Gate, the first power lead ELVDD, second source line ELVSS, luminescent device D, driving transistors T7, memory capacitance C1, reset unit, data write unit, compensating unit and luminous controling unit.Wherein, data line Data is used for providing data voltage, and grid line Gate is used for providing scanning voltage, and the first power lead ELVDD is used for providing the first supply voltage V dd, second source line ELVSS is used for providing second source voltage V ss.
Luminescent device D can be Organic Light Emitting Diode.The grid of driving transistors T7 connects the first end N1 of described memory capacitance C1, and source electrode connects described the first power lead ELVDD, and drain electrode connects described luminous controling unit.
Reset unit connects the first power lead ELVDD and memory capacitance C1, is predetermined voltage for the voltage at the memory capacitance C1 two ends that reset.
Data write unit connects the second end N2 of grid line Gate, data line Data and memory capacitance C1, writes for the second end N2 to memory capacitance C1 the information that comprises data voltage.
Compensating unit connects first end N1 and the driving transistors T7 of grid line Gate, memory capacitance C1, writes and comprises the threshold voltage information of driving transistors and the information of the first supply voltage to the first end N1 of memory capacitance C1.
Luminous controling unit connects the second end N2, driving transistors T7 and the luminescent device D of the first power lead ELVDD, memory capacitance C1, writes the first supply voltage for the second end N2 to memory capacitance C1, and it is luminous to control driving transistors T7 driving luminescent device D.
The first end N1 of memory capacitance C1 connects the grid of driving transistors T7, for comprising that the information transcription of data voltage is to the grid of driving transistors T7.
Driving transistors T7 connects the first power lead ELVDD, luminescent device D connects second source line ELVSS, and described driving transistors T7 comprises that for basis under the control of luminous controling unit the information control flow of described data voltage, driving transistors T7 threshold voltage and the first supply voltage is to the size of current of luminescent device D.
In the driving circuit of the present embodiment, extract the threshold voltage of driving transistors by compensating unit, in the process that luminescent device is driven, can offset with the threshold voltage of driving transistors T7, thereby the ghost phenomena that can effectively eliminate heterogeneity that driving transistors causes by self threshold voltage and cause because of threshold voltage shift, has avoided in active matrix organic electroluminescent display device different pixels because of the problem of the different display brightness inequalities that cause of threshold voltage of its driving transistors.
In the present embodiment, reset unit comprises: reset control line Reset, reseting signal line ini, the first transistor T1 and transistor seconds T2.The grid of the first transistor T1 connects the first end of reset control line Reset, source electrode connection reseting signal line ini, drain electrode connection memory capacitance C1, and the first transistor T1 is used for the voltage V of reseting signal line ini iniwrite the first end of memory capacitance C1.The grid connection reset control line Reset of transistor seconds T2, source electrode connect the second end of the first power lead ELVDD, drain electrode connection memory capacitance C1, and transistor seconds T2 is used for the voltage V of the first power lead ELVDD ddwrite the second end of memory capacitance C1.The voltage at C1 two ends of resetting is respectively V iniand V dd.
Data write unit comprises: the 4th transistor T 4.The grid of the 4th transistor T 4 connects the second end that grid line Gate, source electrode connection data line Data, drain electrode connect memory capacitance C1, and the 4th transistor T 4 is for by data voltage V datawrite the second end of memory capacitance.Even if the voltage that N2 is ordered is V data.
Compensating unit comprises that the grid of the 3rd transistor T 3, the three transistor Ts 3 connects grid line Gate, source electrode connects the first end of memory capacitance C1, the drain electrode that drain electrode connects driving transistors T7, and the 3rd transistor T 3 is for comprising the threshold voltage V of driving transistors T7 thinformation and the information of the first supply voltage write the first end of memory capacitance C1, the voltage that N1 is ordered is V dd-V th, V thfor the threshold voltage of driving transistors T7.
Luminous controling unit comprises: light emitting control line EM, the 5th transistor T 5 and the 6th transistor T 6.The grid of the 5th transistor T 5 connects light emitting control line EM, source electrode and connects the second end that the first power lead ELVDD, drain electrode connect memory capacitance C1, and the 5th transistor T 5 is for by the first supply voltage V ddwrite the second end of memory capacitance C1, and by memory capacitance C1 transcription the grid to driving transistors T7.The grid of the 6th transistor T 6 connects light emitting control line EM, source electrode connects the first end of luminescent device D, the drain electrode that drain electrode connects driving transistors T7, the 6th transistor T 6 is luminous for controlling luminescent device D, and when T6 opens, driving transistors T7 just can make drive current flow to luminescent device D.Driving transistors T7 basis under the control of luminous controling unit comprises described data voltage V data, drive transistor threshold voltage V thwith the first supply voltage V ddinformation control flow to the size of current of luminescent device D.
As shown in Figure 2, when the circuit structure of the present embodiment is worked, comprise three phases:
First stage t1: reseting stage, after LED control signal is closed, the memory capacitance C1 two ends in Fig. 1 are resetted, reseting controling signal Reset signal is effective, and T1 and T2 open, the second end of memory capacitance C1, the voltage that N2 is ordered is the first supply voltage V dd, the voltage that the first end N1 of memory capacitance C1 is ordered is reseting signal line voltage V ini.Reseting signal line voltage V iniwith the first supply voltage V ddfor the original state of memory capacitance C1.
Subordinate phase t2: grid line signal is effective, opens T3, T4, N2 point data writing voltage V data, N1 point writes the threshold voltage of the first supply voltage and driving transistors, is V dd-V th, now the voltage of memory capacitance C1 storage is V dd-V th-V data.The effect of this stage T3 is exactly the first end that the information of threshold voltage that comprises the first supply voltage information and driving transistors is write to described memory capacitance C1, has extracted the threshold voltage of driving transistors.
Phase III t3: glow phase, the signal of light emitting control line EM is effective, and T5, T6 open, and T5 connects the first power lead ELVDD, and N2 point current potential is V dd, N1 point current potential is V dd-V th-V data+ V dd, this is the grid potential of driving transistors namely, and the source potential of driving transistors is V dd, gate source voltage V gsfor V dd-V th-V data+ V dd-V dd, the electric current that flows to luminescent device is I=1/2 μ C ox(W/L) (V gs-V th) 2=1/2 μ C ox(W/L) (V dd-V data) 2.Wherein, μ is carrier mobility, C oxfor gate oxide electric capacity, the breadth length ratio that W/L is driving transistors.
Formula by the above-mentioned electric current that flows to luminescent device can find out, this electric current I with the threshold voltage V of driving transistors T7 thirrelevant, therefore avoid in active matrix organic electroluminescent display device different pixels because of the problem of the different display brightness inequalities that cause of threshold voltage of its driving transistors.
Driving transistors in above-described embodiment, the first transistor, transistor seconds, the 3rd transistor, the 4th transistor, the 5th transistor, the 6th transistor are P transistor npn npn.Can certainly be N-type, or the combination of P type and N-type, just the useful signal difference of grid control signal line.
The utility model provides a kind of image element driving method of pixel-driving circuit of above-described embodiment, comprises following process:
Reseting stage, the reset voltage at described memory capacitance two ends of described reset unit is predetermined voltage;
Data voltage write phase, described data write unit is to the second end data writing voltage of described memory capacitance, and described compensating unit writes the threshold voltage information and the first supply voltage information that comprise driving transistors to the first end of memory capacitance;
Glow phase, described luminous controling unit writes described the first supply voltage to the second end of described memory capacitance, described memory capacitance will comprise that the information transcription of data voltage and the first supply voltage is to the grid of driving transistors, described driving transistors basis under the control of luminous controling unit comprises that the information control flow of described data voltage, drive transistor threshold voltage and the first supply voltage is to the size of current of luminescent device, to drive described luminescent device luminous.
At described reseting stage, the reset voltage at described memory capacitance two ends of described reset unit is respectively reseting signal line voltage and the first supply voltage.
Concrete actuation step can, referring to the introduction of three of an above-described embodiment working stage, not repeat herein.
The present embodiment provides a kind of array base palte, comprises the pixel-driving circuit of above-described embodiment.
The present embodiment provides a kind of display device, comprises above-mentioned array base palte.This display device can be: AMOLED panel, TV, digital album (digital photo frame), mobile phone, panel computer etc. have product or the parts of any Presentation Function.
Above embodiment is only for illustrating the utility model; and be not limitation of the utility model; the those of ordinary skill in relevant technologies field; in the situation that not departing from spirit and scope of the present utility model; can also make a variety of changes and modification; therefore all technical schemes that are equal to also belong to category of the present utility model, and scope of patent protection of the present utility model should be defined by the claims.

Claims (11)

1. a pixel-driving circuit, is characterized in that, comprising: data line, grid line, the first power lead, second source line, luminescent device, driving transistors, memory capacitance, reset unit, data write unit, compensating unit and luminous controling unit,
Described data line is used for providing data voltage;
Described grid line is used for providing scanning voltage;
Described the first power lead is used for providing the first supply voltage, and described second source line is used for providing second source voltage;
Described reset unit connects described the first power lead and memory capacitance, is predetermined signal voltage for the voltage at the described memory capacitance two ends that reset;
Described data write unit connects the second end of grid line, data line and described memory capacitance, writes for the second end to described memory capacitance the information that comprises data voltage,
Described compensating unit connects first end and the driving transistors of grid line, memory capacitance, comprises the information of drive transistor threshold voltage and the information of the first supply voltage for writing to the first end of memory capacitance;
Described luminous controling unit connects the second end, driving transistors and the described luminescent device of described the first power lead, described memory capacitance, for writing described the first supply voltage to the second end of described memory capacitance, and it is luminous to control described driving transistors driving luminescent device;
The first end of described memory capacitance connects the grid of driving transistors, for comprising that the information transcription of data voltage is to the grid of driving transistors;
Described driving transistors connects the first power lead, described luminescent device connects second source line, and described driving transistors comprises that for basis under the control of luminous controling unit the information control flow of described data voltage, drive transistor threshold voltage and the first supply voltage is to the size of current of luminescent device.
2. pixel-driving circuit as claimed in claim 1, it is characterized in that, described reset unit comprises: reset control line, reseting signal line, the first transistor and transistor seconds, the grid of described the first transistor connects described reset control line, source electrode and connects the first end that described reseting signal line, drain electrode connect described memory capacitance, and described the first transistor is for writing reseting signal line voltage the first end of described memory capacitance; The grid of described transistor seconds connects described reset control line, source electrode and connects the second end that described the first power lead, drain electrode connect described memory capacitance, and described transistor seconds is for writing described the first supply voltage at the second end of described memory capacitance.
3. pixel-driving circuit as claimed in claim 2, is characterized in that, described the first transistor and transistor seconds are P transistor npn npn.
4. pixel-driving circuit as claimed in claim 1, it is characterized in that, described data write unit comprises: the 4th transistor, described the 4th transistorized grid connects described grid line, source electrode and connects the second end that described data line, drain electrode connect described memory capacitance, and described the 4th transistor is for writing data voltage at the second end of memory capacitance.
5. pixel-driving circuit as claimed in claim 4, is characterized in that, described the 4th transistor is P transistor npn npn.
6. pixel-driving circuit as claimed in claim 1, it is characterized in that, described compensating unit comprises: the 3rd transistor, described the 3rd transistorized grid connects described grid line, source electrode connects the first end of described memory capacitance, the drain electrode that drain electrode connects described driving transistors, and described the 3rd transistor is for comprising that the threshold voltage information of driving transistors and the information of the first supply voltage write the first end of described memory capacitance.
7. pixel-driving circuit as claimed in claim 6, is characterized in that, described the 3rd transistor is P transistor npn npn.
8. the pixel-driving circuit as described in any one in claim 1~7, is characterized in that, described luminous controling unit comprises: light emitting control line, the 5th transistor and the 6th transistor; Described the 5th transistorized grid connects described light emitting control line, source electrode and connects the second end that described the first power lead, drain electrode connect described memory capacitance, described the 5th transistor is for described the first supply voltage being write to the second end of memory capacitance, and by memory capacitance transcription to drive transistor gate; Described the 6th transistorized grid connects described light emitting control line, source electrode and connects the drain electrode that described luminescent device, drain electrode connect described driving transistors, it is luminous that described the 6th transistor is used for controlling luminescent device, and described driving transistors comprises that for basis under the control of luminous controling unit the information control flow of described data voltage, drive transistor threshold voltage and the first supply voltage is to the size of current of luminescent device.
9. pixel-driving circuit as claimed in claim 8, is characterized in that, described driving transistors, described the 5th transistor and the 6th transistor are P transistor npn npn.
10. an array base palte, is characterized in that, comprises the pixel-driving circuit as described in any one in claim 1~9.
11. 1 kinds of display device, is characterized in that, comprise array base palte as claimed in claim 10.
CN201420318421.4U 2014-06-13 2014-06-13 Pixel drive circuit, array substrate and display device Expired - Lifetime CN203882588U (en)

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