CN203840302U

CN203840302U - Time-delay control circuit

Info

Publication number: CN203840302U
Application number: CN201420156484.4U
Authority: CN
Inventors: 黄海波
Original assignee: Chongqing Shu Fu Electric Applicance Co Ltd
Current assignee: Chongqing Shu Fu Electric Applicance Co Ltd
Priority date: 2014-04-02
Filing date: 2014-04-02
Publication date: 2014-09-17
Anticipated expiration: 2024-04-02

Abstract

The utility model provides a time-delay control circuit which comprises a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor RP, a capacitor C1, a capacitor C2, a capacitor C3, a first inverter, a second inverter, a transistor, a relay, a first counter CD4060 and a second counter CD4518. The circuit is based on the principle that the CD4060 forms a time-base circuit of a timer, the circuit generates timing time-based pulse and outputs time-based signal via an inner frequency divider, an external frequency division circuit divides frequencies to obtain required timing control time. Time control precision is improved through internal and external frequency division, and the problem that inaccurate time-delay circuit affects the control effects of related devices in the prior art can be solved.

Description

A kind of delay control circuit

Technical field

The utility model relates to fire prevention field, is mainly to utilize circuit to realize prophylactic function, more specifically, particularly relates to a kind of warning circuit of fire preventing.

Background technology

In various disasters, fire is the most often, threatens the most at large one of major casualty of public security and social development, and the mankind can utilize and control fire, is an important symbol of civilization and progress.Thus the mankind to use fiery history and the history of struggling with fire be interpromoting relation in five elements together, people, with in fiery, constantly sum up the rule of fire generation, the harm that reduces as much as possible fire and the mankind are caused.

In today of modern science and technology development, people can utilize various advanced persons or more the method for science fire is detected or prevents, reach fire nipped in the bud.For example, in electric fire disaster monitoring field, just relate to principles such as utilizing inductance fire is made to prevention and monitoring.

In fire prevention field, sometimes need some equipment to carry out timing or time delay ground switch, this mainly realizes by circuit, and the existing delay control circuit that equipment is controlled lacks certain accuracy, thereby affect the effect of relevant device and control, thereby necessary existing delay control circuit is improved.

Utility model content

In view of the above, the purpose of this utility model is to provide a kind of delay control circuit, thereby for solving the not high problem that affects the effect of relevant device and control of prior art delay circuit accuracy.

For achieving the above object and other relevant objects, the utility model provides following technical scheme:

A kind of delay control circuit, comprise resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6, resistance R P, capacitor C 1, capacitor C 2, capacitor C 3, the first inverter, the second inverter, transistor, relay, and first counter CD4060 and the second counter CD4518, wherein, in this first counter CD4060, one end of pin 8 ground connection contact resistance R6, the other end of this resistance R 6 connects the negative pole of capacitor C 3, the positive pole of this capacitor C 3 connects power Vcc, pin 9 is connected in series capacitor C 1 successively, resistance R P, and after resistance R 2, be connected in pin one 0, resistance R 1 one end is connected in pin one 1, the other end of resistance R 1 is connected between this capacitor C 1 and resistance R P, pin one 6 connects this power Vcc, in this second counter CD4060, pin one connects the pin one 4 in this first counter CD4060, pin one connects the output of the second inverter, pin 6 connects the input of the first inverter, and the output of this first inverter connects the input of this second inverter, one end of 7 while of pin contact resistance R3 and the negative pole of capacitor C 2, the other end ground connection of this resistance R 3, the positive pole of this capacitor C 2 connects this power Vcc, pin 8 ground connection, and pin one 6 connects this power Vcc, in this transistor, one end of transistorized base stage while contact resistance R4 and one end of resistance R 5, the other end of this resistance R 4 connects the output of this first inverter, and transistorized grounded emitter also connects one end of this resistance R 5, transistorized collector connection relay simultaneously.

In the above delay control circuit, this delay control circuit also comprises the first switch and second switch, between this first switch serial connection and the pin one 2 and power Vcc of this first counter CD4060, and the two ends of this second switch parallel connection and this capacitor C 2.

Further, in the above delay control circuit, this capacitor C 1 is potsherd electric capacity, and this capacitor C 2 and capacitor C 3 are alminium electrolytic condenser; Resistance R 1 in this delay control circuit, resistance R 2, resistance R 3, resistance R 4, resistance R 5 and resistance R 6 are metal film resistor; This relay is the direct current relay of model JZC-6F.

As mentioned above, a kind of delay control circuit of the utility model consists of the time-base circuit of timer CD4060, by circuit, produced timing time main pulse, by exporting time-base signal after inner frequency divider frequency division, again by the frequency dividing circuit frequency division of peripheral hardware, obtain the needed timing controlled time, by inside and outside frequency division, improve like this precision in control time, thereby thereby solved well the not high problem that affects the effect of relevant device and control of delay circuit accuracy in prior art.

Accompanying drawing explanation

In order to be illustrated more clearly in the scheme in the utility model embodiment, to be briefly described describing the accompanying drawing of required use in specific embodiment below, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those skilled in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.

Fig. 1 is the circuit theory diagrams of a kind of delay control circuit of the utility model.

Embodiment

Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is clearly and completely described, obviously, described embodiment is only a part of embodiment of the present utility model, rather than whole embodiment.Based on embodiment of the present utility model, all other embodiment that those of ordinary skills obtain under the prerequisite of not making creative work, belong to the scope that the utility model is protected.

Please refer to Fig. 1, show the circuit theory diagrams of a kind of delay control circuit of the utility model, a kind of delay control circuit, comprise resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6, resistance R P, capacitor C 1, capacitor C 2, capacitor C 3, the first inverter, the second inverter, transistor, relay, and first counter CD4060 and the second counter CD4518, wherein, in this first counter CD4060, one end of pin 8 ground connection contact resistance R6, the other end of this resistance R 6 connects the negative pole of capacitor C 3, the positive pole of this capacitor C 3 connects power Vcc, pin 9 is connected in series capacitor C 1 successively, resistance R P, and after resistance R 2, be connected in pin one 0, resistance R 1 one end is connected in pin one 1, the other end of resistance R 1 is connected between this capacitor C 1 and resistance R P, pin one 6 connects this power Vcc, in this second counter CD4060, pin one connects the pin one 4 in this first counter CD4060, pin one connects the output of the second inverter, pin 6 connects the input of the first inverter, and the output of this first inverter connects the input of this second inverter, one end of 7 while of pin contact resistance R3 and the negative pole of capacitor C 2, the other end ground connection of this resistance R 3, the positive pole of this capacitor C 2 connects this power Vcc, pin 8 ground connection, and pin one 6 connects this power Vcc, in this transistor, one end of transistorized base stage while contact resistance R4 and one end of resistance R 5, the other end of this resistance R 4 connects the output of this first inverter, and transistorized grounded emitter also connects one end of this resistance R 5, transistorized collector connection relay simultaneously.Be to be understood that, in above to the description of schematic diagram, may also relate to some connected modes about power supply is not explained, but in the art, it is the most basic that power supply connects, and in respective element, have corresponding prompting to indicate, and be also to those skilled in the art understand thoroughly known.

Closer, below the operation principle to the above circuit is described: first, after energising, time-base generator concussion in the first counter CD4060 is through the backward outer output time-base signal of frequency division, the second counter CD4060 as frequency divider starts to count frequency division, when counting down to 10, the pin 6 output high level of the second counter CD4060, this high level makes transistor cut-off through the anti-phase low level that becomes of inverter D1, relay power-off discharges, cut off controlled circuit working power, meanwhile, the low level that D1 exports is anti-phase for adding to the pin one end of the second counter CD4060 after high level through inverter D2, the high level of output output is kept, secondly, after power on circuitry resets the first counter CD4060, the second counter CD4060, four outputs of the second counter CD4060 are low level, and the low level of pin 6 outputs of the second counter CD4060 is through the anti-phase high level that becomes of D1, by resistance R 4, make transistor turns, relay power inhale and, thereby this operating state is for start is connected, off-state regularly.

In addition, it should be noted that, if change, start disconnects, definition status, can between output inverter D1 and transistor, add in the 3rd inverter D3(figure and not give and specifically illustrating); And the length of timing, can adjust by resistance R P, also can be according to the corresponding relation of BCD coding, by the connection of the output of the second counter CD4060 is changed.

In sum, the utility model has effectively overcome various shortcoming of the prior art and tool high industrial utilization.

Claims

1. a delay control circuit, comprise resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6, resistance R P, capacitor C 1, capacitor C 2, capacitor C 3, the first inverter, the second inverter, transistor, relay and the first counter CD4060 and the second counter CD4518, it is characterized in that:

In this first counter CD4060, one end of pin 8 ground connection contact resistance R6, the other end of this resistance R 6 connects the negative pole of capacitor C 3, the positive pole of this capacitor C 3 connects power Vcc, pin 9 is connected in pin one 0 after being connected in series successively capacitor C 1, resistance R P and resistance R 2, resistance R 1 one end is connected in pin one 1, and the other end of resistance R 1 is connected between this capacitor C 1 and resistance R P, and pin one 6 connects this power Vcc;

In this second counter CD4060, pin one connects the pin one 4 in this first counter CD4060, pin one connects the output of the second inverter, pin 6 connects the input of the first inverter, and the output of this first inverter connects the input of this second inverter, one end of 7 while of pin contact resistance R3 and the negative pole of capacitor C 2, the other end ground connection of this resistance R 3, the positive pole of this capacitor C 2 connects this power Vcc, pin 8 ground connection, and pin one 6 connects this power Vcc;

In this transistor, one end of transistorized base stage while contact resistance R4 and one end of resistance R 5, the other end of this resistance R 4 connects the output of this first inverter, and transistorized grounded emitter also connects one end of this resistance R 5, transistorized collector connection relay simultaneously.

2. delay control circuit according to claim 1, it is characterized in that, this delay control circuit also comprises the first switch and second switch, between this first switch serial connection and the pin one 2 and power Vcc of this first counter CD4060, and the two ends of this second switch parallel connection and this capacitor C 2.

3. delay control circuit according to claim 1 and 2, is characterized in that, this capacitor C 1 is potsherd electric capacity, and this capacitor C 2 and capacitor C 3 are alminium electrolytic condenser.

4. delay control circuit according to claim 3, is characterized in that, the resistance R 1 in this delay control circuit, resistance R 2, resistance R 3, resistance R 4, resistance R 5 and resistance R 6 are metal film resistor.

5. delay control circuit according to claim 4, is characterized in that, this relay is the direct current relay of model JZC-6F.