CN203813788U - Coupling circuit for Ethernet PHY chip and optical module - Google Patents

Coupling circuit for Ethernet PHY chip and optical module Download PDF

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Publication number
CN203813788U
CN203813788U CN201320815874.3U CN201320815874U CN203813788U CN 203813788 U CN203813788 U CN 203813788U CN 201320815874 U CN201320815874 U CN 201320815874U CN 203813788 U CN203813788 U CN 203813788U
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CN
China
Prior art keywords
optical module
phy chip
transformer
pin
coupling circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN201320815874.3U
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Chinese (zh)
Inventor
熊伟
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3onedata Co ltd
Original Assignee
Sanwang Communication Technology Co Ltdshenzhen
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Filing date
Publication date
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Priority to CN201320815874.3U priority Critical patent/CN203813788U/en
Application granted granted Critical
Publication of CN203813788U publication Critical patent/CN203813788U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

The utility model discloses a coupling circuit for an Ethernet PHY chip and an optical module. The coupling circuit comprises a PHY chip and an optical module. A differential signal line of the PHY chip is coupled to a corresponding differential signal line of the optical module through a transformer. The central tap of a transformer winding connected with the PHY chip is connected with the bias voltage of the PHY chip. The central tap of a transformer winding connected with the optical module is connected with the bias voltage of the optical module. The coupling circuit is simple in structure and capable of decreasing circuit power consumption and improving circuit stability.

Description

The coupling circuit of a kind of ethernet PHY chip and optical module
[technical field]
The utility model relates to Ethernet light mouth switch, relates in particular to the coupling circuit of a kind of ethernet PHY chip and optical module.
[background technology]
The structure of traditional ethernet PHY chip and the coupling circuit of optical module as shown in Figure 1, between holding wire, adopt be on drop-down resistance configuration circuit, circuit structure complexity, in normal situation about using, when optical module work, power dissipation ratio is larger, and power supply unit is had relatively high expectations; The light mouth switch product that some industry is used, has certain restriction to supply current, may cause light mouth switch product driving force inadequate, causes equipment operation irregularity.
[summary of the invention]
The technical problems to be solved in the utility model be to provide a kind of simple in structure, circuit power consumption is little, the ethernet PHY chip of good stability and the coupling circuit of optical module.
In order to solve the problems of the technologies described above, the technical solution adopted in the utility model is, a coupling circuit for ethernet PHY chip and optical module, comprises that the differential signal line differential signal line corresponding with optical module of PHY chip and optical module, PHY chip is coupled by transformer; The centre cap of the Transformer Winding being connected with PHY chip connects the bias voltage of PHY chip, and the centre cap of the Transformer Winding being connected with optical module connects the bias voltage of optical module.
The coupling circuit of above-described ethernet PHY chip and optical module, transformer comprises the first transformer, the second transformer, the first electric capacity, the second electric capacity, the 3rd electric capacity and the 4th electric capacity, the RX+ pin of the first termination PHY chip of the first transformer secondary winding, the RX-pin of the second termination PHY chip, the first end of former limit winding connects the RD+ pin of optical module by the first electric capacity, the second end connects the RD-pin of optical module by the second electric capacity; The TX+ pin of the first termination PHY chip of the second transformer primary side winding, the TX-pin of the second termination PHY chip, the first end of secondary winding connects the TD+ pin of optical module by the 3rd electric capacity, and the second end connects the TD-pin of optical module by the 4th electric capacity; First centre cap of transformer secondary winding and the centre cap of the second transformer primary side winding connect the bias voltage of PHY chip, and the centre cap of the centre cap of the second transformer primary side winding and the first transformer secondary winding connects the bias voltage of optical module.
The coupling circuit of above-described ethernet PHY chip and optical module, the first end of the first end of transformer primary side winding and secondary winding is Same Name of Ends.
The coupling circuit of above-described ethernet PHY chip and optical module, comprises the first resistance, and the SD pin of PHY chip connects the SD pin of optical module by the first resistance.
The coupling circuit of above-described ethernet PHY chip and optical module, the turn ratio of transformer primary side winding and secondary winding is 1:1.
Between the optical module of the coupling circuit of the utility model ethernet PHY chip and optical module and PHY, on Adoption Network transformer, draw configuration circuit mode to carry out capacitive coupling, simple in structure, can reduce circuit power consumption, improve the stability of circuit.
[brief description of the drawings]
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Fig. 1 is the schematic diagram of the coupling circuit of prior art ethernet PHY chip and optical module.
Fig. 2 is the schematic diagram of the coupling circuit of the utility model embodiment 1 ethernet PHY chip and optical module.
Fig. 3 is the schematic diagram of the coupling circuit of the utility model embodiment 2 ethernet PHY chips and optical module.
[embodiment]
The principle of the coupling circuit of the utility model embodiment 1 ethernet PHY chip and optical module OP1 as shown in Figure 2, comprises PHY chip U2,1X9 optical module OP1, transformer T1, transformer T2, capacitor C 11, capacitor C 12, capacitor C 14, capacitor C 13 and resistance R 18.
The RX+ pin of the first termination PHY chip U2 of transformer T1 secondary winding, the RX-pin of the second termination PHY chip U2, the first end of former limit winding connects the RD+ pin of optical module OP1 by capacitor C 11, and the second end connects the RD-pin of optical module OP1 by capacitor C 12; The TX+ pin of the first termination PHY chip U2 of the former limit of transformer T2 winding, the TX-pin of the second termination PHY chip U2, the first end of secondary winding connects the TD+ pin of optical module OP1 by capacitor C 14, and the second end connects the TD-pin of optical module OP1 by capacitor C 13.
The turn ratio of transformer primary side winding and secondary winding is 1:1.The centre cap of the centre cap of transformer T1 secondary winding and the former limit of T2 winding meets the bias voltage VPHY of PHY chip U2, and the centre cap of the former limit of transformer T1 winding and the centre cap of T2 secondary winding meet the bias voltage VREF of optical module OP1; The first end of the former limit of transformer T1 winding and the first end of secondary winding are Same Name of Ends; The first end of the former limit of transformer T2 winding and the first end of secondary winding are Same Name of Ends.
In addition, the SD pin of PHY chip U2 connects the SD pin of optical module OP1 by the first resistance.
Two groups of high-speed differential signal lines of the ethernet PHY chip U2 of the coupling circuit of embodiment 1 ethernet PHY chip and optical module OP1: RX+(Ethernet is just receiving data), RX-(Ethernet receives data minus) and TX+(Ethernet transmission data are just), TX-(Ethernet sends data minus), through network transformer T1 and the T2 of 1CT:1CT, after ethernet PHY chip bias voltage VPHY and optical module bias voltage VREF draw configuration on two groups of high-speed differential signal lines are carried out, through C11, C12, C13, C14 carries out capacitive coupling, can allow AC signal pass through, link again on two groups of differential signal lines of optical module OP1, between this Ethernet optical module and PHY, on Adoption Network transformer, draw configuration circuit mode to carry out capacitance coupling circuit, just can reduce the power consumption of circuit, analyze from principle, what traditional circuit adopted is that upper drop-down resistance configuration circuit is realized, resistance consumption active power, thereby the power consumption of circuit is strengthened, what the above embodiment of the utility model adopted is on network transformer, to draw configuration circuit, network transformer is perceptual components and parts, does not consume active power, thereby effectively reduces the power consumption of whole circuit.In addition, optical module bias voltage VREF, gives optical module OP1 power supply, and guarantee optical module can normally be worked.
As shown in Figure 3, the optical module of the present embodiment is SFP optical module to the principle of the coupling circuit of the utility model embodiment 2 ethernet PHY chips and optical module OP1, and the pin of SFP optical module is different from 1X9 optical module, but circuit theory is identical with embodiment 1.
The explanation of 1X9 optical module pin:
Pin Title Functional description
1 VeeR Receiving unit ground
2 RD+ The output of receiving unit data minus
3 RD- Receiving unit data positive output
4 SD Light detecting signal
5 VccR Receiving unit power supply
6 VccT Radiating portion power supply
9 TD- The input of radiating portion data minus
8 TD+ Radiating portion data positive input
9 VeeT Radiating portion ground
The explanation of SFP optical module pin:
Pin Title Functional description
1 VeeT Radiating portion ground
2 TX_FAULT Radiating portion reports an error
3 TX_Disable Turn-off transmitting, high level or unsettled be effective
4 MOD_DEF(2) Module definition pin, the number of I2C communication is disturbed line
5 MOD_-DEF(1) Module definition pin, the clock line of I2C communication
6 MOD_DEF(0) Module definition pin, ground connection
9 Rate?Select Speed is selected
8 LOS LOS alarm
9 VeeR Receiving unit ground
10 VeeR Receiving unit ground
11 VeeR Receiving unit ground
12 RD- The output of receiving unit data minus
13 RD+ Receiving unit data positive output
14 VeeR Receiving unit ground
15 VccR Receiving unit power supply
16 VccT Radiating portion power supply
17 VeeT Radiating portion ground
18 TD+ Radiating portion data positive input
19 TD- The input of radiating portion data minus
20 VeeT Radiating portion ground

Claims (5)

1. a coupling circuit for ethernet PHY chip and optical module, comprises PHY chip and optical module, it is characterized in that, the differential signal line that the differential signal line of PHY chip is corresponding with optical module is coupled by transformer; The centre cap of the Transformer Winding being connected with PHY chip connects the bias voltage of PHY chip, and the centre cap of the Transformer Winding being connected with optical module connects the bias voltage of optical module.
2. the coupling circuit of ethernet PHY chip according to claim 1 and optical module, it is characterized in that, transformer comprises the first transformer, the second transformer, the first electric capacity, the second electric capacity, the 3rd electric capacity and the 4th electric capacity, the RX+ pin of the first termination PHY chip of the first transformer secondary winding, the RX-pin of the second termination PHY chip, the first end of former limit winding connects the RD+ pin of optical module by the first electric capacity, the second end connects the RD-pin of optical module by the second electric capacity; The TX+ pin of the first termination PHY chip of the second transformer primary side winding, the TX-pin of the second termination PHY chip, the first end of secondary winding connects the TD+ pin of optical module by the 3rd electric capacity, and the second end connects the TD-pin of optical module by the 4th electric capacity; First centre cap of transformer secondary winding and the centre cap of the second transformer primary side winding connect the bias voltage of PHY chip, and the centre cap of the centre cap of the second transformer primary side winding and the first transformer secondary winding connects the bias voltage of optical module.
3. the coupling circuit of ethernet PHY chip according to claim 2 and optical module, is characterized in that, the first end of the first end of transformer primary side winding and secondary winding is Same Name of Ends.
4. the coupling circuit of ethernet PHY chip according to claim 2 and optical module, is characterized in that, comprises the first resistance, and the SD pin of PHY chip connects the SD pin of optical module by the first resistance.
5. the coupling circuit of ethernet PHY chip according to claim 2 and optical module, is characterized in that, the turn ratio of transformer primary side winding and secondary winding is 1:1.
CN201320815874.3U 2013-12-11 2013-12-11 Coupling circuit for Ethernet PHY chip and optical module Expired - Lifetime CN203813788U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201320815874.3U CN203813788U (en) 2013-12-11 2013-12-11 Coupling circuit for Ethernet PHY chip and optical module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201320815874.3U CN203813788U (en) 2013-12-11 2013-12-11 Coupling circuit for Ethernet PHY chip and optical module

Publications (1)

Publication Number Publication Date
CN203813788U true CN203813788U (en) 2014-09-03

Family

ID=51452483

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201320815874.3U Expired - Lifetime CN203813788U (en) 2013-12-11 2013-12-11 Coupling circuit for Ethernet PHY chip and optical module

Country Status (1)

Country Link
CN (1) CN203813788U (en)

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C14 Grant of patent or utility model
GR01 Patent grant
CP03 Change of name, title or address
CP03 Change of name, title or address

Address after: 518000 Three Blocks in District 1, Baiwangxin High-tech Industrial Park, Xili Street, Nanshan District, Shenzhen City, Guangdong Province

Patentee after: 3ONEDATA Co.,Ltd.

Address before: 518000 East Block of 2 Buildings, 3 Floors, Jiuxiangling Industrial Zone, Xili Town, Nanshan District, Shenzhen City, Guangdong Province

Patentee before: SHENZHEN 3ONEDATA TECHNOLOGY CO.,LTD.

CX01 Expiry of patent term
CX01 Expiry of patent term

Granted publication date: 20140903