CN203813750U - Low-cost time-delay circuit for double-power-supply sequential power-on - Google Patents
Low-cost time-delay circuit for double-power-supply sequential power-on Download PDFInfo
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- CN203813750U CN203813750U CN201420117191.5U CN201420117191U CN203813750U CN 203813750 U CN203813750 U CN 203813750U CN 201420117191 U CN201420117191 U CN 201420117191U CN 203813750 U CN203813750 U CN 203813750U
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- 230000003111 delayed effect Effects 0.000 claims description 9
- 230000009286 beneficial effect Effects 0.000 abstract description 3
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Abstract
The utility model relates to a low-cost time-delay circuit for double-power-supply sequential power-on. The low-cost time-delay circuit is characterized in that the low-cost time-delay circuit is formed by the connection of a resistor R1, a triode Q1, a polarity capacitor EC1 and a capacitor C1, a collector electrode of the triode Q1 is externally connected with a power supply V1, an emitter electrode of the triode Q1 forms an output terminal of a time-delay power supply V2, a base electrode of the triode Q1 is connected to the ground via the polarity capacitor EC1, one terminal of the resistor R1 is connected with the power supply V1, the other terminal of the resistor R1 is connected with a connecting position of an anode of the polarity capacitor EC1 and the base electrode of the triode Q1, a cathode of the polarity capacitor EC1 is connected to the ground GND to form a time-delay conduction loop, a connecting position of the emitter electrode of the triode Q1 and the time-delay power supply V2 is connected to the ground GND via the capacitor C1 to form a time-delay voltage output loop, and the time-delay conduction loop and the time-delay voltage output loop form the output control of the time-delay power supply V2. The beneficial effects of the low-cost time-delay circuit are that discrete elements including the resistor R1, the triode Q1, the polarity capacitor EC1 and the capacitor C1 are connected, the circuit structure is simple, the cost is low, and the cost performance of products is improved.
Description
Technical field
The utility model relates to a kind of delay circuit, particularly a kind of low cost delay circuit for duplicate supply sequence power-on.Belong to electronic circuit technology field.
Background technology
At present, in many electronic circuit systems, need to use multiple power supplies powers, while particularly requiring two power supplys to connect at the same time, the power-on time of a power supply is than another power supply certain hour that will lag behind, to guarantee formerly after drive apparatus steady operation, follow-up equipment just order is devoted oneself to work, and ensures the safe operation of equipment.And in present technology, be generally to adopt power supply chip to realize electric sequence, there is the defect that increases hardware cost and take the resource of system in this employing IC chip method.
Utility model content
The purpose of this utility model, to adopt the time delay of IC chip to have the problem that increases hardware cost and take the resource of system in order to solve prior art, a kind of low cost delay circuit for duplicate supply sequence power-on is provided, has the advantages that circuit structure is simple, cost is low and save system resource.
The purpose of this utility model can be by taking following technical scheme to reach:
For a low cost delay circuit for duplicate supply sequence power-on, its design feature is: be formed by connecting by resistance R 1, triode Q1, polar capacitor EC1 and capacitor C 1; The collector electrode external power supply V1 of triode Q1, the emitter of triode Q1 forms time delay power supply V2 output, and the base stage of triode Q1 is by polar capacitor EC1 ground connection; The junction that one end of resistance R 1 is connected with power supply V1, the other end is connected polar capacitor EC1 positive pole and triode Q1 base stage, the minus earth GND of polar capacitor EC1, forms Delayed conducting loop; The junction of the emitter of triode Q1 and time delay power supply V2, by capacitor C 1 ground connection GND, forms time delay Voltage-output loop; By Delayed conducting loop and time delay Voltage-output loop, form time delay power supply V2 output and control.
A kind of execution mode of the present utility model is: described triode Q1 can be NPN type triode.
The beneficial effects of the utility model are:
1, the utility model adopts discrete component resistance R 1, triode Q1, polar capacitor EC1 and capacitor C 1 to be formed by connecting, and has circuit structure simple, the beneficial effect of low cost and raising product cost.
2, the utility model connects and composes charge circuit by resistance and polar capacitor, makes triode Delayed conducting in the time of power supply electrifying, by changing the parameter of resistance and electric capacity, regulates delay time; By the conducting time delay output voltage of triode, and by capacitor filtering, Voltage-output is more steady, realizes the object of many power supplys different delayed time power supply by minimum cost.
Brief description of the drawings
Fig. 1 is the circuit theory diagrams of the utility model specific embodiment 1.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described in further detail:
Specific embodiment 1:
With reference to Fig. 1, the present embodiment is formed by connecting by resistance R 1, triode Q1, polar capacitor EC1 and capacitor C 1; The collector electrode external power supply V1 of triode Q1, the emitter of triode Q1 forms time delay power supply V2 output, and the base stage of triode Q1 is by polar capacitor EC1 ground connection; The junction that one end of resistance R 1 is connected with power supply V1, the other end is connected polar capacitor EC1 positive pole and triode Q1 base stage, the minus earth GND of polar capacitor EC1, forms Delayed conducting loop; The junction of the emitter of triode Q1 and time delay power supply V2, by capacitor C 1 ground connection GND, forms time delay Voltage-output loop; By Delayed conducting loop and time delay Voltage-output loop, form time delay power supply V2 output and control.
In the present embodiment,
Resistance R 1, triode Q1, polar capacitor EC1 and capacitor C 1; The base stage of triode Q1 is connected with one end of resistance R 1, the positive pole of polar capacitor EC1, and the other end of resistance R 1 connects power supply V1, and the minus earth GND of polar capacitor EC1 forms charging Delayed conducting loop; The collector electrode of triode Q1 connects power supply V1, and the emitter of Q1 is connected as output with capacitor C 1 one end, and the other end ground connection GND of capacitor C 1 forms output loop.
Described triode Q1 is NPN type triode.
The operation principle of the present embodiment is as follows:
With reference to Fig. 1, one end of resistance R 1 is connected and meets power supply V1 as power input with the collector electrode of triode Q1, and the base stage of triode Q1 is connected with the positive pole of polar capacitor EC1, the other end of resistance R 1; The emitter of Q1 is as power output end, and its course of work is as follows:
1, the V1(that switches on power powers on), power supply V1 powers to preference faciltiy, now power input V1 mono-powers on, by resistance R 1, electrochemical capacitor EC1 is charged, triode Q1 base voltage is lower than conduction value, triode Q1 is in cut-off state, the emitter Non voltage output of Q1, i.e. output V2 Non voltage output;
2, along with the charging interval extends, the voltage at polar capacitor EC1 two ends constantly raises, in the time that the voltage at polar capacitor (electrochemical capacitor) EC1 two ends rises to a certain degree, turn-on transistor Q1 conducting, voltage V1 exports by collector and emitter, now time delay power supply V2 output has Voltage-output, thereby realizes the object to other equipment (follow-up equipment) time delay power supply, realizes the object of duplicate supply sequence power-on.
The delay time of this circuit is determined by the parameter of resistance R 1 and polar capacitor EC1, by regulating both sizes, can change delay time, and the time of its time delay is about:
T=1/(2*π*R*C)
Wherein R is the resistance of resistance R 1, and C is the capacitance size of polar capacitor EC1.
The above; it is only preferably specific embodiment of the utility model; but protection range of the present utility model is not limited to this; any be familiar with those skilled in the art the utility model disclose scope in; be equal to replacement or changed according to the technical solution of the utility model and utility model design thereof, all being belonged to protection range of the present utility model.
Claims (2)
1. for a low cost delay circuit for duplicate supply sequence power-on, it is characterized in that: be formed by connecting by resistance R 1, triode Q1, polar capacitor EC1 and capacitor C 1; The collector electrode external power supply V1 of triode Q1, the emitter of triode Q1 forms time delay power supply V2 output, and the base stage of triode Q1 is by polar capacitor EC1 ground connection; The junction that one end of resistance R 1 is connected with power supply V1, the other end is connected polar capacitor EC1 positive pole and triode Q1 base stage, the minus earth GND of polar capacitor EC1, forms Delayed conducting loop; The junction of the emitter of triode Q1 and time delay power supply V2, by capacitor C 1 ground connection GND, forms time delay Voltage-output loop; By Delayed conducting loop and time delay Voltage-output loop, form time delay power supply V2 output and control.
2. a kind of low cost delay circuit for duplicate supply sequence power-on according to claim 1, is characterized in that: described triode Q1 is NPN type triode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201420117191.5U CN203813750U (en) | 2014-03-13 | 2014-03-13 | Low-cost time-delay circuit for double-power-supply sequential power-on |
Applications Claiming Priority (1)
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CN201420117191.5U CN203813750U (en) | 2014-03-13 | 2014-03-13 | Low-cost time-delay circuit for double-power-supply sequential power-on |
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CN203813750U true CN203813750U (en) | 2014-09-03 |
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CN201420117191.5U Expired - Lifetime CN203813750U (en) | 2014-03-13 | 2014-03-13 | Low-cost time-delay circuit for double-power-supply sequential power-on |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105162443A (en) * | 2015-10-21 | 2015-12-16 | 珠海格力电器股份有限公司 | Periodic wake-up low-power-consumption timing circuit |
CN109729618A (en) * | 2018-12-13 | 2019-05-07 | 浙江凯耀照明股份有限公司 | A kind of multiple output circuit of multistage delayed startup |
CN109950881A (en) * | 2019-03-29 | 2019-06-28 | 成都信息工程大学 | A kind of embeddable type equipment preliminary examination protection circuit |
-
2014
- 2014-03-13 CN CN201420117191.5U patent/CN203813750U/en not_active Expired - Lifetime
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105162443A (en) * | 2015-10-21 | 2015-12-16 | 珠海格力电器股份有限公司 | Periodic wake-up low-power-consumption timing circuit |
CN105162443B (en) * | 2015-10-21 | 2018-07-03 | 珠海格力电器股份有限公司 | Periodic wake-up low-power-consumption timing circuit |
CN109729618A (en) * | 2018-12-13 | 2019-05-07 | 浙江凯耀照明股份有限公司 | A kind of multiple output circuit of multistage delayed startup |
CN109950881A (en) * | 2019-03-29 | 2019-06-28 | 成都信息工程大学 | A kind of embeddable type equipment preliminary examination protection circuit |
CN109950881B (en) * | 2019-03-29 | 2024-04-09 | 成都信息工程大学 | Embedded equipment pre-detection protection circuit |
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Granted publication date: 20140903 |
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CX01 | Expiry of patent term |