CN203761101U - Synchronous calibrator storage battery management circuit - Google Patents
Synchronous calibrator storage battery management circuit Download PDFInfo
- Publication number
- CN203761101U CN203761101U CN201420124671.4U CN201420124671U CN203761101U CN 203761101 U CN203761101 U CN 203761101U CN 201420124671 U CN201420124671 U CN 201420124671U CN 203761101 U CN203761101 U CN 203761101U
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- mcp73862t
- diode
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Abstract
The utility model discloses a synchronous calibrator storage battery management circuit, comprising a storage battery set, a chip MCP73862T connected to the storage battery set, and a voltage divider. The synchronous calibrator storage battery management circuit is advantageous in that charging management can be conducted on the charging process of the storage battery set; the storage battery set can be protected from being over-charged, and the service lifetime of the storage battery set can be prolonged.
Description
Technical field
The utility model relates to a kind of battery management circuit, relates in particular a kind of synchronization check instrument battery management circuit.
Background technology
Time synchronized tester, for the precision of checking time, is used for some and counts field accurately, as rocket launching, satellite navigation, astronomical clock etc. need the field that time precision is high.Time synchronized tester in use, has the demand of continuous electric moveable position, so batteries can be set therein.Because the batteries of time synchronized tester is just started working in the time there is no external power source, batteries is the vitals of time synchronized tester, is very important thing to the management of battery.
Utility model content
The utility model provides a kind of synchronization check instrument battery management circuit, and it carries out Charge Management to the charging process of batteries, and batteries is protected, and avoids batteries to overcharge, and extends the useful life of batteries.
For solving above-mentioned technical problem, the utility model by the following technical solutions:
Synchronization check instrument battery management circuit, it comprises chip MCP73862T and batteries E, the VDD2 pin of described chip MCP73862T, VDD1 pin, EN pin and VSET pin are all connected on power supply, on described VDD2 pin, be connected with capacitor C 1 and capacitor C 2, described capacitor C 1 and the other end ground connection of capacitor C 2, described capacitor C 1 is polar capacitor, the VBAT3 pin of described chip MCP73862T, VBAT2 pin and VBAT1 pin are all connected on batteries E, on described batteries E, be connected with resistance R 5, the other end of described resistance R 5 is connected to the ground by resistance R 6, the STAT1 pin of described chip MCP73862T and STAT2 pin are connected on the negative electrode of diode D1 and the negative electrode of diode D2, the anode of described diode D1 and the anode of diode D2 are all connected on power supply, described diode D1 and diode D2 are light-emitting diode, on the PROG pin of described chip MCP73862T, be connected with earth resistance R1, between the THERM pin of described chip MCP73862T and THREF pin, be connected with resistance R 2, on described THERM pin, be connected with earth resistance R3, on the TIMER pin of described chip MCP73862T, be connected with ground capacity C4.
Further technical scheme is:
As preferably, described resistance R 5 and the resistance value ratio of resistance R 6 are 9:1.
Further, on described THERM pin, be connected with earth resistance R4.
Further, on described VBAT3 pin, be connected with ground capacity C3, described capacitor C 3 is polar capacitor.
As preferably, described batteries E comprises 4 joint storage batterys, after two joint storage batterys series connection, saves the storage battery of connecting and is in parallel with another two.
As preferably, the resistance of described resistance R 1 is 1.6 kilohms.
Compared with prior art, the beneficial effects of the utility model are:
The bleeder circuit that utilizes chip MCP73862T and be made up of resistance R 1 and resistance R 2 of the present utility model carries out Charge Management to batteries, avoids batteries to overcharge, and batteries is protected, and extends the useful life of batteries.
Brief description of the drawings
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Fig. 1 is circuit diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further described.Execution mode of the present utility model includes but not limited to the following example.
[embodiment]
Synchronization check instrument battery management circuit as shown in Figure 1, it comprises chip MCP73862T and batteries E, the VDD2 pin of described chip MCP73862T, VDD1 pin, EN pin and VSET pin are all connected on power supply, on described VDD2 pin, be connected with capacitor C 1 and capacitor C 2, described capacitor C 1 and the other end ground connection of capacitor C 2, described capacitor C 1 is polar capacitor, the VBAT3 pin of described chip MCP73862T, VBAT2 pin and VBAT1 pin are all connected on batteries E, on described batteries E, be connected with resistance R 5, the other end of described resistance R 5 is connected to the ground by resistance R 6, the STAT1 pin of described chip MCP73862T and STAT2 pin are connected on the negative electrode of diode D1 and the negative electrode of diode D2, the anode of described diode D1 and the anode of diode D2 are all connected on power supply, described diode D1 and diode D2 are light-emitting diode, on the PROG pin of described chip MCP73862T, be connected with earth resistance R1, between the THERM pin of described chip MCP73862T and THREF pin, be connected with resistance R 2, on described THERM pin, be connected with earth resistance R3, on the TIMER pin of described chip MCP73862T, be connected with ground capacity C4.Chip MCP73862T is a Charge Management special chip, manages for the charge condition to batteries.Diode D1 and diode D2 indicate the charge cycle state of storage battery.Capacitor C 1 and capacitor C 2 are selected respectively positive temperature coefficient electric capacity and negative temperature coefficient electric capacity, can suppress the impact of variations in temperature, reach the object of temperature-compensating, effectively reach renting of decoupling and filtering, avoid disturbing the impact on chip MCP73862T.The resistance of resistance R 1 can determine the charging current of batteries.Utilize resistance R 5 and resistance R 6 to form bleeder circuit, the AD that the common port of resistance R 5 and resistance R 6 outputs signal to processor adopts pin can detect the storing electricity of current batteries.Utilize chip MCP73862T and bleeder circuit to manage the charging process of batteries, can effectively prevent over-charging of battery, extend the useful life of batteries.
Described resistance R 5 and the resistance value ratio of resistance R 6 are 9:1.Utilize bleeder circuit to detect the reserve of electricity of batteries, can protect processor, avoid that voltage is excessive to be damaged processor.Because batteries is full of after electricity; its magnitude of voltage is more than 10 V; utilize bleeder circuit to make AD adopt enough low could protections processor of voltage of pin; the resistance value ratio that is resistance R 5 and resistance R 6 should be large as much as possible; but for the ease of the processing of processor, the resistance value ratio of preferred resistance R 5 and resistance R 6 is 9:1.
On described THERM pin, be connected with earth resistance R4.
On described VBAT3 pin, be connected with ground capacity C3, described capacitor C 3 is polar capacitor.Capacitor C 3 can the interference of filtering interfering to battery charging, and batteries is protected.
Described batteries E comprises 4 joint storage batterys, after two joint storage batterys series connection, saves the storage battery of connecting and is in parallel with another two.Adopt 4 joint storage batterys to form batteries, effectively ensured the charge capacity of storage battery.Adopt after two joint storage batterys series connection with another two and save the form that the storage battery of connecting is in parallel, ensured the consistency of electric weight in battery charging process, also ensure the consistency of electric weight in discharge process, protect the useful life of storage battery.
The resistance of described resistance R 1 is 1.6 kilohms.The resistance of resistance R 1 determines the charging current of batteries, and the resistance of resistance R 1 is 1.6 kilohms, and the charging current that makes batteries is 500mA, and the charging current of 500mA can not damage storage battery.If electric current is excessive, easily storage battery is damaged, if electric current is too small, charge in batteries overlong time, impact is used.
In the present embodiment, as preferred embodiment, resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6 can adopt respectively 1.6 kilohms, 5 kilohms, 4 kilohms, 2 kilohms, 180 kilohms and 20 ohm; Diode D1 and its indicative function of diode D2, select lower-powered light-emitting diode; It is the electric capacity of 4.7 μ F, 0.1 μ F, 4.7 μ F, 0.1 μ F that capacitor C 1, capacitor C 2, capacitor C 3, capacitor C 4 can adopt capacitance.Through emulation, adopt the electronic device of above-mentioned specifications and models, it can make the performance of circuit reach optimum.
Be as mentioned above embodiment of the present utility model.The utility model is not limited to above-mentioned execution mode, and anyone should learn the structural change of making under enlightenment of the present utility model, every with the utlity model has identical or close technical scheme, within all falling into protection range of the present utility model.
Claims (6)
1. synchronization check instrument battery management circuit, it is characterized in that: it comprises chip MCP73862T and batteries E, the VDD2 pin of described chip MCP73862T, VDD1 pin, EN pin and VSET pin are all connected on power supply, on described VDD2 pin, be connected with capacitor C 1 and capacitor C 2, described capacitor C 1 and the other end ground connection of capacitor C 2, described capacitor C 1 is polar capacitor, the VBAT3 pin of described chip MCP73862T, VBAT2 pin and VBAT1 pin are all connected on batteries E, on described batteries E, be connected with resistance R 5, the other end of described resistance R 5 is connected to the ground by resistance R 6, the STAT1 pin of described chip MCP73862T and STAT2 pin are connected on the negative electrode of diode D1 and the negative electrode of diode D2, the anode of described diode D1 and the anode of diode D2 are all connected on power supply, described diode D1 and diode D2 are light-emitting diode, on the PROG pin of described chip MCP73862T, be connected with earth resistance R1, between the THERM pin of described chip MCP73862T and THREF pin, be connected with resistance R 2, on described THERM pin, be connected with earth resistance R3, on the TIMER pin of described chip MCP73862T, be connected with ground capacity C4.
2. synchronization check instrument battery management circuit according to claim 1, is characterized in that: described resistance R 5 and the resistance value ratio of resistance R 6 are 9:1.
3. synchronization check instrument battery management circuit according to claim 1 and 2, is characterized in that: on described THERM pin, be connected with earth resistance R4.
4. synchronization check instrument battery management circuit according to claim 3, is characterized in that: on described VBAT3 pin, be connected with ground capacity C3, described capacitor C 3 is polar capacitor.
5. synchronization check instrument battery management circuit according to claim 1, is characterized in that: described batteries E comprises 4 joint storage batterys, after two joint storage batterys series connection, saves the storage battery of connecting and is in parallel with another two.
6. synchronization check instrument battery management circuit according to claim 1, is characterized in that: the resistance of described resistance R 1 is 1.6 kilohms.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420124671.4U CN203761101U (en) | 2014-03-19 | 2014-03-19 | Synchronous calibrator storage battery management circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420124671.4U CN203761101U (en) | 2014-03-19 | 2014-03-19 | Synchronous calibrator storage battery management circuit |
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| Publication Number | Publication Date |
|---|---|
| CN203761101U true CN203761101U (en) | 2014-08-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420124671.4U Expired - Fee Related CN203761101U (en) | 2014-03-19 | 2014-03-19 | Synchronous calibrator storage battery management circuit |
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| Country | Link |
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| CN (1) | CN203761101U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103840527A (en) * | 2014-03-19 | 2014-06-04 | 成都引众数字设备有限公司 | Storage battery management circuit for synchronous calibration instrument |
-
2014
- 2014-03-19 CN CN201420124671.4U patent/CN203761101U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103840527A (en) * | 2014-03-19 | 2014-06-04 | 成都引众数字设备有限公司 | Storage battery management circuit for synchronous calibration instrument |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140806 Termination date: 20150319 |
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| EXPY | Termination of patent right or utility model |