CN203722640U - Electric loopback light module - Google Patents
Electric loopback light module Download PDFInfo
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- CN203722640U CN203722640U CN201420093791.2U CN201420093791U CN203722640U CN 203722640 U CN203722640 U CN 203722640U CN 201420093791 U CN201420093791 U CN 201420093791U CN 203722640 U CN203722640 U CN 203722640U
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- 238000011084 recovery Methods 0.000 claims abstract description 44
- 238000012360 testing method Methods 0.000 claims abstract description 30
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- QWCRAEMEVRGPNT-UHFFFAOYSA-N buspirone Chemical compound C1C(=O)N(CCCCN2CCN(CC2)C=2N=CC=CN=2)C(=O)CC21CCCC2 QWCRAEMEVRGPNT-UHFFFAOYSA-N 0.000 claims description 8
- 239000003985 ceramic capacitor Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 description 13
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- 230000032683 aging Effects 0.000 description 2
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- 238000005516 engineering process Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 238000012952 Resampling Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
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- 230000000694 effects Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
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Abstract
The utility model discloses an electric loopback light module used for connecting a light module interface of light communication system equipment being tested; the electric loopback light module comprises an interface, a clock data recovery circuit, a MCU and a FPGA; the interface is provided with a signal emission pin and a signal reception pin; the signal emission pin sends a signal to the clock data recovery circuit, the signal is processed by the clock data recovery circuit and outputted to the signal reception pin; the clock data recovery circuit respectively receives a control signal sent by the MCU and the FPGA; the MCU and the FPGA are in communication connection. The electric loopback light module is used to replace a normal light module, and plugged to the light module interface of the light communication system equipment so as to carry out system equipment tests, thereby reducing cost, improving reliability of the light communication system equipment; simultaneously, the clock data recovery circuit is built in the electric loopback light module, so reliability of signal transmission can be improved.
Description
Technical field
The utility model belongs to optical communication technique field, specifically, relates to a kind of optical module using in optical communication system equipment is carried out to system testing process.
Background technology
Optical communication system equipment is in the market in the time carrying out system testing, and the method adopting is all the conventional optical module of pegging graft on the light mouth of equipment.The light mouth here, refers to the terminal for being connected with the electrical interface of optical module on optical communication system equipment, also can be described as optical module interface.Peg graft after the above conventional optical module, need to use optical patchcord that the optical signal transceiver port of conventional optical module is coupled together, to realize the loopback of light signal, shown in Figure 1, and need on optical patchcord, install attenuator additional, then could start to carry out the operation test of system equipment, cause thus operating process very complicated.
On the other hand, every suit optical communication system equipment all will pass through strict test before dispatching from the factory, in test process, an indispensable important flow process is exactly high temperature scale mould, require veneer in hot environment, to move one period of considerable time, and function and the performance index of testing single-board during this period.The Optical Fiber Interface Board of Devices to test is in high temperature scale mold process, and one of its basic demand will ensure to occur miscellaneous service alarm and error code exactly, therefore requires Optical Fiber Interface Board to configure complete optical module and carries out high temperature scale mould test.But optical module had carried out high temperature ageing before dispatching from the factory, therefore, this method of testing can cause the overaging of optical module, causes its lost of life, and failure rate increases, thereby finally causes the reliability of optical communication system equipment to reduce.
Summary of the invention
The purpose of this utility model is to provide a kind of electric loopback optical module, substituting conventional optical module tests optical communication system, solve because existing optical communication system equipment need to connect the complicated operation that conventional optical module causes, the problem that easily causes optical module overaging in the time testing, thereby reduce operation easier, improved the reliability of system.
In order to solve the problems of the technologies described above, the utility model is achieved by the following technical solutions:
A kind of electric loopback optical module, for connecting the optical module interface of optical communication system equipment when the optical communication system testing equipment, described electric loopback optical module comprises interface, clock data recovery circuit, MCU and FPGA; In described interface, be provided with signal and send pin and signal reception pin, described signal sending tube pin sends a signal to clock data recovery circuit, after clock data recovery circuit is processed, exports signal to and receives pin; Described clock data recovery circuit receives respectively the control signal that MCU and FPGA send; Described MCU is connected communication with FPGA.
Further, described signal sends pin and signal reception pin is differential signal transmission pin, and each differential signal transmission pin all connects described clock data recovery circuit by the ac coupling capacitor of series connection.
Further again, the signal being provided with in described interface described in four groups sends pin and signal reception pin.
Further, the chip ceramic capacitor that described ac coupling capacitor is 0.1uF.
Further, be also provided with MDIO bus pin and geocoding pin in described interface, described MDIO bus pin is connected with described FPGA respectively with geocoding pin.
Further, in described interface, be also provided with editable module alarm signal pin, module signal pin in place and module reset signal pin, described editable module alarm signal pin, module signal pin in place and module reset signal pin are all by pull down resistor ground connection, and described module reset signal pin is connected with FPGA.
Further again, in described interface, be also provided with editable module control signal pin and module low-power consumption mode enable signal pin, described editable module control signal pin is all connected DC power supply by pull-up resistor with module low-power consumption mode enable signal pin.
Preferably, be also provided with receiver dropout status-pin and transmitter output prohibited state pin in described interface, two pins directly connect by wire.
Further, on the internal circuit board of described electric loopback optical module, the right differential impedance of differential signal line in its PCB cabling is 100 Ω ± 10%, and the single-ended impedance of single-ended signal line is 50 Ω ± 10%.
Preferably, described MCU passes through I
2c bus is communicated by letter with clock data recovery circuit, and described FPGA communicates by I/O mouth and clock data recovery circuit, and described MCU is connected communication with FPGA by spi bus.
Compared with prior art, advantage of the present utility model and good effect are: adopt electric loopback optical module of the present utility model to replace conventional optical module, be plugged into the optical module interface of optical communication system equipment, carry out the test of system equipment, not only reduce cost, improve the reliability of optical communication system equipment, and owing to not needing to use optical fiber and attenuator in test process, therefore reduced operation easier.Meanwhile, due to built-in clock data recovery circuit in electric loopback optical module, thereby improve the reliability of signal transmission, and then improved the accuracy of testing of equipment result.
Read by reference to the accompanying drawings after the detailed description of the utility model execution mode, other features of the present utility model and advantage will become clearer.
Brief description of the drawings
Fig. 1 is the system architecture diagram while adopting conventional optical module to carry out optical communication system testing of equipment;
Fig. 2 is the circuit theory diagrams of a kind of embodiment of the electric loopback optical module that proposes of the utility model;
Fig. 3 is the system architecture diagram while adopting the electric loopback optical module shown in Fig. 2 to carry out optical communication system testing of equipment.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is described in more detail.
The utility model is in order to realize the operation test of optical communication system equipment under the prerequisite not using conventional optical module, propose a kind of electric loopback optical module and be used for the normal actual light module of alternative functions, realized the automatic loopback of communication data in electric loopback optical module inside.Be arranged on the Optical Fiber Interface Board of optical communication system equipment, can in the test of equipment and ageing process, be widely used., after test and burin-in process electric loopback optical module is taken off at equipment, change actual conventional optical module, can form complete optical communication system equipment, carry out the transmitting-receiving processing of light signal.
Elaborate particular circuit configurations and the operation principle thereof of described electric loopback optical module below by a specific embodiment.
Embodiment mono-, the electric loopback optical module of the present embodiment is mainly made up of interface, clock data recovery circuit CDR, MCU and FPGA, shown in Figure 2, wherein, in order to mate grafting with the light mouth for the conventional optical module of pegging graft on optical communication system equipment, copy the pin definitions mode of the electrical interface of conventional optical module to mate design and pin definitions to the interface of electric loopback optical module, comprise that signal sends pin, signal receives pin and various status signal transmission pins etc.In described electric loopback optical module, there is distortion phenomenon when loopback for fear of high speed signal, ensure the quality of signal transmission, the present embodiment has also further designed clock data recovery circuit CDR in described electric loopback optical module, send pin and the corresponding connection of signal reception pin with described signal respectively, the high speed signal that system equipment sends sends pin by described signal and transfers to clock data recovery circuit CDR, after clock data recovery circuit CDR processes, transfer to signal and receive pin.Described clock data recovery circuit CDR extracts received bit synchronised clock from containing the data-signal disturbing and shake of receiving, and with this clock to this data-signal resampling, to recover the original data signal with specification waveform, thereby significantly improve the loopback quality of high speed signal, improve the reliability of signal transmission, guaranteed the accuracy of system equipment test.
Because current optical communication system equipment is all the form transmitting high speed data with differential signal, therefore, in the Design of Communication Interface of the electric loopback optical module of the present embodiment, the signal transmission pin that signal is sent to pin and signal and receives pin and be designed to difference form, each differential signal transmission pin all connects described clock data recovery circuit CDR by ac coupling capacitor.The signal being provided with in the interface of described electric loopback optical module described in four groups sends pin and signal reception pin, can support the message transmission rate of 100G, and in four road differential signals, each road differential signal is supported the message transmission rate of 25G.Specifically, the differential signal of positive polarity can be sent to pin TX0+, TX1+, TX2+, TX3+ and connect clock data recovery circuit CDR by ac coupling capacitor C1, C3, C5, C7 respectively, the differential signal of negative polarity sends pin TX0-, TX1-, TX2-, TX3-and connects clock data recovery circuit CDR by ac coupling capacitor C2, C4, C6, C8 respectively; The differential signal of positive polarity receives pin RX0+, RX1+, RX2+, RX3+ and connects clock data recovery circuit CDR by ac coupling capacitor C9, C11, C13, C15 respectively, and the differential signal of negative polarity receives pin RX0-, RX1-, RX2-, RX3-and connects clock data recovery circuit CDR by ac coupling capacitor C10, C12, C14, C16 respectively.In the time of optical communication system testing equipment, electricity loopback optical module is received optical communication system equipment and is sent Si road communication data by its differential signal transmission pin TX0+/TX0-, TX1+/TX1-, TX2+/TX2-, TX3+/TX3-, after internal loopback, return to optical communication system equipment from its differential signal reception pin RX0+/RX0-, RX1+/RX1-, RX2+/RX2-, RX3+/RX3-respectively, whether optical communication system equipment can detect system operation by connected communication service tester normal.
In the present embodiment, can to select to adopt capacitance be that the chip ceramic capacitor of 0.1uF carries out circuit design to described ac coupling capacitor C1～C16.
Described MCU passes through I
2c bus is connected with clock data recovery circuit CDR, and communicates with clock data recovery circuit CDR.Described MCU transmits control signal to clock data recovery circuit CDR, controls the operation of clock data recovery circuit CDR.Clock data recovery circuit CDR sends status signal to MCU, and MCU, according to the status signal receiving, generates control command, is sent to clock data recovery circuit CDR, and clock data recovery circuit CDR is according to the control command operation receiving.
Described FPGA is connected with clock data recovery circuit CDR by I/O mouth, and communicates with clock data recovery circuit CDR.Described clock data recovery circuit CDR sends high level or low level condition indicative signal to FPGA, described FPGA generates high level or low level control signal according to the condition indicative signal receiving, and export clock data recovery circuit CDR to, thereby realize the control to clock data recovery circuit CDR.
Described MCU is connected with FPGA by spi bus, and communicates with FPGA, controls the operation of FPGA.Described FPGA sends operating state signal to MCU, and MCU generates control signal according to the operating state signal receiving, and is sent to FPGA, controls the operation of FPGA.
For described electric loopback optical module is carried out to geocoding, in the interface of described electric loopback optical module, be provided with five geocoding pins, i.e. PRTADR0, PRTADR1, PRTADR2, PRTADR3, PRTADR4, each geocoding pin is connected with FPGA.Optical communication system equipment sends address coding signal to FPGA by geocoding pin PRTADR0, PRTADR1, PRTADR2, PRTADR3, PRTADR4, and FPGA preserves the address coding signal receiving.
Optical communication system equipment communicates by MDIO bus and FPGA, in the interface of described electric loopback optical module, be provided with MDIO bus pin, MDIO bus pin comprises the MDC pin of transmit clock signal and the MDIO pin of transmission of data signals, and described MDC pin is connected with FPGA respectively with MDIO pin.Optical communication system equipment sends address signal to FPGA by MDIO bus pin, and described FPGA compares the address coding signal of the address signal receiving and preservation, if inconsistent, FPGA does not reply; If consistent, FPGA replys, and continues to receive other data of transmitting by MDIO bus pin.
Module reset signal pin MOD_RSTn in the electric loopback optical module interface of the present embodiment connects FPGA, and by pull down resistor R5 ground connection, shown in Figure 2, in the situation that described electric loopback optical module generation run-time error or other need to reset, send reset signal by described module reset signal pin MOD_RSTn to FPGA, FPGA resets after receiving reset signal, and reset signal is sent to respectively to MCU and clock data recovery circuit CDR, MCU and clock data recovery circuit CDR are resetted.
After the electricity ring optical module that makes the present embodiment is on the light mouth that is plugged into optical communication system equipment, system equipment can move, transmitting-receiving communication data, to carry out the test of system, need to specifically arrange electric loopback optical module interface Zhong Ge road pin status, the present embodiment has adopted following pin configuration mode:
(1) the editable module alarm signal pin PRG_ALRM1 in electric loopback optical module interface, PRG_ALRM2, PRG_ALRM3 are passed through respectively to pull down resistor R1, R2, R3 ground connection, make it be set to low level disarmed state, in order to avoid the board software erroneous judgement in optical communication system equipment affects the normal work of veneer.
(2) the editable module control signal pin PRG_CNTL1 in electric loopback optical module interface, PRG_CNTL2, PRG_CNTL3 are connected to DC power supply VCC by pull-up resistor R7, R8, R9 respectively, make it meet the requirement of CFP2 MSA.
(3) the module signal pin MOD_ABS in place in electric loopback optical module interface is passed through to pull down resistor R4 ground connection, make it be set to low level effective status, thereby can not have influence on the normal operation of system.
(4) the module low-power consumption mode enable signal pin MOD_LOPWR in electric loopback optical module interface is connected to DC power supply VCC by pull-up resistor R6, make it meet the requirement of CFP2 MSA.
(5) the overall alarm signal pin GLB_ALRMn in electric loopback optical module interface is connected to DC power supply VCC by pull-up resistor R10, make it be set to the disarmed state of high level, in order to avoid the board software erroneous judgement in optical communication system equipment affects the normal work of veneer.
(6) the receiver dropout status-pin RX_LOS in electric loopback optical module interface is directly connected by wire with transmitter output prohibited state pin TX_DIS, inside modules is supreme draws.Because it is effective that receiver dropout status-pin RX_LOS and transmitter output prohibited state pin TX_DIS are high level, in the time of needs transmitter output optical signal, what transmitter output prohibited state pin TX_DIS received is low level signal, this low level signal sets low receiver dropout status-pin RX_LOS simultaneously, now, optical communication system equipment think that dropout phenomenon does not appear in receiver, and system continuous service, meets test logic.Otherwise, in the time that optical communication system equipment is forbidden transmitter output optical signal, to transmitter output prohibited state pin TX_DIS output high level signal, this high level signal is set to high level by receiver dropout status-pin RX_LOS simultaneously, now, optical communication system equipment think receiver dropout, and system stops data transmit-receive, meets equally test logic.
In the present embodiment, the resistance of described pull down resistor R1, R2, R3, R4, R5 is preferably and is less than 100 Ω, and the resistance of described pull-up resistor R6, R7, R8, R9 is preferably 4.7K Ω～10 K Ω, and the resistance of described pull-up resistor R10 is preferably 10 K Ω.
In order further to improve the global design of the inner PCB of electricity ring optical module, PCB cabling to transceiving data differential lines has carried out particular/special requirement: on PCB, walk differential lines to time, requiring differential impedance is therebetween 100 Ω ± 10%, and while walking single-ended signal line, requiring single-ended impedance is 50 Ω ± 10%.
In order to make the electric loopback optical module of the present embodiment meet the requirement of CFP2 MSA, except its profile and structure should meet the requirement of CFP2 MSA, the pin of its inner power supply and ground connection is connected the requirement that also should meet CFP2 MSA, and other ins and outs of not making specified otherwise also will meet the requirement of CFP2 MSA.
The Interface design of electric loopback optical module is become golden finger interface form by the present embodiment, and its pin is arranged and PCB designs the requirement that will meet CFP2 MSA.
When to optical communication system testing equipment, above-mentioned electric loopback optical module is plugged on the light mouth that needs test on system equipment, then to test according to conventional system testing program, its system architecture diagram is shown in Figure 3.
Adopt the electric loopback optical module of the present embodiment, after system equipment has been tested, if corresponding light mouth does not temporarily need work, electric loopback optical module can be used as to light mouth plug and be plugged on this light mouth.
The data that adopt electric loopback optical module of the present utility model to send system equipment are carried out loopback detection, have overcome the dependence of traditional test mode to conventional optical module.Owing to no longer needing the conventional optical module of pegging graft in the time that system equipment is tested, therefore optical fiber and attenuator are also without connection, thereby greatly simplify operating process, reduce cost, and the overaging problem of having avoided conventional optical module to cause in high temperature scale mold process, has improved the reliability of system equipment.
Certainly; above-mentioned explanation is not to restriction of the present utility model; the utility model is also not limited in above-mentioned giving an example, and variation, remodeling, interpolation or replacement that those skilled in the art make in essential scope of the present utility model, also should belong to protection range of the present utility model.
Claims (10)
1. an electric loopback optical module, for connecting the optical module interface of optical communication system equipment when the optical communication system testing equipment, is characterized in that: described electric loopback optical module comprises interface, clock data recovery circuit, MCU and FPGA; In described interface, be provided with signal and send pin and signal reception pin, described signal sending tube pin sends a signal to clock data recovery circuit, after clock data recovery circuit is processed, exports signal to and receives pin; Described clock data recovery circuit receives respectively the control signal that MCU and FPGA send; Described MCU is connected communication with FPGA.
2. electric loopback optical module according to claim 1, it is characterized in that: described signal sends pin and signal reception pin is differential signal transmission pin, and each differential signal transmission pin all connects described clock data recovery circuit by the ac coupling capacitor of series connection.
3. electric loopback optical module according to claim 2, is characterized in that: the signal being provided with in described interface described in four groups sends pin and signal reception pin.
4. electric loopback optical module according to claim 2, is characterized in that: the chip ceramic capacitor that described ac coupling capacitor is 0.1uF.
5. electric loopback optical module according to claim 4, is characterized in that: in described interface, be also provided with MDIO bus pin and geocoding pin, described MDIO bus pin is connected with described FPGA respectively with geocoding pin.
6. electric loopback optical module according to claim 5, it is characterized in that: in described interface, be also provided with editable module alarm signal pin, module signal pin in place and module reset signal pin, described editable module alarm signal pin, module signal pin in place and module reset signal pin are all by pull down resistor ground connection, and described module reset signal pin is connected with FPGA.
7. electric loopback optical module according to claim 6, it is characterized in that: in described interface, be also provided with editable module control signal pin and module low-power consumption mode enable signal pin, described editable module control signal pin is all connected DC power supply by pull-up resistor with module low-power consumption mode enable signal pin.
8. electric loopback optical module according to claim 7, is characterized in that: in described interface, be also provided with receiver dropout status-pin and transmitter output prohibited state pin, two pins directly connect by wire.
9. electric loopback optical module according to claim 8, it is characterized in that: on the internal circuit board of described electric loopback optical module, the right differential impedance of differential signal line in its PCB cabling is 100 Ω ± 10%, and the single-ended impedance of single-ended signal line is 50 Ω ± 10%.
10. according to the electric loopback optical module described in any one in claim 1 to 9, it is characterized in that: described MCU passes through I
2c bus is communicated by letter with clock data recovery circuit, and described FPGA communicates by I/O mouth and clock data recovery circuit, and described MCU is connected communication with FPGA by spi bus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420093791.2U CN203722640U (en) | 2014-03-03 | 2014-03-03 | Electric loopback light module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420093791.2U CN203722640U (en) | 2014-03-03 | 2014-03-03 | Electric loopback light module |
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| CN203722640U true CN203722640U (en) | 2014-07-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420093791.2U Expired - Lifetime CN203722640U (en) | 2014-03-03 | 2014-03-03 | Electric loopback light module |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106301549A (en) * | 2016-09-30 | 2017-01-04 | 成都新易盛通信技术股份有限公司 | A kind of 100G loopback module based on QSFP28 encapsulation |
| CN106533556A (en) * | 2016-11-21 | 2017-03-22 | 济南浪潮高新科技投资发展有限公司 | Method for managing optical module alarm |
| CN108880674A (en) * | 2018-08-28 | 2018-11-23 | 成都新易盛通信技术股份有限公司 | A kind of optical module for local loopback test |
-
2014
- 2014-03-03 CN CN201420093791.2U patent/CN203722640U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106301549A (en) * | 2016-09-30 | 2017-01-04 | 成都新易盛通信技术股份有限公司 | A kind of 100G loopback module based on QSFP28 encapsulation |
| CN106533556A (en) * | 2016-11-21 | 2017-03-22 | 济南浪潮高新科技投资发展有限公司 | Method for managing optical module alarm |
| CN108880674A (en) * | 2018-08-28 | 2018-11-23 | 成都新易盛通信技术股份有限公司 | A kind of optical module for local loopback test |
| CN108880674B (en) * | 2018-08-28 | 2023-08-22 | 成都新易盛通信技术股份有限公司 | Optical module for local loop test |
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Granted publication date: 20140716 |