CN203659297U - Communication principle experiment box apparatus for teaching - Google Patents
Communication principle experiment box apparatus for teaching Download PDFInfo
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- CN203659297U CN203659297U CN201320732701.5U CN201320732701U CN203659297U CN 203659297 U CN203659297 U CN 203659297U CN 201320732701 U CN201320732701 U CN 201320732701U CN 203659297 U CN203659297 U CN 203659297U
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Abstract
The utility model relates to a communication principle experiment box apparatus for teaching. The communication principle experiment box apparatus comprises a sending portion and a receiving portion; and the sending portion and the receiving portion are connected by an externally connected shielded wire. The sending portion includes an FPGA, a baseband signal generation module, a base band transmission code module, a digital modulation module, a voice PCM coding input module, a selection switch module, an information input and display module and a program storage module; the FPGA is respectively connected with the baseband signal generation module, the base band transmission code module, the voice PCM coding input module, the information input and display module, and the program storage module; the FPGA and the baseband signal generation module are respectively connected with the switch module; and the switch module is connected with the digital modulation module. The receiving portion includes an FPGA; and the FPGA is externally connected with a baseband transmission code decoding module, a digital demodulation module, a PCM decoding output module, a carrier extraction module, an information display module and a program storage module. According to the scheme, the structure is precise; the operation is simple and convenient; and the cost is low.
Description
Technical field
The utility model relates to electronics and the communications field, is specifically related to a kind of teaching communication theory experiment case apparatus.
Background technology
Electronic information specialty is the very strong specialty of engineering practice, and each school all pays much attention to the reasonable disposition problem of theory teaching and practical teaching in the time formulating teaching programme.In order to allow student more can adapt to the development of modern communication technology, learn better this important subject of Principle of Communication, it is vital having a set of more rational communication theory experiment system.The communication theory experiment system of current national Ge great colleges and universities adopts identical architecture substantially, and traditional peripheral analog device is processed and obtained corresponding signal signal, and mostly only realizes basic authentication function.Dirigibility, novelty and the engineering application of practical teaching link can not get good reinforcement, and this learning ability for further raising student and innovation ability are very disadvantageous beyond doubt.
Utility model content
Technical problem to be solved in the utility model is to overcome the deficiencies in the prior art, and a kind of teaching communication theory experiment case apparatus is provided.
For achieving the above object, the technical solution adopted in the utility model is that communication theory experiment case apparatus is used in a kind of teaching, comprises transmitting portion 100 and receiving unit 200, between transmitting portion 100 and receiving unit 200, connect by external shielding line,
Described transmitting portion 100 comprises a FPGA101 and baseband signal generation module 102, base band transmission code module 103, digital modulation module 105, voice pcm encoder load module 106, selector switch module 104, input information and display module 107 and the first program storage block 108, the one FPGA101 and baseband signal generation module 102, base band transmission code module 103, voice pcm encoder load module 106, input information and display module 107 are connected respectively with the first program storage block 108, the one FPGA101 and baseband signal generation module 102 access respectively switch module 104, switch module 104 connects digital modulation module 105,
Described receiving unit 200 comprises the 2nd FPGA201, and the 2nd FPGA201 is circumscribed with base band transmission code decoder module 202, digital demodulation module 203, PCM decoding output module 204, carrier extract module 205, information display module 206 and the second program storage block 207.
And in described transmitting portion 100, baseband signal generation module 102 comprises cope and drag pattern plan switch chip CD4052BC, base band transmission code module 103 comprises cope and drag pattern plan switch chip CD4051BC; Digital modulation module 105 comprises two digital converting analogue circuit, two negative circuits and analog switch CD4053BC, the one FPGA101 connects respectively two digital converting analogue circuit, negative circuit of the each access of output of two digital converting analogue circuit, the output of a FPGA101, two digital converting analogue circuit and the output of two negative circuits access analog switch; Voice pcm encoder load module 106 comprises filtering and amplifying circuit, two wien oscillator circuit, hyperchannel analog to digital conversion circuit, filtering and amplifying circuit and two wien oscillator circuit connecting multi-channel analog to digital conversion circuit respectively, hyperchannel analog to digital conversion circuit connects a FPGA101.
And, in described receiving unit 200, base band transmission code decoder module 202 comprises chip DS75107, digital demodulation module 203 comprises chip ADS803, PCM decoding output module 204 comprises hyperchannel analog-digital chip and rear class amplification and filtering circuit, and carrier extract module 205 comprises DAC0800.
And a described FPGA101, the 2nd FPGA201 adopt the chip of XILINX V4 series.
Compared with prior art, the utlity model has following advantage and effect:
(1) the utility model provides a kind of communication theory experiment case of the use of imparting knowledge to students, adopt FPGA to coordinate outside a small amount of hardware circuit to realize, can support all sidedly to be permitted in Principle of Communication multi-functional checking, integrated level is high, powerful, can strengthen well dirigibility, novelty and the engineering application of practical teaching link.
(2) the communication theory experiment case of the teaching use of the utility model design provides the platform of student's PRACTICE OF DESIGN, taking FPGA as core design, student can own write voluntarily simple program and realize the checking of various functions in FPGA, and this learning ability and innovation ability for further raising student is helpful.
(3) the utility model humanization designing, simple to operation, with low cost, is convenient to popularize.
Brief description of the drawings
Fig. 1 is total theory diagram of the utility model embodiment.
Fig. 2 is the signal transmission exemplary plot of Digital Modulation and digital demodulation in the utility model embodiment.
Fig. 3 is the signal transmission schematic diagram of pcm encoder and decoding in the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing, preferred embodiment of the utility model is described in further detail.
As shown in Figure 1, communication theory experiment case apparatus is used in the one teaching that the utility model embodiment provides, and comprises transmitting portion 100 and receiving unit 200, transmits signal between the two carry out analog communication system by external shielding line.
Transmitting portion 100 comprises a FPGA101 and baseband signal generation module 102, base band transmission code module 103, digital modulation module 105, voice pcm encoder load module 106, selector switch module 104, input information and display module 107 and the first program storage block 108.Taking a FPGA101 of XILINX V4 as the external baseband signal generation of core module 102, base band transmission code module 103, voice pcm encoder load module 106, input information and display module 107 and the first program storage block 108, the one FPGA101 and baseband signal generation module 102 access respectively switch module 104, and switch module 104 connects digital modulation module 105.
When concrete enforcement, can adopt existing chip circuit in prior art to realize each module.In embodiment, baseband signal generation module 102 comprises cope and drag pattern plan switch chip CD4052BC, and base band transmission code module 103 comprises cope and drag pattern plan switch chip CD4051BC; Digital modulation module 105 comprises D/A conversion circuit DAC1, DAC2, two negative circuits and analog switch CD4053BC, the one FPGA101 connects respectively DAC1, DAC2, the output of DAC1, DAC2 accesses respectively a negative circuit, the output of a FPGA101, DAC1 and DAC2 and the output of two negative circuits access analog switch; Pcm encoder load module comprises filtering and amplifying circuit, two wien oscillator circuit, hyperchannel AD, filtering and amplifying circuit and two wien oscillator circuit connecting multi-channel AD respectively, and hyperchannel AD connects a FPGA101.Hyperchannel AD is hyperchannel analog to digital conversion circuit.
For the sake of ease of implementation, provide working method to be described as follows:
The input information of transmitting portion 100 and display module 107 comprise 24 paster LED lamps and 24 bit switches.24 paster LED lamps can show 24 source signals of outside input, and wherein first 8 is synchronizing signal, and latter 16 is input message, and bright expression 1 does not work and represents 0.Realize each input of source signal by stirring 24 bit switches, to should to have 24 these positions of emitting led demonstration be 1 or be 0.Stirring up and down of each switch is corresponding 1 and 0, by 24 bit switches being dialled to the input that realizes the binary data signal that needs transmission in different positions.
Need the binary data signal of transmission to be sent to a FPGA101 by input information and display module 107, then by the analog switch CD4052BC of a FPGA101 ligand band signal generation module 102, control gating or turn-off each paths in analog switch CD4052BC and produce and export RZ, BRZ, NRZ, the baseband signal input selector switch module 104 that the digital baseband signals such as BNRZ generate.Coordinate the analog switch CD4051BC of base band transmission code module 103 by a FPGA101, by HDB3, the conventional pattern of the base band transmission such as AMI generates base band transmission code, is transferred to receiving unit 200.
Voice pcm encoder load module 106 carries out input signal collection and conditioning, is then input to a FPGA101 and carries out pcm encoder, and pcm encoder is prior art.Coordinate the hardware circuit of pcm encoder module to realize the pcm encoder of voice signal by a FPGA101, and time-division multiplex technology in Principle of Communication.By external microphone input speech signal.In accompanying drawing 3, input speech signal is carried out after the bandpass filtering for 300Hz and 3.4KHz, inputting hyperchannel AD by 3dB point after differential amplification; And, utilize amplifier to form two wien oscillator circuit, vibration produces the sinusoidal signal 1 that frequency is 1k respectively, frequency is the sinusoidal signal 2 of 2k, this two-way oscillator signal will be as with reference to signal input hyperchannel AD the same as voice signal, by same transmission to receiving unit 200, thereby show time-division multiplexing function.Adopt ADC124S051 by hyperchannel AD(embodiment) be converted to digital signal and be input to a FPGA101, realize the result input selector switch module 104 of pcm encoder in a FPGA101 inside.
By selector switch module 104, the baseband signal that selection baseband signal generation module 102 produces or the PCM code of FPGA101 output output to digital modulation module 105.
Coordinate the hardware circuit of digital modulation module 105 to produce ASK by a FPGA101, FSK, PSK, the one in the modulated signals such as DPSK, can be inputted by external user the type of zone bit determining modulation signal.In accompanying drawing 2, the one FPGA101 coordinate in two-way D/A conversion circuit DAC0800(figure be designated as DAC1 and DAC2) produce frequency and be respectively the sinusoidal signal of 250KHz and 500KHz, and the negative circuit consisting of amplifier is carried out anti-phase to two-way sinusoidal signal, when the modulation signal of input analog switch CD4053BC is the PCM code of the baseband signal that produces of baseband signal generation module 102 or FPGA101 output, corresponding baseband signal or PCM code select the break-make of different frequency or out of phase carrier signal to realize Digital Modulation function by analog switch CD4053.Digital Modulation gained modulated signal is transferred to receiving unit 200.
Student can oneself write simple program in a FPGA101 and coordinate other modules to realize the checking of various functions, for the ease of carrying out correct example to student, existing program of the prior art can be solidificated in advance to the first program storage block 108 the insides.The first program storage block 108 of the transmitting portion 100 of embodiment adopt XCF32PFSG48C chip-stored system from tape program, reset can reactivate from tape program, display systems normal operating conditions.
Receiving unit 200 is taking the 2nd FPGA201 of XILINX V4 as core, external base band transmission code decoder module 202, digital demodulation module 203, PCM decoding output module 204, carrier extract module 205, information display module 206 and the second program storage block 207.
When concrete enforcement, can adopt existing chip circuit in prior art to realize each module.In embodiment, base band transmission code decoder module 202 comprises chip DS75107, digital demodulation module 203 comprises AD chip ADS803, and PCM decoding output module 204 comprises hyperchannel DA chip and rear class amplification and filtering circuit, and carrier extract module 205 comprises DAC0800.Hyperchannel DA chip is hyperchannel analog-digital chip.
Base band transmission code decoder module 202 adopts chip DS75107 to realize, and coordinates chip DS75107 that the base band transmission code of the form such as HDB3 code or AMI code of transmission is decoded into baseband signal by the 2nd FPGA201, and is output to external oscillograph for observing.
Coordinate digital demodulation module 203 by the modulated signal demodulation receiving output by the 2nd FPGA201, in accompanying drawing 2, the modulated signal receiving is sampled as digital signal by the AD chip ADS803 of digital demodulation module 203 after amplifying, then digital signal is sent into the 2nd FPGA201 demodulation and obtained modulation signal, modulation signal is baseband signal or PCM code, baseband signal is further transformed to source signal input message display module 206 in the 2nd FPGA201, in the 2nd FPGA201, further decoding digital signal that decoding is obtained are sent into PCM decoding output module 204 to PCM code.
The PCM that coordinates the hardware circuit of PCM decoding output module 204 to realize voice signal by the 2nd FPGA201 decodes and completes the checking of time-division multiplexing function.As shown in Figure 3, the modulated signal that comprises pcm encoder information receiving first obtains PCM code through digital demodulation module 203 and the 2nd FPGA201 demodulation, the 2nd FPGA201 is converted to simulating signal to PCM code decoding gained digital signal by the decode hyperchannel DA chip DAC124S085 of output module 204 of PCM again, then after connecing rear class amplification and filtering circuit conditioning, export, the voice signal of output can be listened to or loudspeaker broadcasting with earphone, and the two-way sinusoidal signal 1,2 of output can be observed with external oscillograph.
Coordinate carrier extract module 205 by the 2nd FPGA201, the carrier signal in modulation signal (baseband signal or PCM code) is extracted, the DAC0800 then sending in carrier extract module 205 is converted to simulating signal.
The information display module 206 of receiving unit 200 shows 16 source signals of the final gained of the 2nd FPGA201 demodulation, and 16 every of emitting led demonstrations are 1 or are 0.
Similarly, for the ease of carrying out correct example to student, existing program of the prior art can be solidificated in advance to the second program storage block 207 the insides.The second program storage block 207 of receiving unit 200 by this chip-stored system of XCF32PFSG48C from tape program, reset can reactivate from tape program, display systems normal operating conditions.
The utility model only provides experiment required hardware device, does not relate to the improvement of software aspect.
Above content is the further description of the utility model being done in conjunction with concrete preferred implementation, is convenient to these those skilled in the art and can understands and apply the utility model, can not assert that concrete enforcement of the present utility model is confined to these explanations.For the utility model person of an ordinary skill in the technical field, can also make without departing from the concept of the premise utility some simple deduction or replace, and needn't pass through performing creative labour.Therefore, those skilled in the art are according to announcement of the present utility model, and the simple modifications that the utility model is made all should be within protection domain of the present utility model.
Claims (4)
1. a teaching communication theory experiment case apparatus, it is characterized in that: comprise transmitting portion (100) and receiving unit (200), between transmitting portion (100) and receiving unit (200), connect by external shielding line
Described transmitting portion (100) comprises a FPGA (101) and baseband signal generation module (102), base band transmission code module (103), digital modulation module (105), voice pcm encoder load module (106), selector switch module (104), input information and display module (107) and the first program storage block (108), the one FPGA (101) and baseband signal generation module (102), base band transmission code module (103), voice pcm encoder load module (106), input information and display module (107) are connected respectively with the first program storage block (108), the one FPGA (101) and baseband signal generation module (102) access respectively switch module (104), switch module (104) connects digital modulation module (105),
Described receiving unit (200) comprises the 2nd FPGA (201), and the 2nd FPGA (201) is circumscribed with base band transmission code decoder module (202), digital demodulation module (203), PCM decoding output module (204), carrier extract module (205), information display module (206) and the second program storage block (207).
2. impart knowledge to students and use communication theory experiment case apparatus according to claim 1, it is characterized in that: in described transmitting portion (100), baseband signal generation module (102) comprises cope and drag pattern plan switch chip CD4052BC, and base band transmission code module (103) comprises cope and drag pattern plan switch chip CD4051BC; Digital modulation module (105) comprises two digital converting analogue circuit, two negative circuits and analog switch CD4053BC, the one FPGA (101) connects respectively two digital converting analogue circuit, negative circuit of the each access of output of two digital converting analogue circuit, a FPGA (101), the output of two digital converting analogue circuit and the output of two negative circuits access analog switch; Voice pcm encoder load module (106) comprises filtering and amplifying circuit, two wien oscillator circuit, hyperchannel analog to digital conversion circuit, filtering and amplifying circuit and two wien oscillator circuit connecting multi-channel analog to digital conversion circuit respectively, hyperchannel analog to digital conversion circuit connects a FPGA (101).
3. impart knowledge to students and use communication theory experiment case apparatus according to claim 1, it is characterized in that: in described receiving unit (200), base band transmission code decoder module (202) comprises chip DS75107, digital demodulation module (203) comprises chip ADS803, PCM decoding output module (204) comprises hyperchannel analog-digital chip and rear class amplification and filtering circuit, and carrier extract module (205) comprises DAC0800.
4. use communication theory experiment case apparatus according to teaching described in claim 1 or 2 or 3, it is characterized in that: a described FPGA (101) and the 2nd FPGA (201) adopt the chip of XILINX V4 series.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320732701.5U CN203659297U (en) | 2013-11-20 | 2013-11-20 | Communication principle experiment box apparatus for teaching |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320732701.5U CN203659297U (en) | 2013-11-20 | 2013-11-20 | Communication principle experiment box apparatus for teaching |
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| CN203659297U true CN203659297U (en) | 2014-06-18 |
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| CN201320732701.5U Expired - Fee Related CN203659297U (en) | 2013-11-20 | 2013-11-20 | Communication principle experiment box apparatus for teaching |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104537905A (en) * | 2015-01-19 | 2015-04-22 | 北京电子科技职业学院 | Microprocessor based PCM (pulse code modulation) principle analysis experiment method and system |
| CN107564382A (en) * | 2017-09-14 | 2018-01-09 | 广东工业大学 | A kind of communication theory experiment method, system and its collocation method |
| CN114244664A (en) * | 2021-12-16 | 2022-03-25 | 商飞软件有限公司 | Aviation digital communication simulation system and simulation method thereof |
-
2013
- 2013-11-20 CN CN201320732701.5U patent/CN203659297U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104537905A (en) * | 2015-01-19 | 2015-04-22 | 北京电子科技职业学院 | Microprocessor based PCM (pulse code modulation) principle analysis experiment method and system |
| CN104537905B (en) * | 2015-01-19 | 2015-08-12 | 北京电子科技职业学院 | PCM pulse code modulation (PCM) principle based on microprocessor resolves experimental technique and system |
| CN107564382A (en) * | 2017-09-14 | 2018-01-09 | 广东工业大学 | A kind of communication theory experiment method, system and its collocation method |
| CN114244664A (en) * | 2021-12-16 | 2022-03-25 | 商飞软件有限公司 | Aviation digital communication simulation system and simulation method thereof |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140618 Termination date: 20151120 |
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| EXPY | Termination of patent right or utility model |