CN203590180U - Pulse control circuit - Google Patents
Pulse control circuit Download PDFInfo
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- CN203590180U CN203590180U CN201320801049.8U CN201320801049U CN203590180U CN 203590180 U CN203590180 U CN 203590180U CN 201320801049 U CN201320801049 U CN 201320801049U CN 203590180 U CN203590180 U CN 203590180U
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Abstract
The utility model discloses a pulse control circuit. The pulse control circuit comprises a processor, a latch driving circuit and a dual-path triggering circuit; the processor is connected with the latch driving circuit; the latch driving circuit includes a first latch driving module and a second latch driving module; the dual-path triggering circuit includes a first dual-path triggering module and a second dual-path triggering module; chip selection control signal tube pins of a channel A and a channel B and chip selection enabling signal tube pins of the channel A and the channel B of the first dual-path triggering module are respectively connected with the second latch driving module; chip selection control signal tube pins of a channel A and a channel B and chip selection enabling signal tube pins of the channel A and the channel B of the second dual-path triggering module are respectively connected with the second latch driving module; and path selection signal tube pins of the first dual-path triggering module and the second dual-path triggering module are respectively connected with the first latch driving module. With the pulse control circuit of the utility model adopted, a dual-path triggering function can be realized, and a multi-path simultaneous triggering function can be also realized, and therefore, the pulse control circuit has a very broad application prospect. The pulse control circuit has the advantages of fewer components, high reliability and miniaturization.
Description
Technical field
The utility model relates to electroporation field, particularly relates to a kind of pulse control circuit.
Background technology
In existing triggering control appliance, generally adopt single channel trigger mode, only can realize serial output, can not realize two-way or multichannel triggers simultaneously; And circuit is mostly by adopting a plurality of independently digit chips to realize, and integrated level is not high.
In existing triggering control appliance, the pulse control circuit of single channel trigger mode, even if interval reduces again, occurs when can not realize truly, therefore, can not meet the requirement that two-way is exported trigger impulse simultaneously.In order to realize two-way pulse, trigger simultaneously, discrete control chip need be carried out to secondary integrated, signal is selected on appropriate design control signal, enable signal and road, make it highly integrated, realize small-sized integratedly, by intelligent processor, carrying out control and management, thereby realizing two-way Trigger Function.Circuit interface will simply and easily be expanded simultaneously, can realize multichannel trigger control circuit.
Utility model content
The utility model provides a kind of pulse control circuit of high integration, can realize two-way triggering and even multichannel and trigger simultaneously.
For solving the problems of the technologies described above, the utility model provides a kind of pulse control circuit, comprising:
Processor, and latchs drive circuit and is connected;
Latch drive circuit, comprise that first latchs driver module and second and latch driver module;
Two-way circuits for triggering, comprise the first two-way trigger module and the second two-way trigger module;
Wherein, the passage A sheet selected control signal pin processed of the first two-way trigger module, channel B sheet selected control signal pin processed, passage A chip enable signal pin and channel B chip enable signal pin latch driver module and are connected with second respectively;
The passage A sheet selected control signal pin processed of the second two-way trigger module, channel B sheet selected control signal pin processed, passage A chip enable signal pin and channel B chip enable signal pin latch driver module and are connected with second respectively;
The first two-way trigger module and the road of the second two-way trigger module select signal pin to latch driver module and be connected with first respectively.
Further, the first two-way trigger module and the second two-way trigger module all comprise that San Ge road selects signal pin.
The utility model beneficial effect is as follows:
The utility model has been realized two-way Trigger Function, can realize multichannel Trigger Function simultaneously, has boundless application prospect; Have advantages of that component number is few, reliability is high, realized the miniaturization of pulse control circuit.
Accompanying drawing explanation
Fig. 1 is the circuit theory diagrams of pulse control circuit in the utility model embodiment;
Fig. 2 is each control interface signal implication of two-way trigger module figure in the utility model embodiment;
Fig. 3 is two-way trigger impulse output control flow chart in the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing and embodiment, the utility model is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the utility model, does not limit the utility model.
The utility model is triggered the factors such as sequential demand, system works environment and is comprehensively analyzed by ability, the two-way of paired pulses trigger control circuit, and the pulse control circuit of single order trigger mode is studied, it is integrated that paired pulses control module is carried out secondary, by intelligent processor, to the enable signal of module, chip selection signal, road, select signal rationally to control, can realize the high integration pulse control circuit for the pulse of synchronization triggering for generating two-way.
As shown in Figure 1, 2, the utility model embodiment relates to a kind of pulse control circuit, comprising:
Processor, and latchs drive circuit and is connected;
Latch drive circuit, comprise that first latchs driver module and second and latch driver module;
Two-way circuits for triggering, comprise the first two-way trigger module and the second two-way trigger module;
Wherein, the passage A sheet selected control signal pin processed of the first two-way trigger module, channel B sheet selected control signal pin processed, passage A chip enable signal pin and channel B chip enable signal pin latch driver module and are connected with second respectively; The passage A sheet selected control signal pin processed of the second two-way trigger module, channel B sheet selected control signal pin processed, passage A chip enable signal pin and channel B chip enable signal pin latch driver module and are connected with second respectively;
The first two-way trigger module and the road of the second two-way trigger module select signal pin to latch driver module and be connected with first respectively; Road selects signal pin while triggering such as two-way, can comprise A, B, tri-pins of C for a plurality of, and A pin represents passage A output; B pin represents channel B output, and C pin represents that passage A and B export simultaneously.
The utility model is integrated by control signal, the road with discrete function being selected signal and multichannel select module to carry out secondary encapsulation, has realized miniaturization.Two ports by intelligent processor are controlled two-way circuits for triggering.Employing is latched drive circuit the sheet of integration module is selected control signal, enables control signal and the realization management of path selection signal and output.
As shown in Figure 3, chip selection signal, the enable signal of the utility model by control channel A, B is all effective, exports identical road simultaneously and selects signal, output in the time of the same road that can realize pulse control channel A and pulse control channel B.
The utlity model has the ability of regulation output pulse duration, amplitude and frequency.Can to output pulse width, frequency, accurately control according to demand; By regulating load, can realize the pulse output of different amplitudes.
While using this circuit by expansion, only need accommodation the electric circuit constitute according to demand, just can realize the output of multichannel trigger impulse.
It is integrated that the utility model selects signal and multichannel to select module to carry out secondary encapsulation on discrete control signal, the road of single order pulse control module, realized miniaturization.By adopting intelligent processor, according to system requirements, trigger port is selected, the connecting and disconnecting of output pulse signal are carried out to duration control simultaneously.Integrated rear module has 2 pulse control channels, and both chip selection signals, enable signal are respectively 2 and overlap independently control line, sends order control respectively by intelligent processor.After integrated, all effective by chip selection signal, the enable signal of control channel A, B, export identical road simultaneously and select signal, output in the time of the same road that just can realize pulse control channel A and pulse control channel B.The utlity model has certain extended capability, by expanding, can realize multichannel trigger impulse output simultaneously.
Although be example object, preferred embodiment of the present utility model is disclosed, it is also possible those skilled in the art will recognize various improvement, increase and replacement, therefore, scope of the present utility model should be not limited to above-described embodiment.
Claims (2)
1. a pulse control circuit, is characterized in that, comprising:
Processor, and latchs drive circuit and is connected;
Latch drive circuit, comprise that first latchs driver module and second and latch driver module;
Two-way circuits for triggering, comprise the first two-way trigger module and the second two-way trigger module;
Wherein, the passage A sheet selected control signal pin processed of the first two-way trigger module, channel B sheet selected control signal pin processed, passage A chip enable signal pin and channel B chip enable signal pin latch driver module and are connected with second respectively;
The passage A sheet selected control signal pin processed of the second two-way trigger module, channel B sheet selected control signal pin processed, passage A chip enable signal pin and channel B chip enable signal pin latch driver module and are connected with second respectively;
The first two-way trigger module and the road of the second two-way trigger module select signal pin to latch driver module and be connected with first respectively.
2. pulse control circuit as claimed in claim 1, is characterized in that, the first two-way trigger module and the second two-way trigger module all comprise that San Ge road selects signal pin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201320801049.8U CN203590180U (en) | 2013-12-05 | 2013-12-05 | Pulse control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201320801049.8U CN203590180U (en) | 2013-12-05 | 2013-12-05 | Pulse control circuit |
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CN203590180U true CN203590180U (en) | 2014-05-07 |
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CN201320801049.8U Expired - Fee Related CN203590180U (en) | 2013-12-05 | 2013-12-05 | Pulse control circuit |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110146755A (en) * | 2019-05-16 | 2019-08-20 | 德凯认证服务(苏州)有限公司 | A kind of automotive electronics electric performance test circuit system |
-
2013
- 2013-12-05 CN CN201320801049.8U patent/CN203590180U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110146755A (en) * | 2019-05-16 | 2019-08-20 | 德凯认证服务(苏州)有限公司 | A kind of automotive electronics electric performance test circuit system |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140507 Termination date: 20141205 |
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EXPY | Termination of patent right or utility model |