CN203535419U

CN203535419U - Reference sinusoidal signal generating circuit

Info

Publication number: CN203535419U
Application number: CN201320690762.XU
Authority: CN
Inventors: 王昌烨; 高存统
Original assignee: JINAN NODON TECHNOLOGY Co Ltd
Current assignee: JINAN NODON TECHNOLOGY Co Ltd
Priority date: 2013-11-05
Filing date: 2013-11-05
Publication date: 2014-04-09
Anticipated expiration: 2023-11-05

Abstract

A reference sinusoidal signal generating circuit comprises the components of: a single-chip microcomputer, a shift register I, a shift register II, a shift register III, a D/A conversion chip I which is connected with the output end of the shift register I, a D/A conversion chip II which is connected with the output end of the shift register II, a D/A conversion chip III which is connected with the output end of the shift register III, a two-order active low-pass filter I which is connected with the output end of the D/A conversion chip I, a two-order active low-pass filter II which is connected with the output end of the D/A conversion chip II, and a two-order active low-pass filter III which is connected with the output end of the D/A conversion chip III. The single-chip microcomputer simultaneously controls the shift register I, the shift register II and the shift register III. The digital quantity phase difference of three sets of reference sinusoidal signals generated thereby can be accurately controlled to 120 DEG, thereby effectively preventing unbalance among the three phases. Complicated structure of a circuit which is formed by an original frequency divider, a counter, an EPROM, etc. is replaced by the single-chip microcomputer and the shift registers, thereby simplifying the circuit and reducing cost.

Description

A kind of benchmark sine wave generator circuit

Technical field

The utility model relates to power technique fields, is specifically related to a kind of benchmark sine wave generator circuit.

Background technology

The generation of the sinusoidal signal of existing power supply is generally frequency divider, counter, EPROM, D/A conversion chip, low-pass filter, to consist of successively, its circuit structure is complicated, in three-phase supply, need to use three EPROM, manufacturing cost is high, because every group of sine wave generator circuit structure in three-phase supply is relatively independent, so the phase differential precision between sinusoidal signal is low and difficult adjustment.

Summary of the invention

The utility model is in order to overcome the deficiency of above technology, provides that a kind of cost is low, phase differential is controlled accurate benchmark sine wave generator circuit.

The utility model overcomes the technical scheme that its technical matters adopts:

This benchmark sine wave generator circuit, comprise single-chip microcomputer, shift register I, shift register II, shift register III, be connected in the D/A conversion chip I of shift register I output terminal, be connected in the D/A conversion chip II of shift register II output terminal, be connected in the D/A conversion chip III of shift register III output terminal, be connected in the second order active low-pass filter I of D/A conversion chip I output terminal, be connected in the second order active low-pass filter II of D/A conversion chip II output terminal, be connected in the second order active low-pass filter III of D/A conversion chip III output terminal, described single-chip microcomputer is connected to the input end of shift register I and the control end of shift register II and shift register III, the input end of described shift register II is connected in the spillway of shift register I, the input end of described shift register III is connected in the spillway of shift register II, D/A conversion chip I, D/A conversion chip II and D/A conversion chip III are connected to the reverse input end of amplifier, second order active low-pass filter I, second order active low-pass filter II and second order active low-pass filter III are connected to the output terminal of amplifier, the input end in the same way of described amplifier is through resistance II ground connection, its other end of reverse input end that resistance I one end is connected in amplifier is connected in the output terminal of amplifier.

The beneficial effects of the utility model are: single-chip microcomputer is controlled shift register I, shift register II and shift register III simultaneously, the digital quantity phase differential of three groups of benchmark sinusoidal signals that therefore produce can accurately be controlled 120 °, has effectively avoided the phenomenon of three-phase imbalance.The digital quantity of three groups of benchmark sinusoidal signals carries out digital-to-analog conversion by D/A conversion chip I, D/A conversion chip II and D/A conversion chip III afterwards, then produces three-phase benchmark sinusoidal signal through second order active low-pass filter I, second order active low-pass filter II and second order active low-pass filter III.By single-chip microcomputer and shift register, replace the complicated architectures of the circuit of the formations such as original frequency divider, counter, EPROM, simplified circuit, reduced cost, improved signal output accuracy.

Accompanying drawing explanation

Fig. 1 is structural representation of the present utility model;

In figure, 1. resistance I 2. amplifier 3. resistance II.

Embodiment

Below in conjunction with 1 pair of the utility model of accompanying drawing, be described further.

This benchmark sine wave generator circuit, comprise single-chip microcomputer, shift register I, shift register II, shift register III, be connected in the D/A conversion chip I of shift register I output terminal, be connected in the D/A conversion chip II of shift register II output terminal, be connected in the D/A conversion chip III of shift register III output terminal, be connected in the second order active low-pass filter I of D/A conversion chip I output terminal, be connected in the second order active low-pass filter II of D/A conversion chip II output terminal, be connected in the second order active low-pass filter III of D/A conversion chip III output terminal, single-chip microcomputer is connected to the input end of shift register I and the control end of shift register II and shift register III, the input end of shift register II is connected in the spillway of shift register I, the input end of shift register III is connected in the spillway of shift register II, D/A conversion chip I, D/A conversion chip II and D/A conversion chip III are connected to the reverse input end of amplifier 2, second order active low-pass filter I, second order active low-pass filter II and second order active low-pass filter III are connected to the output terminal of amplifier 2, the input end in the same way of amplifier 2 is through resistance II 3 ground connection, its other end of reverse input end that resistance I 1 one end is connected in amplifier 2 is connected in the output terminal of amplifier 2.Single-chip microcomputer produces 24 signals, first input shift register I makes it produce the digital quantity of required benchmark sinusoidal signal, because shift register I can only be stored 8 bit data, therefore all the other 16 spillways by shift register I are input in shift register II and the spillway by shift register II is input in shift register III, shift register II and shift register III produce respectively the digital quantity of required benchmark sinusoidal signal, because single-chip microcomputer is controlled shift register I simultaneously, shift register II and shift register III, the digital quantity phase differential of three groups of benchmark sinusoidal signals that therefore produce can accurately be controlled 120 °, effectively avoided the phenomenon of three-phase imbalance.The digital quantity of three groups of benchmark sinusoidal signals carries out digital-to-analog conversion by D/A conversion chip I, D/A conversion chip II and D/A conversion chip III afterwards, because analog-digital chip fan-out capability is less and be electric current output, therefore by amplifier 2, this current signal is converted to voltage signal, then produces three-phase benchmark sinusoidal signal through second order active low-pass filter I, second order active low-pass filter II and second order active low-pass filter III.By single-chip microcomputer and shift register, replace the complicated architectures of the circuit of the formations such as original frequency divider, counter, EPROM, simplified circuit, reduced cost, improved signal output accuracy.

Claims

1. a benchmark sine wave generator circuit, it is characterized in that: comprise single-chip microcomputer, shift register I, shift register II, shift register III, be connected in the D/A conversion chip I of shift register I output terminal, be connected in the D/A conversion chip II of shift register II output terminal, be connected in the D/A conversion chip III of shift register III output terminal, be connected in the second order active low-pass filter I of D/A conversion chip I output terminal, be connected in the second order active low-pass filter II of D/A conversion chip II output terminal, be connected in the second order active low-pass filter III of D/A conversion chip III output terminal, described single-chip microcomputer is connected to the input end of shift register I and the control end of shift register II and shift register III, the input end of described shift register II is connected in the spillway of shift register I, the input end of described shift register III is connected in the spillway of shift register II, D/A conversion chip I, D/A conversion chip II and D/A conversion chip III are connected to the reverse input end of amplifier (2), second order active low-pass filter I, second order active low-pass filter II and second order active low-pass filter III are connected to the output terminal of amplifier (2), the input end in the same way of described amplifier (2) is through resistance II (3) ground connection, its other end of reverse input end that resistance I (1) one end is connected in amplifier (2) is connected in the output terminal of amplifier (2).