CN203491981U - Amplifying circuit used for computer signal tuning - Google Patents
Amplifying circuit used for computer signal tuning Download PDFInfo
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- CN203491981U CN203491981U CN201320591839.8U CN201320591839U CN203491981U CN 203491981 U CN203491981 U CN 203491981U CN 201320591839 U CN201320591839 U CN 201320591839U CN 203491981 U CN203491981 U CN 203491981U
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- electric capacity
- resistance
- triode
- transformer
- amplifying circuit
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Abstract
The utility model discloses an amplifying circuit used for computer signal tuning. The amplifying circuit comprises resistors numbered from one to ten, capacitors numbered from one to thirteen, a first transformer, a second transformer, a third transformer, a first triode, a second triode, a diode and a potentiometer. A 465KHz intermediate-frequency signal generated by a converter stage is transmitted to the second triode through the secondary side of the first intermediate-frequency transformer to be amplified, the amplified signal is transmitted to the second triode through the second intermediate-frequency transformer to be amplified again, then the signal is transmitted to a detector through the third intermediate-frequency transformer to be checked, and the checked signal is transmitted to the amplified signal output end of the amplifier to be amplified. The amplifying circuit used for computer signal tuning is applied to a computer, has the advantages that the circuit structure is simple, the number of adopted elements is small and cost is low; the amplifying circuit used for computer signal tuning can be popularized and promoted more easily.
Description
Technical field
The utility model relates to a kind of computer circuits, relates in particular to a kind of for the tuning amplifying circuit of Computer signal.
Background technology
Amplifying circuit be a kind of can be by a faint ac small signal (being superimposed upon on DC point), by a device (core is triode, field effect transistor), obtain a waveform similarity (undistorted), but the output of the much larger interchange large-signal of amplitude.Amplifier and load that actual amplifying circuit normally consists of signal source, transistor form.And in prior art, the circuit structure for the tuning amplifying circuit of Computer signal is complicated, employing element is many, cost is higher, be unfavorable for popularizing.
Utility model content
The purpose of this utility model provides a kind of for the tuning amplifying circuit of Computer signal with regard to being in order to address the above problem.
The utility model is achieved through the following technical solutions above-mentioned purpose:
The utility model comprises the first resistance to the ten resistance, the first electric capacity to the 13 electric capacity, the first transformer to the three transformers, the first triode, the second triode, diode and potentiometer, positive source simultaneously with the first end of described the 9th resistance, the first end of described the 6th resistance is connected with the first end of described the 5th resistance, power cathode simultaneously with the first end of described potentiometer, the first end of described the 12 electric capacity, the first end of described the 8th resistance, the first end of described the 8th electric capacity, the first end of described the 7th resistance, the first end of described the 7th electric capacity, the first end of described the second resistance, the first end of described the 4th electric capacity, the first end of described the 3rd electric capacity, the first end of described the 11 electric capacity, the first end of described the 3rd transformer secondary output is connected with the first end of described the first electric capacity, the second end while of described the first electric capacity and the tap of described the first transformer, the first end of described the first resistance, the first end of described the 4th resistance is connected with the first end of described the 5th resistance, the second end of described the 9th resistance is connected with the first end of described the tenth electric capacity with the tap of described the 3rd transformer simultaneously, the second end of described the 3rd transformer secondary output is connected with the positive pole of described diode, the negative pole of described diode is connected with the first end of described the tenth resistance with the second end of described the 11 electric capacity simultaneously, the first end of described the 3rd primary is connected with the first end of described the 9th electric capacity, the second end of described the 3rd primary is connected with the collector electrode of described the second triode, the emitter of described the second triode is connected with the second end of described the 8th resistance with the second end of described the tenth electric capacity simultaneously, the base stage of described the second triode is connected with the first end of described the second transformer secondary output with the second end of described the 9th electric capacity simultaneously, the second end while of described the second transformer secondary output and the second end of described the 6th resistance, the second end of described the 7th resistance is connected with the second end of described the 8th electric capacity, the second end of described the 4th resistance is connected with the second end of described the 7th electric capacity, the first end of described the second primary is connected with the first end of described the 6th electric capacity with the first end of described the 5th electric capacity simultaneously, the second end of described the second primary is connected with the collector electrode of described the first triode with the second end of described the 6th electric capacity simultaneously, the base stage of described the first triode is connected with the first end of described the first transformer secondary output with the second end of described the 5th electric capacity simultaneously, the second end while of described the first transformer secondary output and the second end of described the first resistance, the second end of described the 3rd resistance is connected with the second end of described the 3rd electric capacity, the emitter of described the first triode is connected with the second end of described the 4th electric capacity and the second end of described the second resistance simultaneously, the first end of described the first primary is connected with the first end of described the second electric capacity, the second end of described the first primary is connected with the second end of described the second electric capacity, and the frequency variation signal input that the second end of described the second electric capacity is described amplifying circuit, the second end while of described the 3rd resistance and the second end of described the 12 electric capacity, the second end of described the tenth resistance and the second end of described potentiometer are connected, the sliding end of described potentiometer is connected with the first end of described the 13 electric capacity, the amplifying signal output that the second end of described the 13 electric capacity is described amplifier.
The beneficial effects of the utility model are:
The utility model is for the tuning amplifying circuit of Computer signal, is applied in computer, have advantages of that circuit structure is simple, adopt element few, with low cost, is more conducive to universal and promotes.
Accompanying drawing explanation
Fig. 1 is circuit structure schematic diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail:
As shown in Figure 1: the utility model comprises that the first resistance R 1 is to the tenth resistance R 10, the first capacitor C 1 to the 13 capacitor C 13, the first transformer T1 to the three transformer T3, the first triode VT1, the second triode VT2, diode VD and potentiometer RP, positive source VCC simultaneously with the first end of the 9th resistance R 9, the first end of the 6th resistance R 6 is connected with the first end of the 5th resistance R 5, power cathode simultaneously with the first end of potentiometer RP, the first end of the 12 capacitor C 12, the first end of the 8th resistance R 8, the first end of the 8th capacitor C 8, the first end of the 7th resistance R 7, the first end of the 7th capacitor C 7, the first end of the second resistance R 2, the first end of the 4th capacitor C 4, the first end of the 3rd capacitor C 3, the first end of the 11 capacitor C 11, the first end of the 3rd transformer T3 time level is connected with the first end of the first capacitor C 1, the second end while of the first capacitor C 1 and the tap of the first transformer T1, the first end of the first resistance R 1, the first end of the 4th resistance R 4 is connected with the first end of the 5th resistance R 5, the second end of the 9th resistance R 9 is connected with the first end of the tenth capacitor C 10 with the tap of the 3rd transformer T3 simultaneously, the second end of the 3rd transformer T3 time level is connected with the positive pole of diode VD, the negative pole of diode VD is connected with the first end of the tenth resistance R 10 with the second end of the 11 capacitor C 11 simultaneously, the elementary first end of the 3rd transformer T3 is connected with the first end of the 9th capacitor C 9, the second elementary end of the 3rd transformer T3 is connected with the collector electrode of the second triode VT2, the emitter of the second triode VT2 is connected with the second end of the 8th resistance R 8 with the second end of the tenth capacitor C 10 simultaneously, the base stage while of the second triode VT2 is connected with the first end of the second end of the 9th capacitor C 9 and T2 level of the second transformer, the second end while of the second transformer T2 time level and the second end of the 6th resistance R 6, the second end of the 7th resistance R 7 is connected with the second end of the 8th capacitor C 8, the second end of the 4th resistance R 4 is connected with the second end of the 7th capacitor C 7, the elementary first end of the second transformer T2 is connected with the first end of the 6th capacitor C 6 with the first end of the 5th capacitor C 5 simultaneously, the second elementary end of the second transformer T2 is connected with the collector electrode of the first triode VT1 with the second end of the 6th capacitor C 6 simultaneously, the base stage while of the first triode VT1 is connected with the first end of the second end of the 5th capacitor C 5 and T1 level of the first transformer, the second end while of the first transformer T1 time level and the second end of the first resistance R 1, the second end of the 3rd resistance R 3 is connected with the second end of the 3rd capacitor C 3, the emitter of the first triode VT1 is connected with the second end of the second resistance R 2 with the second end of the 4th capacitor C 4 simultaneously, the elementary first end of the first transformer T1 is connected with the first end of the second capacitor C 2, the second elementary end of the first transformer T1 is connected with the second end of the second capacitor C 2, and the frequency variation signal input BP that the second end of the second capacitor C 2 is amplifying circuit, the second end while of the 3rd resistance R 3 and the second end of the 12 capacitor C 12, the second end of the tenth resistance R 10 is connected with the second end of potentiometer RP, the sliding end of potentiometer RP is connected with the first end of the 13 capacitor C 13, the amplifying signal output DF that the second end of the 13 capacitor C 13 is amplifier.
As shown in Figure 1: the 465KHz intermediate-freuqncy signal producing through converter stage is amplified by the secondary second triode VT2 that is sent to of intermediate frequency transformer the first transformer T1, signal after amplification is delivered to the 3rd triode VT3 by the second transformer T2 intermediate frequency transformer again and is amplified again, then by the 3rd transformer T3 intermediate frequency transformer, send strong wave detector to carry out detection, the amplifying signal output DF that the signal after detection is sent to amplifier amplifies.
Claims (1)
1. one kind for the tuning amplifying circuit of Computer signal, it is characterized in that: comprise the first resistance to the ten resistance, the first electric capacity to the 13 electric capacity, the first transformer to the three transformers, the first triode, the second triode, diode and potentiometer, positive source simultaneously with the first end of described the 9th resistance, the first end of described the 6th resistance is connected with the first end of described the 5th resistance, power cathode simultaneously with the first end of described potentiometer, the first end of described the 12 electric capacity, the first end of described the 8th resistance, the first end of described the 8th electric capacity, the first end of described the 7th resistance, the first end of described the 7th electric capacity, the first end of described the second resistance, the first end of described the 4th electric capacity, the first end of described the 3rd electric capacity, the first end of described the 11 electric capacity, the first end of described the 3rd transformer secondary output is connected with the first end of described the first electric capacity, the second end while of described the first electric capacity and the tap of described the first transformer, the first end of described the first resistance, the first end of described the 4th resistance is connected with the first end of described the 5th resistance, the second end of described the 9th resistance is connected with the first end of described the tenth electric capacity with the tap of described the 3rd transformer simultaneously, the second end of described the 3rd transformer secondary output is connected with the positive pole of described diode, the negative pole of described diode is connected with the first end of described the tenth resistance with the second end of described the 11 electric capacity simultaneously, the first end of described the 3rd primary is connected with the first end of described the 9th electric capacity, the second end of described the 3rd primary is connected with the collector electrode of described the second triode, the emitter of described the second triode is connected with the second end of described the 8th resistance with the second end of described the tenth electric capacity simultaneously, the base stage of described the second triode is connected with the first end of described the second transformer secondary output with the second end of described the 9th electric capacity simultaneously, the second end while of described the second transformer secondary output and the second end of described the 6th resistance, the second end of described the 7th resistance is connected with the second end of described the 8th electric capacity, the second end of described the 4th resistance is connected with the second end of described the 7th electric capacity, the first end of described the second primary is connected with the first end of described the 6th electric capacity with the first end of described the 5th electric capacity simultaneously, the second end of described the second primary is connected with the collector electrode of described the first triode with the second end of described the 6th electric capacity simultaneously, the base stage of described the first triode is connected with the first end of described the first transformer secondary output with the second end of described the 5th electric capacity simultaneously, the second end while of described the first transformer secondary output and the second end of described the first resistance, the second end of described the 3rd resistance is connected with the second end of described the 3rd electric capacity, the emitter of described the first triode is connected with the second end of described the 4th electric capacity and the second end of described the second resistance simultaneously, the first end of described the first primary is connected with the first end of described the second electric capacity, the second end of described the first primary is connected with the second end of described the second electric capacity, and the frequency variation signal input that the second end of described the second electric capacity is described amplifying circuit, the second end while of described the 3rd resistance and the second end of described the 12 electric capacity, the second end of described the tenth resistance and the second end of described potentiometer are connected, the sliding end of described potentiometer is connected with the first end of described the 13 electric capacity, the amplifying signal output that the second end of described the 13 electric capacity is described amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320591839.8U CN203491981U (en) | 2013-09-24 | 2013-09-24 | Amplifying circuit used for computer signal tuning |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320591839.8U CN203491981U (en) | 2013-09-24 | 2013-09-24 | Amplifying circuit used for computer signal tuning |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203491981U true CN203491981U (en) | 2014-03-19 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320591839.8U Expired - Fee Related CN203491981U (en) | 2013-09-24 | 2013-09-24 | Amplifying circuit used for computer signal tuning |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203491981U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106452382A (en) * | 2016-10-17 | 2017-02-22 | 中州大学 | Computer network signal amplifier |
-
2013
- 2013-09-24 CN CN201320591839.8U patent/CN203491981U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106452382A (en) * | 2016-10-17 | 2017-02-22 | 中州大学 | Computer network signal amplifier |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140319 Termination date: 20140924 |
|
| EXPY | Termination of patent right or utility model |