CN203387187U - Reactive power compensation intelligent controller - Google Patents
Reactive power compensation intelligent controller Download PDFInfo
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- CN203387187U CN203387187U CN201320406539.8U CN201320406539U CN203387187U CN 203387187 U CN203387187 U CN 203387187U CN 201320406539 U CN201320406539 U CN 201320406539U CN 203387187 U CN203387187 U CN 203387187U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/30—Reactive power compensation
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Abstract
The utility model discloses a reactive power compensation intelligent controller. The structure of the reactive power compensation intelligent controller comprises a high-speed processor DSP2812, a driving chip ULN2003A, a voltage signal conditioning circuit, and a current signal conditioning circuit. The reactive power compensation intelligent controller of the utility model has following technical effects that the alternating-current signal sampling mode is adopted, system real-time parameters can be acquired, various factors are considered comprehensively, the capacitor switching action is determined through intelligent judgment, problems, such as switching oscillation, etc., can be avoided, advantages, such as timely and fast response, good reliability, good antijamming capability, good adaptability, etc., can be realized; so the reactive power compensation intelligent controller has good popularization and application values.
Description
Technical field
The utility model relates to a kind of idle compensating control.
Background technology
To electrical network or power equipment, to carry out dynamic reactive power compensation be energy-conservation and the important means of improving power supply quality, traditional reactive power compensation device generally adopts power factor mode control capacitance switching, the general power factor of just measuring simply, in the situation that the low switching that easily occurs of load shakes, have a strong impact on capacitor useful life, cause line fault, or do not reach the compensation purpose.
The utility model content
The purpose of this utility model is to provide a kind of reactive power compensation intelligent controller.
The technical solution of the utility model is, a kind of reactive power compensation intelligent controller, its structure comprises that DSP2812 high speed processor IC1 and ULN2003A drive chip IC 2, voltage signal conditioning circuit, current signal conditioning circuit, it is characterized in that: described voltage signal conditioning circuit is parallel resistance R3 between input terminal Ua and Uc, resistance R 3 one ends are connected to resistance R 4 and capacitor C 1 through resistance R 1, resistance R 3 other ends are connected to resistance R 5 and capacitor C 2 through resistance R 2, and an other end of capacitor C 1 and capacitor C 2 connects together ground connection; The other end of resistance R 4 and resistance R 5 connects together and connects the Vref current potential, the tie point of resistance R 1, resistance R 4 and capacitor C 1 is connected to the AD0 pin of DSP2812 high speed processor IC1, and the tie point of resistance R 2, resistance R 5 and capacitor C 2 is connected to the AD1 pin of DSP2812 high speed processor IC1; Parallel resistance R8 between input terminal Ib and In, resistance R 8 one ends are connected to resistance R 9 and capacitor C 3 through resistance R 6, resistance R 8 other ends are connected to resistance R 10 and capacitor C 4 through resistance R 7, an other end of capacitor C 3 and capacitor C 4 connects together ground connection, the other end of resistance R 9 and resistance R 10 connects together and connects the Vref current potential, the tie point of resistance R 6, resistance R 9 and capacitor C 3 is connected to the AD2 pin of DSP2812 high speed processor IC1, and the tie point of resistance R 7, resistance R 10 and capacitor C 4 is connected to the AD3 pin of DSP2812 high speed processor IC1; The GPIOA0 pin of DSP2812 high speed processor IC1, GPIOA1 pin, GPIOA2 pin, GPIOA3 pin are connected respectively to 1 pin, 2 pin, 3 pin, 4 pin that ULN2003A drives chip IC 2, ULN2003A drives 16 pin, 15 pin, 14 pin, 13 pin of chip IC 2 to be connected respectively to an end of relay J 1, relay J 2, relay J 3, relay J 4, and an other end of relay J 1, relay J 2, relay J 3, relay J 4 connects together; DSP2812 high speed processor IC1 with being connected of liquid crystal display screen display lcd 12864 is: the GPIOA4 pin of DSP2812 high speed processor IC1, GPIOA5 pin, GPIOA6 pin are connected respectively to CS pin, SID pin, the SCLK pin of liquid crystal display screen display lcd 12864; DSP2812 high speed processor IC1 with being connected of button is: the GPIOA7 pin of DSP2812 high speed processor IC1, GPIOA8 pin, GPIOA9 pin, GPIOA10 pin are connected respectively to the end of button K1, button K2, button K3, button K4, button K1, button K2, button K3, the other end ground connection of pressing K4.
The utlity model has following technique effect, adopt the ac sampling signal mode, acquisition system real-time parameter, consider the each side factor, through intelligent decision, determine the capacitor switching action, avoid the problems such as switching concussion, there are the characteristics such as response is timely fast, reliability is high, antijamming capability is strong, adaptability is good; Good popularizing value is arranged.
The accompanying drawing explanation
Fig. 1 is circuit diagram of the present utility model.
Embodiment
As shown in Figure 1, a kind of reactive power compensation intelligent controller, its structure comprises that DSP2812 high speed processor IC1 and ULN2003A drive chip IC 2, voltage signal conditioning circuit, current signal conditioning circuit, it is characterized in that: described voltage signal conditioning circuit is parallel resistance R3 between input terminal Ua and Uc, resistance R 3 one ends are connected to resistance R 4 and capacitor C 1 through resistance R 1, resistance R 3 other ends are connected to resistance R 5 and capacitor C 2 through resistance R 2, and an other end of capacitor C 1 and capacitor C 2 connects together ground connection; The other end of resistance R 4 and resistance R 5 connects together and connects the Vref current potential, the tie point of resistance R 1, resistance R 4 and capacitor C 1 is connected to the AD0 pin of DSP2812 high speed processor IC1, and the tie point of resistance R 2, resistance R 5 and capacitor C 2 is connected to the AD1 pin of DSP2812 high speed processor IC1; Parallel resistance R8 between input terminal Ib and In, resistance R 8 one ends are connected to resistance R 9 and capacitor C 3 through resistance R 6, resistance R 8 other ends are connected to resistance R 10 and capacitor C 4 through resistance R 7, an other end of capacitor C 3 and capacitor C 4 connects together ground connection, the other end of resistance R 9 and resistance R 10 connects together and connects the Vref current potential, the tie point of resistance R 6, resistance R 9 and capacitor C 3 is connected to the AD2 pin of DSP2812 high speed processor IC1, and the tie point of resistance R 7, resistance R 10 and capacitor C 4 is connected to the AD3 pin of DSP2812 high speed processor IC1; The GPIOA0 pin of DSP2812 high speed processor IC1, GPIOA1 pin, GPIOA2 pin, GPIOA3 pin are connected respectively to 1 pin, 2 pin, 3 pin, 4 pin that ULN2003A drives chip IC 2, ULN2003A drives 16 pin, 15 pin, 14 pin, 13 pin of chip IC 2 to be connected respectively to an end of relay J 1, relay J 2, relay J 3, the relay J that continues 4, and an other end of relay J 1, relay J 2, relay J 3, relay J 4 connects together; DSP2812 high speed processor IC1 with being connected of liquid crystal display screen display lcd 12864 is: the GPIOA4 pin of DSP2812 high speed processor IC1, GPIOA5 pin, GPIOA6 pin are connected respectively to CS pin, SID pin, the SCLK pin of liquid crystal display screen display lcd 12864; DSP2812 high speed processor IC1 with being connected of button is: the GPIOA7 pin of DSP2812 high speed processor IC1, GPIOA8 pin, GPIOA9 pin, GPIOA10 pin are connected respectively to the end of button K1, button K2, button K3, button K4, button K1, button K2, button K3, the other end ground connection of pressing K4.
Voltage signal conditioning circuit is converted to the treatable ac voltage signal of DSP2812 high speed processor IC1 to the alternating voltage of AC phase, current signal conditioning circuit is converted to the treatable ac current signal of DSP2812 high speed processor IC1 to the alternating voltage of B phase, after the voltage and current ac small signal enters DSP2812 high speed processor IC1, carry out computing, obtain voltage effective value, current effective value, power factor, voltage harmonic content and current harmonic content, active power and reactive power.DSP2812 high speed processor IC1 judges these parameters, considers the size of voltage, the size of active power, to determine the capacitor switching action.Liquid crystal display screen display lcd 12864 shows every data of control procedure, and button is for inputting setting value and parameter.
Claims (1)
1. a reactive power compensation intelligent controller, its structure comprises that DSP2812 high speed processor IC1 and ULN2003A drive chip IC 2, voltage signal conditioning circuit, current signal conditioning circuit, it is characterized in that: described voltage signal conditioning circuit is parallel resistance R3 between input terminal Ua and Uc, resistance R 3 one ends are connected to resistance R 4 and capacitor C 1 through resistance R 1, resistance R 3 other ends are connected to resistance R 5 and capacitor C 2 through resistance R 2, and an other end of capacitor C 1 and capacitor C 2 connects together ground connection; The other end of resistance R 4 and resistance R 5 connects together and connects the Vref current potential, the tie point of resistance R 1, resistance R 4 and capacitor C 1 is connected to the AD0 pin of DSP2812 high speed processor IC1, and the tie point of resistance R 2, resistance R 5 and capacitor C 2 is connected to the AD1 pin of DSP2812 high speed processor IC1; Parallel resistance R8 between input terminal Ib and In, resistance R 8 one ends are connected to resistance R 9 and capacitor C 3 through resistance R 6, resistance R 8 other ends are connected to resistance R 10 and capacitor C 4 through resistance R 7, an other end of capacitor C 3 and capacitor C 4 connects together ground connection, the other end of resistance R 9 and resistance R 10 connects together and connects the Vref current potential, the tie point of resistance R 6, resistance R 9 and capacitor C 3 is connected to the AD2 pin of DSP2812 high speed processor IC1, and the tie point of resistance R 7, resistance R 10 and capacitor C 4 is connected to the AD3 pin of DSP2812 high speed processor IC1; The GPIOA0 pin of DSP2812 high speed processor IC1, GPIOA1 pin, GPIOA2 pin, GPIOA3 pin are connected respectively to 1 pin, 2 pin, 3 pin, 4 pin that ULN2003A drives chip IC 2, ULN2003A drives 16 pin, 15 pin, 14 pin, 13 pin of chip IC 2 to be connected respectively to an end of relay J 1, relay J 2, relay J 3, relay J 4, and an other end of relay J 1, relay J 2, relay J 3, relay J 4 connects together; DSP2812 high speed processor IC1 with being connected of liquid crystal display screen display lcd 12864 is: the GPIOA4 pin of DSP2812 high speed processor IC1, GPIOA5 pin, GPIOA6 pin are connected respectively to CS pin, SID pin, the SCLK pin of liquid crystal display screen display lcd 12864; DSP2812 high speed processor IC1 with being connected of button is: the GPIOA7 pin of DSP2812 high speed processor IC1, GPIOA8 pin, GPIOA9 pin, GPIOA10 pin are connected respectively to the end of button K1, button K2, button K3, button K4, button K1, button K2, button K3, the other end ground connection of pressing K4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320406539.8U CN203387187U (en) | 2013-07-09 | 2013-07-09 | Reactive power compensation intelligent controller |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201320406539.8U CN203387187U (en) | 2013-07-09 | 2013-07-09 | Reactive power compensation intelligent controller |
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| CN203387187U true CN203387187U (en) | 2014-01-08 |
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| CN201320406539.8U Expired - Fee Related CN203387187U (en) | 2013-07-09 | 2013-07-09 | Reactive power compensation intelligent controller |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104779629A (en) * | 2015-05-04 | 2015-07-15 | 刘洋 | Wireless communication control system for capacitance compensation cabinet in transmission grid |
-
2013
- 2013-07-09 CN CN201320406539.8U patent/CN203387187U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104779629A (en) * | 2015-05-04 | 2015-07-15 | 刘洋 | Wireless communication control system for capacitance compensation cabinet in transmission grid |
| CN104779629B (en) * | 2015-05-04 | 2017-03-01 | 深圳市中远通电源技术开发有限公司 | Wireless communication control system for the capacitor compensation cabinet in power transmission network |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140108 Termination date: 20160709 |
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| CF01 | Termination of patent right due to non-payment of annual fee |