CN203311824U - Cloud terminal of all-in-one machine - Google Patents
Cloud terminal of all-in-one machine Download PDFInfo
- Publication number
- CN203311824U CN203311824U CN2013201483359U CN201320148335U CN203311824U CN 203311824 U CN203311824 U CN 203311824U CN 2013201483359 U CN2013201483359 U CN 2013201483359U CN 201320148335 U CN201320148335 U CN 201320148335U CN 203311824 U CN203311824 U CN 203311824U
- Authority
- CN
- China
- Prior art keywords
- resistance
- diode
- pin
- cloud terminal
- supply voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Landscapes
- Liquid Crystal Display Device Control (AREA)
Abstract
The utility model relates to the field of all-in-one machines and particularly relates to a cloud terminal of an all-in-one machine. The cloud terminal of the all-in-one machine is connected with a power-voltage VCC. The cloud terminal of the all-in-one machine includes an ARM mainboard and a display screen and also includes a display drive module which is connected with the ARM mainboard and the display screen respectively to switch display frequencies and distinguishabilities and a signal switch module which is connected with the display drive module and switches input signal sources. In the cloud terminal of the all-in-one machine, external signals input by the different signal sources with different display distinguishabilities and frequencies can be switched through the display drive module and the signal switch module so that problems that display distinguishabilities and frequencies cannot be switched and different signal sources cannot be switched in the prior cloud terminals of all-in-one machines are solved.
Description
Technical field
The utility model belongs to the all-in-one field, relates in particular to a kind of all-in-one cloud terminal.
Background technology
Along with industry and the fast development of infotech, increasing electronic product enters our life, and all-in-one cloud terminal is also arisen at the historic moment, and existing all-in-one cloud terminal has all been brought numerous enjoyment to our living and studying etc.
But existing all-in-one cloud terminal push is various, can not switch display resolution and frequency, do not possess the function of switching signal input source yet, during the product of the such function needed people, need the ancillary cost financial resources, not only make operation become loaded down with trivial details, also reduced people's experience effect.
The utility model content
The utility model provides a kind of all-in-one cloud terminal, is intended to solve all-in-one cloud terminal and can not switches display resolution and frequency, can not switch the problem of different signal sources.
In order to solve the problems of the technologies described above, the utility model is achieved in that a kind of all-in-one cloud terminal, with supply voltage VCC, is connected with signal source respectively, and described all-in-one cloud terminal comprises ARM mainboard and display screen, and described all-in-one cloud terminal also comprises:
With described ARM mainboard, described display screen and described signal source, be connected respectively the driver module of switching display frequency and resolution;
With described driver module, be connected respectively the signal handover module in switched input signal source with described ARM mainboard.
Further, described all-in-one cloud terminal also comprises:
With described ARM mainboard, be connected the clock control module of setup times and alarm clock.
Further, described signal handover module comprises:
Micro-processor MCV, picture processing chip Scale IC, power switch POWER, resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 8, diode D1, diode D2, diode D3, diode D4, diode D5, filter capacitor C1, filter capacitor C2, filter capacitor C3, filter capacitor C4, socket CN1, NPN type triode Q1;
Described resistance R 1 and described capacitor C 1 are connected between supply voltage VCC and ground, described power switch POWER is connected to the two ends of described capacitor C 1, described resistance R 2 is connected between the input pin Input of the public connecting end of described resistance R 1 and described capacitor C 1 and described micro-processing MCU, described picture processing chip Scale IC is connected with described Micro-processor MCV with described driver module respectively, described resistance R 3 is connected between the output pin Output of supply voltage VCC and described Micro-processor MCV, described resistance R 4 is connected between the first end of the base stage of the output pin Output of described Micro-processor MCV and described NPN type triode Q1 and described capacitor C 2, the emitter of the second end of described capacitor C 2 and described NPN type triode Q1 is connected to ground altogether, the collector of described NPN type triode Q1 is connected with the first end of described resistance R 5 and the input end of described ARM mainboard respectively, the second end of described resistance R 5 is connected with supply voltage VCC, the first end of described resistance R 7 respectively with the first end of described resistance R 6 and the anodic bonding of described diode D1, the second end ground connection of described resistance R 7, the second end of described resistance R 6 is connected with supply voltage VCC, the negative electrode of described diode D1 is connected with the negative electrode of described diode D2 and the level signal input pin POR_EN of described ARM mainboard respectively, the anode of described diode D2 is connected with the feedback signal output pin PWR_ON of described ARM mainboard and the first end of described resistance R 8 respectively, the second end ground connection of described resistance R 8.
Further, described clock control module comprises:
Clock control chip RTC, resistance R 8, resistance R 9, resistance R 10, filter capacitor C5, diode D3;
Clock signal pin SCL and the data signal pin SDA of described clock control chip RTC pass through I
2the C bus pin corresponding with described ARM mainboard respectively connects, the clock control pin FOUT of described clock control chip RTC controls pin/INT pin corresponding with described ARM mainboard with interruption and is connected, described resistance R 8 is connected between supply voltage VCC and described clock making pin FOUT, the anode of described diode D3 meets supply voltage VCC, the negative electrode of described diode D3 is connected with the power pins VDD of described supply voltage VCC and described clock control chip RTC, described resistance R 9 and described filter capacitor C5 are connected between the negative electrode and ground of described diode D3, described resistance R 10 is connected to supply voltage VCC and described interruption is controlled between pin/INT.
In the utility model, by driver module and signal handover module, can switch the external signal of the unlike signal source input of different display resolutions and frequency, solve existing all-in-one cloud terminal and can not switch display resolution and frequency, can not switch the problem of different signal sources.
The accompanying drawing explanation
Fig. 1 is the modular structure figure of the all-in-one cloud terminal that provides of the utility model embodiment;
Fig. 2 is the circuit structure diagram of the signal handover module that provides of the utility model embodiment;
Fig. 3 is the circuit structure diagram of the clock control module that provides of the utility model embodiment.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
Below in conjunction with specific embodiment, specific implementation of the present utility model is described in detail:
As 1 modular structure that shows the all-in-one cloud terminal that the utility model embodiment provides, for convenience of explanation, only show the part relevant to the utility model embodiment, details are as follows:
As the utility model one embodiment, all-in-one cloud terminal 100, be connected with signal source 106 with supply voltage VCC respectively, and all-in-one cloud terminal 100 comprises ARM mainboard 101 and display screen 102, and all-in-one cloud terminal 100 also comprises:
With ARM mainboard 101, display screen 102 and signal source 106, be connected respectively the driver module 103 of switching display frequency and resolution;
With driver module 103, be connected respectively the signal handover module 104 in switched input signal source with ARM mainboard 101.
In the utility model embodiment, driver module 103 is the display driver plate, can drive the input signal source of different resolution different frequency.
As the utility model one embodiment, all-in-one cloud terminal 100 also comprises:
With ARM mainboard 101, be connected the clock control module 105 of setup times and alarm clock.
As shown in Figure 2, the circuit structure of the signal handover module that the utility model embodiment provides, for convenience of explanation, only show the part relevant to the utility model embodiment, and details are as follows:
As the utility model one embodiment, signal handover module 104 comprises:
Micro-processor MCV, picture processing chip Scale IC, power switch POWER, resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 8, diode D1, diode D2, diode D3, diode D4, diode D5, filter capacitor C1, filter capacitor C2, filter capacitor C3, filter capacitor C4, socket CN1, NPN type triode Q1;
Resistance R 1 and capacitor C 1 are connected between supply voltage VCC and ground, power switch POWER is connected to the two ends of capacitor C 1, resistance R 2 is connected between the input pin Input of the public connecting end of resistance R 1 and capacitor C 1 and micro-processing MCU, picture processing chip Scale IC is connected with Micro-processor MCV with driver module respectively, resistance R 3 is connected between the output pin Output of supply voltage VCC and Micro-processor MCV, resistance R 4 is connected between the first end of the base stage of the output pin Output of Micro-processor MCV and NPN type triode Q1 and capacitor C 2, the emitter of the second end of capacitor C 2 and NPN type triode Q1 is connected to ground altogether, the collector of NPN type triode Q1 is connected with the first end of resistance R 5 and the input end of ARM mainboard respectively, the second end of resistance R 5 is connected with supply voltage VCC, the first end of resistance R 7 respectively with the first end of resistance R 6 and the anodic bonding of diode D1, the second end ground connection of resistance R 7, the second end of resistance R 6 is connected with supply voltage VCC, the negative electrode of diode D1 is connected with the negative electrode of diode D2 and the level signal input pin POR_EN of ARM mainboard respectively, the anode of diode D2 is connected with the feedback signal output pin PWR_ON of ARM mainboard and the first end of resistance R 8 respectively, the second end ground connection of resistance R 8.
In the utility model embodiment, the public connecting end of diode D1 and diode D2 can access the expanded circuit of other types, to realize different function and applications.
Fig. 3 shows the circuit structure of the clock control module that the utility model embodiment provides, and for convenience of explanation, only shows the part relevant to the utility model embodiment, and details are as follows:
As the utility model one embodiment, clock control module 105 comprises:
Clock control chip RTC, resistance R 8, resistance R 9, resistance R 10, filter capacitor C5, diode D3;
Clock signal pin SCL and the data signal pin SDA of clock control chip RTC pass through I
2The C bus pin corresponding with the ARM mainboard respectively connects, the clock control pin FOUT of clock control chip RTC and interrupt controlling pin/INT pin corresponding with the ARM mainboard and be connected, resistance R 8 be connected to supply voltage VCC and
The timeBetween clock making pin FOUT, the anode of diode D3 meets supply voltage VCC, the negative electrode of diode D3 is connected with the power pins VDD of the timely clock control chip of supply voltage VCC RTC, resistance R 9 and filter capacitor C5 are connected between the negative electrode and ground of diode D3, and resistance R 10 is connected to supply voltage VCC and interrupts controlling between pin/INT.
In the utility model embodiment, the model of clock control chip RTC is RX_8803SA.
Below in conjunction with the utility model embodiment, the principle of work of all-in-one cloud terminal is described.
Power switch key Power is connected to Micro-processor MCV, can realize respectively that (short pressing) controlled in switching on and shutting down and VGA/HDMI changes (long pressing).
When power switch key POWER did not press, the base stage of NPN type triode Q1 was high voltage, NPN type triode Q1 conducting, and level signal input pin POR_EN is low-voltage, does not produce power on/off function.
Short while pressing power switch key POWER, the Micro-processor MCV output LOW voltage, diode D1 cut-off, level signal input pin POR_EN export high level, is connected to the switch of ARM mainboard 101 control ARM mainboards 101.Originally in when shutdown, Micro-processor MCV control level signal input pin POR_EN sends high level when ARM mainboard 101, ARM mainboard 101 starts; Originally in when start, Micro-processor MCV control level signal input pin POR_EN sends high level when ARM mainboard 101, ARM mainboard 101 shutdown.
When length was pressed power switch key Power, microcontroller was VGA or HDMI by controlling image processing ics Scaler IC switching input source.
Image processing ics Scaler IC and Micro-processor MCV are used I
2The C bus mode communicates, and Micro-processor MCV passes through I
2The C bus arranges the register parameters of scaler IC, makes display work in VGA input pattern or HDMI input pattern.
Clock control chip RTC passes through I
2C bus and ARM mainboard 101 complete communication function, I
2The C bus adopts a clock signal pin RTC_SCL and a data signal pin RTC_SDA to realize communication process, and command word or status word can be read and write to ARM mainboard 101.
Interrupt pin/INT of clock control chip RTC is connected to the interrupt pin of ARM mainboard 101 be used to exporting alarm clock signal, timing signal, time modification signal etc.
Clock control chip RTC carries the crystal oscillator of 32.768Khz, can automatically carry out timing, ARM mainboard 101 at set intervals with clock control chip RTC proof time.
ARM mainboard 101 writes date time data and the zone bit of alarm clock when initial, clock control chip RTC carries out Auto-matching and the differentiation of current time and alarm time automatically, as a coupling in date current time and a plurality of alarm clock event, a special zone bit is set, and generation interruption/INT, 101 of ARM mainboards need response to interrupt, read the zone bit state, just can respond the alarm clock event.
In the utility model embodiment, by driver module and signal handover module, can switch the external signal of the unlike signal source input of different display resolutions and frequency, solve existing all-in-one cloud terminal and can not switch display resolution and frequency, can not switch the problem of different signal sources.
These are only preferred embodiment of the present utility model, not in order to limit the utility model, all any modifications of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection domain of the present utility model.
Claims (4)
1. an all-in-one cloud terminal, be connected with signal source with supply voltage VCC respectively, and described all-in-one cloud terminal comprises ARM mainboard and display screen, it is characterized in that, described all-in-one cloud terminal also comprises:
With described ARM mainboard, described display screen and described signal source, be connected respectively the driver module of switching display frequency and resolution;
With described driver module, be connected respectively the signal handover module in switched input signal source with described ARM mainboard.
2. all-in-one cloud terminal as claimed in claim 1, is characterized in that, described all-in-one cloud terminal also comprises:
With described ARM mainboard, be connected the clock control module of setup times and alarm clock.
3. all-in-one cloud terminal as claimed in claim 1, is characterized in that, described signal handover module comprises:
Micro-processor MCV, picture processing chip Scale IC, power switch POWER, resistance R 1, resistance R 2, resistance R 3, resistance R 4, resistance R 5, resistance R 6, resistance R 7, resistance R 8, diode D1, diode D2, diode D3, diode D4, diode D5, filter capacitor C1, filter capacitor C2, filter capacitor C3, filter capacitor C4, socket CN1, NPN type triode Q1;
Described resistance R 1 and described capacitor C 1 are connected between supply voltage VCC and ground, described power switch POWER is connected to the two ends of described capacitor C 1, described resistance R 2 is connected between the input pin Input of the public connecting end of described resistance R 1 and described capacitor C 1 and described micro-processing MCU, described picture processing chip Scale IC is connected with described Micro-processor MCV with described driver module respectively, described resistance R 3 is connected between the output pin Output of supply voltage VCC and described Micro-processor MCV, described resistance R 4 is connected between the first end of the base stage of the output pin Output of described Micro-processor MCV and described NPN type triode Q1 and described capacitor C 2, the emitter of the second end of described capacitor C 2 and described NPN type triode Q1 is connected to ground altogether, the collector of described NPN type triode Q1 is connected with the first end of described resistance R 5 and the input end of described ARM mainboard respectively, the second end of described resistance R 5 is connected with supply voltage VCC, the first end of described resistance R 7 respectively with the first end of described resistance R 6 and the anodic bonding of described diode D1, the second end ground connection of described resistance R 7, the second end of described resistance R 6 is connected with supply voltage VCC, the negative electrode of described diode D1 is connected with the negative electrode of described diode D2 and the level signal input pin POR_EN of described ARM mainboard respectively, the anode of described diode D2 is connected with the feedback signal output pin PWR_ON of described ARM mainboard and the first end of described resistance R 8 respectively, the second end ground connection of described resistance R 8.
4. all-in-one cloud terminal as claimed in claim 2, is characterized in that, described clock control module comprises:
Clock control chip RTC, resistance R 8, resistance R 9, resistance R 10, filter capacitor C5, diode D3;
Clock signal pin SCL and the data signal pin SDA of described clock control chip RTC pass through I
2the C bus pin corresponding with described ARM mainboard respectively connects, the clock control pin FOUT of described clock control chip RTC controls pin/INT pin corresponding with described ARM mainboard with interruption and is connected, described resistance R 8 is connected between supply voltage VCC and described clock control pin FOUT, the anode of described diode D3 meets supply voltage VCC, the negative electrode of described diode D3 is connected with the power pins VDD of described supply voltage VCC and described clock control chip RTC, described resistance R 9 and described filter capacitor C5 are connected between the negative electrode and ground of described diode D3, described resistance R 10 is connected to supply voltage VCC and described interruption is controlled between pin/INT.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013201483359U CN203311824U (en) | 2013-03-28 | 2013-03-28 | Cloud terminal of all-in-one machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013201483359U CN203311824U (en) | 2013-03-28 | 2013-03-28 | Cloud terminal of all-in-one machine |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203311824U true CN203311824U (en) | 2013-11-27 |
Family
ID=49618015
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2013201483359U Expired - Lifetime CN203311824U (en) | 2013-03-28 | 2013-03-28 | Cloud terminal of all-in-one machine |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203311824U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108090017A (en) * | 2017-12-19 | 2018-05-29 | 珠海智星荟科技服务有限公司 | A kind of big data all-in-one machine |
-
2013
- 2013-03-28 CN CN2013201483359U patent/CN203311824U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108090017A (en) * | 2017-12-19 | 2018-05-29 | 珠海智星荟科技服务有限公司 | A kind of big data all-in-one machine |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100377037C (en) | Memory voltage signal generation circuit | |
| CN110264971A (en) | Anti- splashette circuit and method, driving circuit, display device | |
| CN103576816A (en) | Startup and shutdown control circuit | |
| CN204480644U (en) | Display module EDID reading and writing data proving installation | |
| CN104240627A (en) | Liquid-crystal display module testing device | |
| CN201583942U (en) | Device for online writing EDID by USB | |
| CN109669524B (en) | Power-on reset circuit of chip | |
| CN203311824U (en) | Cloud terminal of all-in-one machine | |
| TWI521336B (en) | Display device | |
| CN100412754C (en) | Power supply voltage generation circuit | |
| CN201503569U (en) | South bridge chip power supply circuit | |
| CN204666786U (en) | Scale sequential logic apparatus for testing chip in LTTL/LCMOS type | |
| CN101201690A (en) | System for supplying and managing electricity of computer mainboard | |
| CN100389373C (en) | Circuit for generating source voltage | |
| WO2022083360A1 (en) | Display touch apparatus and power supply control method | |
| CN210295083U (en) | Display board card USB peripheral hardware connecting system | |
| CN102880076A (en) | Power supply time sequence simulation generation device and control method | |
| CN108509372B (en) | System-on-chip | |
| CN214011772U (en) | Based on RK3288 industrial control all-in-one control panel | |
| JPH0321928B2 (en) | ||
| CN101996143B (en) | Electronic device reset circuit | |
| CN207603610U (en) | With OR circuit and NOR gate circuit | |
| CN201247425Y (en) | Computer capable of switching memory apparatus | |
| CN210864615U (en) | Power supply circuit of tablet computer | |
| CN111740477B (en) | Display screen control system and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 518000 computer building of the Great Wall, Nanshan District science and Technology Park, Shenzhen, Guangdong Patentee after: CHINA GREAT WALL TECHNOLOGY GROUP Co.,Ltd. Address before: 518057 the Great Wall computer building, 3 FA FA Road, Shenzhen science and Technology Industrial Park, Guangdong, China Patentee before: CHINA GREATWALL COMPUTER SHENZHEN Co.,Ltd. |
|
| CP03 | Change of name, title or address | ||
| CX01 | Expiry of patent term |
Granted publication date: 20131127 |
|
| CX01 | Expiry of patent term |