CN203179943U - 一种防水型smd led封装结构 - Google Patents

一种防水型smd led封装结构 Download PDF

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CN203179943U
CN203179943U CN2013200624627U CN201320062462U CN203179943U CN 203179943 U CN203179943 U CN 203179943U CN 2013200624627 U CN2013200624627 U CN 2013200624627U CN 201320062462 U CN201320062462 U CN 201320062462U CN 203179943 U CN203179943 U CN 203179943U
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pin
flanging
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encapsulating structure
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谭亮
王祖亮
饶伟才
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Xiamen Xindeco Optoelectronics Co Ltd
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Xiamen Xindeco Optoelectronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/85951—Forming additional members, e.g. for reinforcing

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Abstract

本实用新型公开一种防水型SMD LED封装结构，包括壳体、PIN脚、芯片及金线；壳体中形成碗状空腔，PIN脚对称安装在壳体两侧，且伸入空腔中；芯片固定在空腔底部功能区，通过金线分别与对称设置的PIN脚连接；PIN脚至少由四个折边组成。本实用新型增加PIN脚折边，进而增加水汽的爬行距离，从而延长使用寿命。

Description

一种防水型SMD LED封装结构
技术领域
本实用新型涉及一种防水型SMD LED封装结构。 
背景技术
如图1至图5所示，现有技术揭示的一种LED封装结构，包括壳体10、PIN脚20、芯片30及金线40；壳体10形成口径往下渐缩的碗状空腔101，PIN脚20左右对称地安装在壳体10两侧，并伸入空腔101中；一侧PIN脚20与电源正极连接，另一侧PIN脚20与电源负极连接；芯片30固定在碗状空腔101底部，芯片30通过金线40分别与两侧PIN脚20焊接，形成可导通的线路，通电流后将芯片30导通发光。通过不同发光颜色的芯片组合复合成需要的颜色，在使用中，通常在碗状空腔中灌封树脂胶体50。 
如图2所示，PIN脚20呈“7”字型，由第一折边201、第二折边202及第三折边203组成，在长期的使用下，水汽依次延着、第二折边202及第三折边203往上爬。由于只有两个折边，水汽容易往上爬进入空腔底部，腐蚀PIN脚20功能区部分、芯片30及金线40，减少其使用寿命。 
如图2及图3所示，空腔101的截面呈“梯形”，且由上往下口径逐渐缩小而形成斜坡，因此，水汽顺延斜坡往下爬，长期使用下，水汽最终进入空腔101底部，腐蚀PIN脚20功能区部、芯片30及金线40，减少其使用寿命。 
实用新型内容
本实用新型的目的在于提供一种延长水汽的爬行距离而提升LED的防潮等级，增加LED使用寿命的防水型SMDLED封装结构。 
为达成上述目的，本实用新型的解决方案为： 
一种防水型SMDLED封装结构，包括壳体、PIN脚、芯片及金线；壳体中形成碗状空腔，PIN脚对称安装在壳体两侧，且伸入空腔中；芯片安装在空腔底部功能区，通过金线分别与对称设置的PIN脚连接；PIN脚至少由四个折边组成。
进一步，PIN脚由第一折边、第二折边、第三折边、第四折边及第五折边组成，第一折边与第二折边连接呈“7”字型，第四折边与第五折边连接呈“7”字型；第二折边与第四折边通过第三折边连接。 
进一步，碗状空腔的口部形成杯口台阶。 
进一步，还包括树脂胶体，树脂胶体灌封在碗状空腔中。 
进一步，PIN脚对称设置三对。 
采用上述方案后，本实用新型PIN脚至少由四个折边组成，比现有技术的PIN脚增加折边，进而增加水汽的爬行距离，从而延长本实用新型的使用寿命。 
而且，本实用新型在碗状空腔的口部形成杯口台阶，进一步增加水汽沿空腔斜坡的爬行距离，进一步延长本实用新型的使用寿命。 
附图说明
图1是现有技术的俯视图； 
图2是图1A-A方向剖视图；
图3是现有技术右视图；
图4是现有技术立体组合图；
图5是现有技术立体分解图；
图6是本实用新型的俯视图；
图7是图6B-B方向剖视图；
图8是本实用新型右视图；
图9是本实用新型立体组合图。
标号说明 
壳体10               空腔101
PIN脚20             第一折边201
第二折边202          第三折边203
芯片30               金线40
树脂胶体50
壳体1                空腔11
杯口台阶12           PIN脚2
第一折边21           第二折边22
第三折边23           第四折边24
第五折边25           芯片3
金线4                 树脂胶体5。
具体实施方式
以下结合附图及具体实施例对本实用新型作较为详细的说明。 
参阅图6至图9所示，本实用新型揭示的一种防水型SMDLED封装结构，包括壳体1、PIN脚2、芯片3及金线4。 
壳体1中形成碗状空腔11，空腔11的口径由上往下逐渐缩小，PIN脚2对称安装在壳体两侧，其中一侧的PIN脚2与电源（图中未示出）正极连接，而另一侧的PIN脚2与电源负极连接，两侧的PIN脚2分开不接触，且两侧的PIN脚2都伸入空腔11中，如图6及图7所示。本实施例中，PIN脚2对称设置三对，每一侧设置三个。 
不同发光波长的芯片3分别固定在碗状空腔11底部功能区，通过金线4分别与对称设置的PIN脚2功能区焊接连接，形成可导通的线路，通电流后，进而使得固定在芯片3中的LED灯珠（图中未示出）发光。 
其中，PIN脚2至少由四个折边组成。本实施例中，如图7所示，PIN脚2由第一折边21、第二折边22、第三折边23、第四折边24及第五折边25组成，第一折边21与第二折边22连接呈“7”字型，第四折边24与第五折边25连接呈“7”字型；第二折边22与第四折边24通过第三折边23连接。 
为进一步增加水汽沿空腔斜坡的爬行距离，在碗状空腔11的口部形成杯口台阶12，杯口台阶12可以为一级台阶，也可以为多级台阶。 
本实用新型在使用时，通常在空腔11中灌封树脂胶体5，用于保护芯片3及金线4，延长使用寿命。 
以上所述仅为本实用新型的较佳实施例，并非对本案设计的限制，凡依本案的设计关键所做的等同变化，均落入本案的保护范围。 

Claims (5)

1.一种防水型SMD LED封装结构，包括壳体、PIN脚、芯片及金线；壳体中形成碗状空腔，PIN脚对称安装在壳体两侧，且伸入空腔中；芯片固定在空腔底部功能区，通过金线分别与对称设置的PIN脚连接；其特征在于：PIN脚至少由四个折边组成。
2.如权利要求1所述的一种防水型SMDLED封装结构，其特征在于：PIN脚由第一折边、第二折边、第三折边、第四折边及第五折边组成，第一折边与第二折边连接呈“7”字型，第四折边与第五折边连接呈“7”字型；第二折边与第四折边通过第三折边连接。
3.如权利要求1或2所述的一种防水型SMDLED封装结构，其特征在于：碗状空腔的口部形成杯口台阶。
4.如权利要求1或2所述的一种防水型SMDLED封装结构，其特征在于：PIN脚对称设置三对。
5.如权利要求1所述的一种防水型SMDLED封装结构，其特征在于：还包括树脂胶体，树脂胶体灌封在碗状空腔中。
CN2013200624627U 2013-02-04 2013-02-04 一种防水型smd led封装结构 Expired - Fee Related CN203179943U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160145303A (ko) * 2015-06-10 2016-12-20 엘지이노텍 주식회사 발광 소자 패키지

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160145303A (ko) * 2015-06-10 2016-12-20 엘지이노텍 주식회사 발광 소자 패키지
KR102402259B1 (ko) 2015-06-10 2022-05-27 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 발광 소자 패키지

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