CN203166843U - Head amplifying circuit for routers - Google Patents
Head amplifying circuit for routers Download PDFInfo
- Publication number
- CN203166843U CN203166843U CN 201320107815 CN201320107815U CN203166843U CN 203166843 U CN203166843 U CN 203166843U CN 201320107815 CN201320107815 CN 201320107815 CN 201320107815 U CN201320107815 U CN 201320107815U CN 203166843 U CN203166843 U CN 203166843U
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- China
- Prior art keywords
- resistor
- capacitor
- potentiometer
- operational amplifier
- electrical resistor
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
The utility model discloses a head amplifying circuit for routers, which comprises a direct-current main, a first voltage stabilizer, a second voltage stabilizer, a first operational amplifier, a second operational amplifier, a first potentiometer, a second potentiometer, a third potentiometer, a fourth potentiometer, a first electrical resistor, a second electrical resistor, a third electrical resistor, a fourth electrical resistor, a fifth electrical resistor, a sixth electrical resistor, a seventh electrical resistor, an eighth electrical resistor, a ninth electrical resistor, a tenth electrical resistor,an eleventh electrical resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor and a ninth capacitor. The head amplifying circuit for routers reduces the pressure of CPUs of the routers through amplifying signals and has the advantages of simple circuit structure and convenience in mounting and debugging.
Description
Technical field
The utility model relates to a kind of magnetic head amplifying circuit, relates in particular to a kind of router magnetic head amplifying circuit.
Background technology
At present, router transmission signal all is after signal is handled by CPU, obtains instructing the back to connect the Internet network, so just makes that a plurality of PCs occurring asks for instruction to CPU simultaneously, causes the CPU processing speed slow, causes PC not connect network.
The utility model content
The purpose of this utility model provides a kind of router magnetic head amplifying circuit with regard to being in order to address the above problem.
The utility model is achieved through the following technical solutions above-mentioned purpose:
The utility model comprises DC power supply, first pressurizer, second pressurizer, first operational amplifier, second operational amplifier, first potentiometer, second potentiometer, the 3rd potentiometer, the 4th potentiometer, first resistor, second resistor, the 3rd resistor, the 4th resistor, the 5th resistor, the 6th resistor, the 7th resistor, the 8th resistor, the 9th resistor, the tenth resistor, the 11 resistor, first capacitor, second capacitor, the 3rd capacitor, the 4th capacitor, the 5th capacitor, the 6th capacitor, the 7th capacitor, the 8th capacitor and the 9th capacitor, first end of described the 9th capacitor is connected with signal input part, second end of described the 9th capacitor is connected with first end of described the 11 resistor and the normal phase input end of described second operational amplifier respectively, the inverting input of described second operational amplifier is connected with first end of described the 9th resistor and first end of described the tenth resistor respectively, second end of described the 9th resistor is connected with first end of described the 8th resistor and the signal output part of described second operational amplifier respectively, the electrode input end of described second operational amplifier is connected with first end of described the 3rd capacitor and first end of described first pressurizer respectively, second end of described first pressurizer is connected with first end of described second capacitor and the cathode output end of described DC power supply respectively, the cathode output end of described second operational amplifier is connected with first end of described the 8th capacitor and first end of described second pressurizer respectively, second end of described second pressurizer is connected with first end of described the 7th capacitor and the cathode output end of described DC power supply respectively, second end of described the 8th resistor respectively with first end of described the 5th resistor, first end of described the 6th resistor is connected with first end of described the 7th resistor, second end of described the 5th resistor is connected with first end of described first potentiometer and first end of described first capacitor respectively, second end of described first potentiometer is connected with second end of described first capacitor and first end of described first resistor respectively, the sliding end of described first potentiometer is connected with first end of described second resistor, second end of described second resistor respectively with first end of described the 5th resistor, first end of described the 6th capacitor is connected with the normal phase input end of described first operational amplifier, second end of described the 5th resistor is connected with the sliding end of described second potentiometer, second end of described the 6th resistor is connected with first end of described the 4th capacitor and first end of described second potentiometer respectively, second end of described second potentiometer is connected with second end of described the 4th capacitor and first end of described the 3rd resistor respectively, second end of described the 3rd resistor is connected and is connected with first end of described the 4th potentiometer behind described the 4th resistor, second end of described the 7th resistor is connected with first end of described the 3rd potentiometer, the sliding end of described the 3rd potentiometer is connected with second end of described the 6th capacitor, second end of described the 3rd potentiometer is connected with second end of described the 5th resistor, second end of described second capacitor, second end of described the 3rd capacitor, second end of described the 7th capacitor, second end of described the 8th capacitor, second end of described the tenth capacitor, second end of described the 11 capacitor, second end of the inverting input of described first operational amplifier and described the 4th potentiometer all is connected with the negative pole of described DC power supply.
The beneficial effects of the utility model are:
The utility model makes router cpu reduce pressure by the amplification to signal; The utlity model has the simple and Installation and Debugging of circuit structure advantage easily.
Description of drawings
Fig. 1 is the circuit diagram that a kind of router described in the utility model is used the magnetic head amplifying circuit.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing:
As shown in Figure 1: the utility model comprises DC power supply, the first pressurizer W1, the second pressurizer W2, the first operational amplifier IC1, the second operational amplifier IC2, the first potentiometer RP1, the second potentiometer RP2, the 3rd potentiometer RP3, the 4th potentiometer RP4, the first resistor R1, the second resistor R2, the 3rd resistor R3, the 4th resistor R4, the 5th resistor R5, the 6th resistor R6, the 7th resistor R7, the 8th resistor R8, the 9th resistor R9, the tenth resistor R10, the 11 resistor R11, the first capacitor C1, the second capacitor C2, the 3rd capacitor C3, the 4th capacitor C4, the 5th capacitor C5, the 6th capacitor C6, the 7th capacitor C7, the 8th capacitor C8 and the 9th capacitor C9, first end of the 9th capacitor C9 is connected with signal input part, second end of the 9th capacitor C9 is connected with first end of the 11 resistor R11 and the normal phase input end of the second operational amplifier IC2 respectively, the inverting input of the second operational amplifier IC2 is connected with first end of the 9th resistor R9 and first end of the tenth resistor R10 respectively, second end of the 9th resistor R9 is connected with first end of the 8th resistor R8 and the signal output part of the second operational amplifier IC2 respectively, the electrode input end of the second operational amplifier IC2 is connected with first end of the 3rd capacitor C3 and first end of the first pressurizer W1 respectively, second end of the first pressurizer W1 is connected with first end of the second capacitor C2 and the cathode output end of DC power supply respectively, the cathode output end of the second operational amplifier IC2 is connected with first end of the 8th capacitor C8 and first end of the second pressurizer W2 respectively, second end of the second pressurizer W2 is connected with first end of the 7th capacitor C7 and the cathode output end of DC power supply respectively, second end of the 8th resistor R8 respectively with first end of the 5th resistor R5, first end of the 6th resistor R6 is connected with first end of the 7th resistor R7, second end of the 5th resistor R5 is connected with first end of the first potentiometer RP1 and first end of the first capacitor C1 respectively, second end of the first potentiometer RP1 is connected with second end of the first capacitor C1 and first end of the first resistor R1 respectively, the sliding end of the first potentiometer RP1 is connected with first end of the second resistor R2, second end of the second resistor R2 respectively with first end of the 5th resistor R5, first end of the 6th capacitor C6 is connected with the normal phase input end of the first operational amplifier IC1, second end of the 5th resistor R5 is connected with the sliding end of the second potentiometer RP2, second end of the 6th resistor R6 is connected with first end of the 4th capacitor C4 and first end of the second potentiometer RP2 respectively, second end of the second potentiometer RP2 is connected with second end of the 4th capacitor C4 and first end of the 3rd resistor R3 respectively, second end of the 3rd resistor R3 is connected and is connected with first end of the 4th potentiometer RP4 behind the 4th resistor R4, second end of the 7th resistor R7 is connected with first end of the 3rd potentiometer RP3, the sliding end of the 3rd potentiometer RP3 is connected with second end of the 6th capacitor C6, second end of the 3rd potentiometer RP3 is connected with second end of the 5th resistor R5, second end of the second capacitor C2, second end of the 3rd capacitor C3, second end of the 7th capacitor C7, second end of the 8th capacitor C8, second end of the tenth capacitor C10, second end of the 11 capacitor C11, second end of the inverting input of the first operational amplifier IC1 and the 4th potentiometer RP4 all is connected with the negative pole of DC power supply.
Claims (1)
1. router magnetic head amplifying circuit, it is characterized in that: comprise DC power supply, first pressurizer, second pressurizer, first operational amplifier, second operational amplifier, first potentiometer, second potentiometer, the 3rd potentiometer, the 4th potentiometer, first resistor, second resistor, the 3rd resistor, the 4th resistor, the 5th resistor, the 6th resistor, the 7th resistor, the 8th resistor, the 9th resistor, the tenth resistor, the 11 resistor, first capacitor, second capacitor, the 3rd capacitor, the 4th capacitor, the 5th capacitor, the 6th capacitor, the 7th capacitor, the 8th capacitor and the 9th capacitor, first end of described the 9th capacitor is connected with signal input part, second end of described the 9th capacitor is connected with first end of described the 11 resistor and the normal phase input end of described second operational amplifier respectively, the inverting input of described second operational amplifier is connected with first end of described the 9th resistor and first end of described the tenth resistor respectively, second end of described the 9th resistor is connected with first end of described the 8th resistor and the signal output part of described second operational amplifier respectively, the electrode input end of described second operational amplifier is connected with first end of described the 3rd capacitor and first end of described first pressurizer respectively, second end of described first pressurizer is connected with first end of described second capacitor and the cathode output end of described DC power supply respectively, the cathode output end of described second operational amplifier is connected with first end of described the 8th capacitor and first end of described second pressurizer respectively, second end of described second pressurizer is connected with first end of described the 7th capacitor and the cathode output end of described DC power supply respectively, second end of described the 8th resistor respectively with first end of described the 5th resistor, first end of described the 6th resistor is connected with first end of described the 7th resistor, second end of described the 5th resistor is connected with first end of described first potentiometer and first end of described first capacitor respectively, second end of described first potentiometer is connected with second end of described first capacitor and first end of described first resistor respectively, the sliding end of described first potentiometer is connected with first end of described second resistor, second end of described second resistor respectively with first end of described the 5th resistor, first end of described the 6th capacitor is connected with the normal phase input end of described first operational amplifier, second end of described the 5th resistor is connected with the sliding end of described second potentiometer, second end of described the 6th resistor is connected with first end of described the 4th capacitor and first end of described second potentiometer respectively, second end of described second potentiometer is connected with second end of described the 4th capacitor and first end of described the 3rd resistor respectively, second end of described the 3rd resistor is connected and is connected with first end of described the 4th potentiometer behind described the 4th resistor, second end of described the 7th resistor is connected with first end of described the 3rd potentiometer, the sliding end of described the 3rd potentiometer is connected with second end of described the 6th capacitor, second end of described the 3rd potentiometer is connected with second end of described the 5th resistor, second end of described second capacitor, second end of described the 3rd capacitor, second end of described the 7th capacitor, second end of described the 8th capacitor, second end of described the tenth capacitor, second end of described the 11 capacitor, second end of the inverting input of described first operational amplifier and described the 4th potentiometer all is connected with the negative pole of described DC power supply.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201320107815 CN203166843U (en) | 2013-03-11 | 2013-03-11 | Head amplifying circuit for routers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201320107815 CN203166843U (en) | 2013-03-11 | 2013-03-11 | Head amplifying circuit for routers |
Publications (1)
Publication Number | Publication Date |
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CN203166843U true CN203166843U (en) | 2013-08-28 |
Family
ID=49027996
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN 201320107815 Expired - Fee Related CN203166843U (en) | 2013-03-11 | 2013-03-11 | Head amplifying circuit for routers |
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CN (1) | CN203166843U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104052417A (en) * | 2013-03-11 | 2014-09-17 | 成都艺创科技有限公司 | Magnetic head amplification circuit used for router |
-
2013
- 2013-03-11 CN CN 201320107815 patent/CN203166843U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104052417A (en) * | 2013-03-11 | 2014-09-17 | 成都艺创科技有限公司 | Magnetic head amplification circuit used for router |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130828 Termination date: 20140311 |