CN203101550U - Test circuit for two-level converter switching performance based on dipulse - Google Patents
Test circuit for two-level converter switching performance based on dipulse Download PDFInfo
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- CN203101550U CN203101550U CN 201320047535 CN201320047535U CN203101550U CN 203101550 U CN203101550 U CN 203101550U CN 201320047535 CN201320047535 CN 201320047535 CN 201320047535 U CN201320047535 U CN 201320047535U CN 203101550 U CN203101550 U CN 203101550U
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Abstract
The utility model discloses a test circuit for two-level converter switching performance based on dipulse. The test circuit comprises a first IGBT and a second IGBT which are tandem, a first IGBT drive circuit, a second IGBT drive circuit, a pulse generator, a direct current supporting capacitor, laminated busbars, a direct current source and a freewheel reactor. The pulse generator controls the second IGBT to be in a turn-off state through the second IGBT drive circuit and applies dipulse on the first IGBT through the first IGBT drive circuit; the process of turn-on of a second pulse is utilized for measuring reverse recovery characteristics of a diode antiparallel to the second IGBT and turn-on delay of the first IGBT drive circuit and the first IGBT; the process of turn-off of the second pulse is utilized for measuring turn-off delay of the first IGBT drive circuit and the first IGBT. The test circuit provided by the utility model is simple and easily practicable and can accurately measure turn-on and turn-off delay of a two-level converter system.
Description
Technical field
The utility model relates to the power electronics application, is specifically related to a kind of circuit that utilizes dipulse to test two level current transformer switch performances.
Background technology
Along with the development of Power Electronic Technique and the continuous expansion of application, two level current transformers still occupy the bigger market share in actual applications as the topological structure of main flow.And the IGBT(insulated gate bipolar transistor) self and the technical indicator that drives thereof, and connect the technical feature that power device, direct current support the stack bus bar of electric capacity, all be the key factor in the system design.In the application scenario of Power Conversion, the design of the dead band of IGBT is the main means of guaranteed output device security of operation, and too small dead band will cause upper and lower bridge arm straight-through, cause device overcurrent even system crash; Excessive dead band will increase the harmonic wave output of system, and load and electrical network are polluted.And the important evidence of dead band design is that converter system is opened, the time-delay of turn-off time, comprises the time-delay of IGBT self and the time-delay of driving.
Simultaneously; the reverse recovery characteristic of diode plays a part very important in the commutation course of current transformer; if can not return to blocking state apace; will be when next brachium pontis is opened the dc bus short circuit; cause components from being damaged; grasp the peak value of reverse recovery current, help the design of system protection strategy.
Summary of the invention
The purpose of this utility model is to provide a kind of test circuit of two level current transformer switch performances based on dipulse, can make things convenient for, accurately measure that two level current transformer systems open, turn off delay time.
The technical scheme that realizes above-mentioned purpose is:
A kind of test circuit of two level current transformer switch performances based on dipulse, described two level current transformers comprise single-phase two level brachium pontis, these single-phase two level brachium pontis comprise the band inverse parallel diode of series connection an IGBT and the 2nd IGBT, be used to the 2nd IGBT driving circuit that drives the IGBT driving circuit of a described IGBT and be used to drive described the 2nd IGBT;
Described test circuit comprises that a described IGBT, described the 2nd IGBT, a described IGBT driving circuit, described the 2nd IGBT driving circuit, pulse producer, direct current support electric capacity, stack bus bar, direct supply and afterflow reactor, wherein:
Described pulse producer connects a described IGBT driving circuit and the 2nd IGBT driving circuit respectively;
A described IGBT driving circuit connects the gate pole of a described IGBT;
Described the 2nd IGBT driving circuit connects the gate pole of described the 2nd IGBT;
The emitter of a described IGBT connects the collector of described the 2nd IGBT;
One end of described afterflow reactor connects the collector of described the 2nd IGBT, and the other end connects the emitter of described the 2nd IGBT;
The anode of described stack bus bar connects the collector of a described IGBT, described direct current supports the positive pole of electric capacity and the positive pole of described direct supply; The negative terminal of described stack bus bar connects the emitter of described the 2nd IGBT, described direct current supports the negative pole of electric capacity and the negative pole of described direct supply.
The beneficial effects of the utility model are: the form that the utility model triggers by test I GBT dipulse; measure accurately that IGBT in the two level current transformer systems drives, IGBT turn on and off time-delay; and the recovery characteristics of test inverse parallel diode, play important effect for the dead band of two level current transformers and the design of protection strategy.The utility model is loose to requirement for experiment condition, is convenient to practical operation, test result precision height.
Description of drawings
Fig. 1 is the circuit diagram of the utility model based on the test circuit of two level current transformer switch performances of dipulse;
Fig. 2 is experimental waveform figure of the present utility model;
Fig. 3 is the experimental waveform figure of second pulse opening process of the present utility model;
Fig. 4 is the experimental waveform figure of second pulse-off process of the present utility model.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing.
Two level current transformers comprise single-phase two level brachium pontis, these single-phase two level brachium pontis comprise the IGBT and the driving thereof of two series connection, promptly an IGBT S1, the 2nd IGBT S2, be used to the 2nd IGBT driving circuit 200 that drives the IGBT driving circuit 100 of an IGBT S1 and be used to drive the 2nd IGBT S2; Wherein, an IGBT S1 and the 2nd IGBT S2 all are with the inverse parallel diode.
See also Fig. 1, the test circuit of two level current transformer switch performances based on dipulse of the present utility model, comprise that an IGBT S1, the 2nd IGBT S2, an IGBT driving circuit 100, the 2nd IGBT driving circuit 200, pulse producer 300, direct current support capacitor C, stack bus bar (not shown), direct supply DCs and afterflow reactor L, wherein:
The one IGBT driving circuit 100 connects the gate pole of an IGBT S1; The 2nd IGBT driving circuit 200 connects the gate pole of the 2nd IGBT S2; In the present embodiment, first, second IGBT driving circuit 100,200 all select for use Concept company model be 1SD210F2 drive plate;
Pulse producer 300 connects an IGBT driving circuit 100 and the 2nd IGBT driving circuit 200 respectively by optical fiber, be defeated by an IGBT driving circuit 100 and the 2nd IGBT driving circuit 200 respectively by electric signal being converted into light signal, the one IGBT driving circuit 100 and the 2nd IGBT driving circuit 200 are converted into electric signal with the light signal that receives, thereby control an IGBT S1 and the 2nd IGBT S2 respectively; Pulse producer 300 outputting drive voltage Vpulse; In the present embodiment, pulse producer 300 can select for use existing product to realize, for example: selecting model is the pulse signal generator of NF1535; The control panel that also can be WPDC BD V5.0 by the model of independent development is realized;
The emitter of the one IGBT S1 connects the collector of the 2nd IGBT S2;
The end of afterflow reactor L connects the collector of the 2nd IGBT S2, and the other end connects the emitter of the 2nd IGBT S2;
Collector, direct current that the anode DC+ of stack bus bar connects an IGBT S1 support the positive pole of capacitor C and the positive pole of direct supply DCs; Emitter, direct current that the negative terminal DC-of stack bus bar connects the 2nd IGBT S2 support the negative pole of capacitor C and the negative pole of direct supply DCs.
Among Fig. 1, L σ 1, L σ 2 are the equivalent stray inductance of stack bus bar; AC represents to exchange output.
The principle of work of test circuit of the present utility model is as follows:
Direct supply DCs applies anode DC+ and the negative terminal DC-of rated voltage in stack bus bar; Pulse producer 300 keeps turn-offing by the 2nd IGBT driving circuit 200 controls the 2nd IGBT S2, and apply dipulse by 100 couples the one IGBT S1 of an IGBT driving circuit, that is: make that the IGBT S1 that wins opens constantly at t0, t1 turn-offs constantly, t2 opens constantly again, t3 turn-offs constantly again.
See also Fig. 2, be the experimental waveform figure of utility model, Vpul se is a driving voltage among the figure, and Vge is the gate voltage between the 2nd IGBT S2 gate pole and the emitter, Vce is the voltage between an IGBT S1 collector and the emitter, and Ic is the electric current that flows through an IGBT S1 collector;
In order to test the performance parameter of an IGBT S1 under different voltages, the current class, need turning on and off the time of two pulses of strict control, need the mutual coordination of direct supply DCs and afterflow reactor L; In first opened interval t0 to t1, electric current I c is linear to rise, and purpose herein is to guarantee to open moment t2 at second to flow through the electric current of an IGBT S1 enough greatly to test value Ict1(first rated current).Required service time can be drawn by the dynamic perfromance of inductance:
t1-t0=Ict1×L/Vce;
In t1 to t2 IGBT S1 shutoff in the time, Ict1 afterflow to the IGBT S1 in the loop that the inverse parallel diode of afterflow reactor L and the 2nd IGBT S2 is formed opens t2 constantly once more; Turn-off performance to IGBT has higher requirement generally speaking, promptly can turn-off bigger electric current; Therefore can utilize the service time of t2 to t3, with the Current Regulation of the IGBT S1 that flows through to higher value Ict2(second rated current), required service time is:
t3-t2=Ict2×L/Vce-(t1-t0);
See also Fig. 3, Fig. 3 is the waveform amplification in 1 zone among Fig. 2, i.e. the experimental waveform figure of second pulse opening process.After the one IGBT S1 opens once more, the IGBT S1 that flows through of the electric current among the afterflow reactor L, bear back-pressure with the antiparallel diode of the 2nd IGBT S2 this moment, the experience reversely restoring process.The interval of Vpulse and Vge rising edge of a pulse relatively, what can obtain an IGBT driving circuit 100 opens time-delay Tdon1; Vce drops to 0 when an IGBT S1 opens fully, relatively is somebody's turn to do constantly and the rising edge of Vge, can draw the Tdon2 that delays time that opens of an IGBT S1 self; Can obtain the Tdon=Tdon1+Tdon2 that delays time that opens of whole two level current transformer systems thus; The time span of Ic spike is Trr reverse recovery time of the 2nd IGBT S2 inverse parallel diode, and the waveform peak current Irr-peak that can oppositely be recovered thus.
See also Fig. 4, Fig. 4 is the waveform amplification in 2 zones among Fig. 2, i.e. the experimental waveform figure of second pulse-off process.The interval of Vpulse and Vge pulse negative edge relatively can obtain the turn off delay time Tdoff1 of an IGBT driving circuit 100; Vce rises to DC bus-bar voltage DCs when an IGBT S1 turn-offs fully, relatively is somebody's turn to do constantly and the negative edge of Vge, can draw the turn off delay time Tdoff2 of an IGBT S1 self; Can obtain the turn off delay time Tdoff=Tdoff1+Tdoff2 of whole two level current transformer systems thus.
Therefore; the form that the utility model triggers by test I GBT dipulse; accurately test I GBT drive, IGBT turn on and off time-delay, and the recovery characteristics of test inverse parallel diode plays important effect for the dead band of two level current transformers and the design of protection strategy.
Claims (1)
1. test circuit based on two level current transformer switch performances of dipulse, described two level current transformers comprise single-phase two level brachium pontis, these single-phase two level brachium pontis comprise the band inverse parallel diode of series connection an IGBT and the 2nd IGBT, be used to the 2nd IGBT driving circuit that drives the IGBT driving circuit of a described IGBT and be used to drive described the 2nd IGBT;
It is characterized in that, described test circuit comprises that a described IGBT, described the 2nd IGBT, a described IGBT driving circuit, described the 2nd IGBT driving circuit, pulse producer, direct current support electric capacity, stack bus bar, direct supply and afterflow reactor, wherein:
Described pulse producer connects a described IGBT driving circuit and the 2nd IGBT driving circuit respectively;
A described IGBT driving circuit connects the gate pole of a described IGBT;
Described the 2nd IGBT driving circuit connects the gate pole of described the 2nd IGBT;
The emitter of a described IGBT connects the collector of described the 2nd IGBT;
One end of described afterflow reactor connects the collector of described the 2nd IGBT, and the other end connects the emitter of described the 2nd IGBT;
The anode of described stack bus bar connects the collector of a described IGBT, described direct current supports the positive pole of electric capacity and the positive pole of described direct supply; The negative terminal of described stack bus bar connects the emitter of described the 2nd IGBT, described direct current supports the negative pole of electric capacity and the negative pole of described direct supply.
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CN103105554A (en) * | 2013-01-29 | 2013-05-15 | 上海电气集团股份有限公司 | Test circuit and method of two-electrical-level converter switching performance based on double pulses |
CN103592591A (en) * | 2013-11-20 | 2014-02-19 | 西安永电电气有限责任公司 | IGBT module testing circuit and method on condition of no antiparallel diode |
CN103837823A (en) * | 2014-03-17 | 2014-06-04 | 上海华虹宏力半导体制造有限公司 | Product testing circuit |
CN104965136A (en) * | 2015-06-18 | 2015-10-07 | 国电南瑞科技股份有限公司 | Three-level converter power unit double pulse test method |
CN105044581A (en) * | 2015-03-30 | 2015-11-11 | 国家电网公司 | Test method and test circuit for dynamic voltage-balancing characteristic and reverse recovery characteristic of SiC IGBT (Insulated Gate Bipolar Transistor) serial connection valve block |
CN105116184A (en) * | 2015-09-18 | 2015-12-02 | 江苏中科君芯科技有限公司 | IGBT (Insulated Gate Bipolar Transistor) dynamic test latch protection circuit |
CN111736054A (en) * | 2020-06-23 | 2020-10-02 | 中国南方电网有限责任公司超高压输电公司 | Test circuit for IGBT drive desaturation protection function and simulation test method thereof |
WO2023173484A1 (en) * | 2022-03-18 | 2023-09-21 | 山东阅芯电子科技有限公司 | Circuit for improving dynamic test efficiency of power semiconductor device |
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2013
- 2013-01-29 CN CN 201320047535 patent/CN203101550U/en not_active Expired - Lifetime
Cited By (11)
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CN103105554A (en) * | 2013-01-29 | 2013-05-15 | 上海电气集团股份有限公司 | Test circuit and method of two-electrical-level converter switching performance based on double pulses |
CN103592591A (en) * | 2013-11-20 | 2014-02-19 | 西安永电电气有限责任公司 | IGBT module testing circuit and method on condition of no antiparallel diode |
CN103837823A (en) * | 2014-03-17 | 2014-06-04 | 上海华虹宏力半导体制造有限公司 | Product testing circuit |
CN105044581A (en) * | 2015-03-30 | 2015-11-11 | 国家电网公司 | Test method and test circuit for dynamic voltage-balancing characteristic and reverse recovery characteristic of SiC IGBT (Insulated Gate Bipolar Transistor) serial connection valve block |
CN105044581B (en) * | 2015-03-30 | 2018-02-13 | 国家电网公司 | The method of testing and test circuit of a kind of SiC IGBT series connection valve group dynamic voltage balancing characteristics and reverse recovery characteristic |
CN104965136A (en) * | 2015-06-18 | 2015-10-07 | 国电南瑞科技股份有限公司 | Three-level converter power unit double pulse test method |
CN105116184A (en) * | 2015-09-18 | 2015-12-02 | 江苏中科君芯科技有限公司 | IGBT (Insulated Gate Bipolar Transistor) dynamic test latch protection circuit |
CN105116184B (en) * | 2015-09-18 | 2017-10-13 | 江苏中科君芯科技有限公司 | IGBT dynamic test latch protection circuit |
CN111736054A (en) * | 2020-06-23 | 2020-10-02 | 中国南方电网有限责任公司超高压输电公司 | Test circuit for IGBT drive desaturation protection function and simulation test method thereof |
CN111736054B (en) * | 2020-06-23 | 2022-09-16 | 中国南方电网有限责任公司超高压输电公司 | Test circuit for IGBT drive desaturation protection function and simulation test method thereof |
WO2023173484A1 (en) * | 2022-03-18 | 2023-09-21 | 山东阅芯电子科技有限公司 | Circuit for improving dynamic test efficiency of power semiconductor device |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
EE01 | Entry into force of recordation of patent licensing contract |
Assignee: SHANGHAI ELECTRIC POWER ELECTRONICS CO.,LTD. Assignor: Shanghai Electric Group Co.,Ltd. Contract record no.: 2014310000107 Denomination of utility model: Test circuit and method of two-electrical-level converter switching performance based on double pulses Granted publication date: 20130731 License type: Exclusive License Record date: 20140618 |
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LICC | Enforcement, change and cancellation of record of contracts on the licence for exploitation of a patent or utility model | ||
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20130731 |