CN203039647U - Linear amplification circuit for micro signals - Google Patents
Linear amplification circuit for micro signals Download PDFInfo
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- CN203039647U CN203039647U CN 201320000647 CN201320000647U CN203039647U CN 203039647 U CN203039647 U CN 203039647U CN 201320000647 CN201320000647 CN 201320000647 CN 201320000647 U CN201320000647 U CN 201320000647U CN 203039647 U CN203039647 U CN 203039647U
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Abstract
The utility model relates to a linear amplification circuit for micro signals. The linear amplification circuit comprises an addition amplification circuit, an amplification circuit body and a subtraction circuit. The addition amplification circuit is composed of a first operational amplifier which is connected with a micro signal Ui required to be amplified and a reference voltage Uref signal respectively; the micro signal Ui and the reference voltage Uref signal are connected to the first operational amplifier; a second operational amplifier is connected with the reference voltage Uref signal; and amplification signals are input into the subtraction circuit and output after subtraction. According to the linear amplification circuit, when the input signal voltage changes from 1.5 mV to 100 mV in the actual application measurement, the output voltage and the input voltage are amplified according to a set proportion; and the signal distortion factor is small, the effect is good, and the circuit can be applied according to theoretically calculated results.
Description
Technical field
This patent relates to a kind of micro-signal Linear magnifying technology in high, particularly a kind of micro-signal linear amplifier circuit.
Background technology
In the real work, need amplify micro-signal.With reference to the circuit of " application of integrated operational amplifier " lining in " electronic circuit basis " (165 pages) of works such as Sun Xiaozi, Xian Electronics Science and Technology University's publication in 2000, design in-phase amplification circuit, physical circuit is seen accompanying drawing 1.
According to the characteristic of desirable operational amplifier " empty short ", " empty disconnected ", we as can be known
U
0=(1+ the 4th resistance/the 3rd resistance) * U
1(1)
In the above-mentioned formula (1), U
0Be the signal voltage after amplifying, U
1Be needs amplifying signal voltage.The value of the 3rd resistance, the 4th resistance can multiplication factor as required be selected.
In actual applications, selecting the 4th resistance is 60k Ω, and the 3rd resistance is 1k Ω, works as U
1During 0.1V, the relation of output voltage and input voltage satisfies the relation of above-mentioned (1) substantially, namely output voltage is 61 times of input voltage.Work as U
1＜0.1V or more hour, the relation of output voltage and input voltage just can not satisfy the relation of above-mentioned formula, along with diminishing of input signal, when input signal was the mV level, output voltage had only several times of input voltage.So, our result that just can not calculate (deviation can be arranged slightly) according to theory goes to use.。
Summary of the invention
This patent technical problem to be solved provides the micro-signal linear amplifier circuit, utilizes operational amplifier commonly used, designs the linear amplification method of a kind of micro-signal and circuit and application; Thereby can amplify micro-signal, signal distortion is little, and is effective, can go to use according to theoretical result calculated.
For the purpose that realizes solving the problems of the technologies described above, this patent has adopted following technical scheme:
A kind of micro-signal linear amplifier circuit of this patent comprises addition amplifying circuit, amplifying circuit and subtraction amplification circuit;
The addition amplifying circuit is made up of first operational amplifier, the 4th resistance, the 7th resistance, the 8th resistance, the 9th resistance; After first operational amplifier adds a reference voltage for the micro-signal that needs amplification, carry out certain multiple and amplify; First operational amplifier connects micro-signal and the reference voltage signal that needs amplify respectively, micro-signal and reference voltage signal are connected to the positive input of first operational amplifier respectively by the 8th resistance, the 9th resistance, the negative input connects power supply ground by the 7th resistance; Connect the 4th resistance between the output of first operational amplifier and the negative input; The output amplifying signal of first operational amplifier is input to subtraction amplification circuit;
Amplifying circuit is made up of second operational amplifier, the 5th resistance, the tenth resistance, the 11 resistance, the 12 resistance, and the reference voltage identical with first operational amplifier carried out the amplification of identical multiple; Second operational amplifier connects reference voltage signal, and reference voltage signal is connected to second operational amplifier by the 11 resistance, the output amplifying signal input subtraction amplification circuit of second operational amplifier; The positive and negative input mutually of second operational amplifier connects power supply ground by the 12 resistance, the tenth resistance respectively; Connect the 5th resistance between the output of second operational amplifier and the negative input;
Subtraction amplification circuit comprises the 3rd amplifier calculation amplifier, the 6th resistance, the 13 resistance, the 14 resistance, the 15 resistance composition; The output amplifying signal of first operational amplifier, second operational amplifier by the 13 resistance, the 14 resistance input subtraction amplification circuit, is exported through behind the subtraction respectively; Connect the 6th resistance between the output of second operational amplifier and the negative input; The 15 resistance two ends are connected respectively to anode and the power supply ground that the 3rd amplifier is calculated amplifier.
Further concrete, the micro-signal linear amplifier circuit of this patent, first operational amplifier is identical with the second operational amplifier multiplication factor.
Described the 3rd operational amplifier is to have the operational amplifier that the signal behind the subtraction is carried out enlarging function.
The micro-signal that this patent is described mainly comprises the sampled voltage signal between 1mV～100mV.
Further concrete, the micro-signal linear amplifier circuit of this patent, the 4th resistance, the 5th resistance are identical; The 7th resistance, the tenth resistance are identical; The 8th resistance, the 9th resistance, the 12 resistance, the 11 resistance are identical; The 13 resistance, the 14 resistance are identical.
The linear amplification method of a kind of above-mentioned micro-signal is in the application in the micro-signal amplifying technique.The linear amplification method of a kind of micro-signal of this patent, the signal that sampling is obtained carries out addition process and increases a reference signal earlier, obtain amplifying sampled signal, carry out the linearity amplification of certain multiple to amplifying sampled signal then, voltage after the linearity amplification is deducted the part that the identical multiple of reference signal amplifies again, just can obtain the linear result amplified of micro-signal.
The linear amplification method of a kind of micro-signal of this patent comprises and uses an addition amplifying circuit, an amplifying circuit and a subtraction amplification circuit to calculate;
Described addition amplifying circuit is made up of first operational amplifier, the 4th resistance, the 7th resistance, the 8th resistance, the 9th resistance; After first operational amplifier adds a reference voltage for the micro-signal that needs amplification, carry out certain multiple and amplify; First operational amplifier connects micro-signal and the reference voltage signal that needs amplify respectively, micro-signal and reference voltage signal are connected to the positive input of first operational amplifier respectively by the 8th resistance, the 9th resistance, the negative input connects power supply ground by the 7th resistance; Connect the 4th resistance between the output of first operational amplifier and the negative input; The output amplifying signal of first operational amplifier is input to subtraction circuit;
Described amplifying circuit is made up of second operational amplifier, the 5th resistance, the tenth resistance, the 11 resistance, the 12 resistance, and the reference voltage identical with first operational amplifier carried out the amplification of identical multiple; Second operational amplifier connects reference voltage signal, and reference voltage signal is connected to second operational amplifier by the 11 resistance, the output amplifying signal input subtraction amplification circuit of second operational amplifier; The positive and negative input mutually of second operational amplifier connects power supply ground by the 12 resistance, the tenth resistance respectively; Connect the 5th resistance between the output of second operational amplifier and the negative input;
Described subtraction amplification circuit comprises the 3rd amplifier calculation amplifier, the 6th resistance, the 13 resistance, the 14 resistance, the 15 resistance composition; The output amplifying signal of first operational amplifier, second operational amplifier by the 13 resistance, the 14 resistance input subtraction amplification circuit, is exported through behind the subtraction respectively; Connect the 6th resistance between the output of second operational amplifier and the negative input; The 15 resistance two ends are connected respectively to anode and the power supply ground that the 3rd amplifier is calculated amplifier;
The output signal of first operational amplifier and first operational amplifier all is input to subtraction circuit, obtain a signal that the output of the output of first operational amplifier and second operational amplifier is subtracted each other, the microsignal amplifying signal that will finish exactly by subtraction electricity circuit.
More specifically, first operational amplifier is identical with the second operational amplifier multiplication factor.Described the 3rd operational amplifier can be for having the operational amplifier that the signal behind the subtraction is carried out enlarging function.The place that the design's circuit emphasis is noted is: when micro-signal is 0V, guarantee that first operational amplifier is identical with the output voltage of second operational amplifier, the multiplication factor that also can be described as first operational amplifier and second operational amplifier must be consistent.
A kind of micro-signal linear amplifier circuit of this patent is practical.Adopt simple circuit design, can realize microsignal linear the amplification.It is mainly used in some controlling of sampling circuit, can carry out linearity to micro-signal by the design and amplify, thereby can better realize functions such as some feedbacks, control.
By adopting technique scheme, this patent has following beneficial effect:
During a kind of micro-signal linear amplifier circuit, practical application were measured, applied signal voltage was when changing between 1.5mV～100mV, and output voltage and input voltage amplify according to the proportionate relationship of setting basically.Signal distortion is little, and is effective, can go to use according to theoretical result calculated.And in the prior art, if directly use amplifying circuit, when sampled signal changed continuously, multiplication factor did not wait variation from several times to tens of times, cannot use at all.
Description of drawings
Fig. 1 is the typical amplifying circuit of prior art.
Among the figure, N1 is operational amplifier, and R2, R3, R4 are resistance, U
0Be output signal, U
iBe input signal.
Fig. 2 is the micro-signal linear amplifier circuit of this patent.
Among the figure, 1 is first operational amplifier, 2 is second operational amplifier, 3 is the 3rd operational amplifier, 4,5,6,7,8,9,10,11,12,13,14,15 be respectively the the the the the 4th, the 5th, the 6th, the 7th, the 8th, the 9th, the tenth, the 11, the 12, the 13, the 14, the 15 resistance, U
0Be output signal, U
iBe input signal, U
RefBe reference voltage.
Embodiment
Embodiment 1
A kind of micro-signal linear amplifier circuit as shown in Figure 2, first operational amplifier 1 is finished sampling micro-signal U
iWith reference voltage U
RefCarry out the amplification after the addition; Second operational amplifier 2 is finished reference voltage U
RefAmplification, multiplication factor is the same with first operational amplifier; The 3rd operational amplifier 3 is finished two subtractions between the signal after the amplification.If after the add operation signal a little less than, the 3rd operational amplifier also can be set finish amplification to the signal behind the subtraction simultaneously.Finally obtain the output voltage proportional with input signal.
First operational amplifier is identical with the second operational amplifier multiplication factor.
The 4th resistance, the 5th resistance of micro-signal linear amplifier circuit are identical; The 7th resistance, the tenth resistance are identical; The 8th resistance, the 9th resistance, the 12 resistance, the 11 resistance are identical; The 13, the 14 resistance is identical.
This patent is worked as input signal
During level, output voltage can amplify by the multiplication factor of wanting.So, just can go to use according to theoretical result calculated.General deviation result is in 10%.
A reference voltage at first is set
, the micro-signal U that then sampling is obtained
iAnd U
RefCarry out add operation, obtain a relatively large signal
Right
Obtain voltage after amplifying
At this moment,
Can guarantee the linearity of multiplication factor.To reference voltage
Also amplify processing, multiplication factor and
Multiplication factor the same, the voltage signal that obtains
Carry out subtraction then, according to
Finally, the linearity that can guarantee input signal and output signal is amplified relation.
The multiplication factor of this circuit can be finished in first, second two operational amplifiers amplifications, also can amplify again at the 3rd operational amplifier.
The multiplication factor that first operational amplifier, second operational amplifier are set is 20 times, the 3rd operational amplifier is set finishes simultaneously 3 times of the amplifications of the signal behind the subtraction.
The voltage signal of a 1.5mV～45mV of input,
, being 21 times through the multiplication factor of first operational amplifier 1, second operational amplifier 2, the micro-signal linear amplifier circuit that the 3rd operational amplifier is finished simultaneously to 3 times of the amplifications of the signal behind the subtraction amplifies processing, and the gained data see the following form 1.By data as can be seen, the multiplication factor substantially linear of whole signal spacing.
Table 1
| Input voltage (mV) | 1.5 | 7.5 | 15 | 22.5 | 30 | 37.5 | 45 |
| Output voltage (mV) | 91 | 476 | 960 | 1440 | 1890 | 2365 | 2850 |
| Multiplication factor | 60.7 | 63.5 | 64 | 64 | 63 | 63.1 | 63.3 |
Claims (4)
1. a micro-signal linear amplifier circuit is characterized in that: comprise addition amplifying circuit, amplifying circuit and subtraction amplification circuit;
The addition amplifying circuit is made up of first operational amplifier (1), the 4th resistance (4), the 7th resistance (7), the 8th resistance (8), the 9th resistance (9); After first operational amplifier (1) adds a reference voltage (Uref) for the micro-signal (Ui) that needs amplification, carry out certain multiple and amplify; First operational amplifier (1) connects micro-signal (Ui) and reference voltage (Uref) signal that needs amplification respectively, micro-signal (Ui) and reference voltage (Uref) signal are connected to the positive input of first operational amplifier (1) respectively by the 8th resistance (8), the 9th resistance (9), the negative input connects power supply ground by the 7th resistance (7); Connect the 4th resistance (4) between the output of first operational amplifier (1) and the negative input; The output amplifying signal of first operational amplifier (1) is input to subtraction amplification circuit;
Described amplifying circuit is made up of second operational amplifier (2), the 5th resistance (5), the tenth resistance (10), the 11 resistance (11), the 12 resistance (12), and the reference voltage (Uref) identical with first operational amplifier (1) carried out the amplification of identical multiple; Second operational amplifier (2) connects reference voltage (Uref) signal, reference voltage (Uref) signal is connected to second operational amplifier (2) by the 11 resistance (11), the output amplifying signal input subtraction amplification circuit of second operational amplifier (2); The positive and negative input mutually of second operational amplifier (2) connects power supply ground by the 12 resistance (12), the tenth resistance (10) respectively; Connect the 5th resistance (5) between the output of second operational amplifier (2) and the negative input;
Subtraction amplification circuit comprises the 3rd operational amplifier (3), the 6th resistance (6), the 13 resistance (13) (13), the 14 resistance (14), the 15 resistance composition; The output amplifying signal of first operational amplifier (1), second operational amplifier (2) by the 13 resistance (13), the 14 resistance (14) input subtraction amplification circuit, is exported through behind the subtraction respectively; Connect the 6th resistance (6) between the output of second operational amplifier (2) and the negative input; The 15 resistance (15) two ends are connected respectively to anode and the power supply ground of the 3rd operational amplifier (3); Described first operational amplifier (1) is identical with second operational amplifier (2) multiplication factor.
2. according to the described micro-signal linear amplifier circuit of claim 1, it is characterized in that: described the 3rd operational amplifier (3) is for having the operational amplifier that the signal behind the subtraction is carried out enlarging function.
3. according to the described micro-signal linear amplifier circuit of claim 1, it is characterized in that: described micro-signal (Ui) is the signal between 1mV～100mV.
4. according to the described micro-signal linear amplifier circuit of claim 1, it is characterized in that: the 4th resistance (4), the 5th resistance (4) are identical; The 7th resistance (7), the tenth resistance (10) are identical; The 8th resistance (8), the 9th resistance (9), the 12 resistance (12), the 11 resistance (11) are identical; The 13 resistance (13) (12), the 14 resistance (14) are identical.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320000647 CN203039647U (en) | 2013-01-04 | 2013-01-04 | Linear amplification circuit for micro signals |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320000647 CN203039647U (en) | 2013-01-04 | 2013-01-04 | Linear amplification circuit for micro signals |
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|---|---|---|---|
| CN 201320000647 Expired - Fee Related CN203039647U (en) | 2013-01-04 | 2013-01-04 | Linear amplification circuit for micro signals |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103762949A (en) * | 2014-02-14 | 2014-04-30 | 太原理工大学 | Level switching circuit for small-signal change detection |
| CN106411278A (en) * | 2016-09-19 | 2017-02-15 | 上海大学 | Full symmetric common-mode and differential-mode signal separator and multi-input addition and subtraction operator thereof |
| CN110335395A (en) * | 2019-07-08 | 2019-10-15 | 刘中原 | A kind of intelligent interlocking system and method |
| CN115390612A (en) * | 2022-09-20 | 2022-11-25 | 洛阳隆盛科技有限责任公司 | Far-end voltage regulating circuit of DC-DC converter |
| CN116470856A (en) * | 2023-04-28 | 2023-07-21 | 应急管理部国家自然灾害防治研究院 | Demodulation weak signal amplifying circuit of optical fiber sensor |
-
2013
- 2013-01-04 CN CN 201320000647 patent/CN203039647U/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103762949A (en) * | 2014-02-14 | 2014-04-30 | 太原理工大学 | Level switching circuit for small-signal change detection |
| CN103762949B (en) * | 2014-02-14 | 2016-09-07 | 太原理工大学 | A kind of level shifting circuit for small signal variation detection |
| CN106411278A (en) * | 2016-09-19 | 2017-02-15 | 上海大学 | Full symmetric common-mode and differential-mode signal separator and multi-input addition and subtraction operator thereof |
| CN106411278B (en) * | 2016-09-19 | 2019-02-22 | 上海大学 | Holohedral symmetry common mode difference mode signal separator and its multi input addition and subtraction arithmetic unit |
| CN110335395A (en) * | 2019-07-08 | 2019-10-15 | 刘中原 | A kind of intelligent interlocking system and method |
| CN115390612A (en) * | 2022-09-20 | 2022-11-25 | 洛阳隆盛科技有限责任公司 | Far-end voltage regulating circuit of DC-DC converter |
| CN116470856A (en) * | 2023-04-28 | 2023-07-21 | 应急管理部国家自然灾害防治研究院 | Demodulation weak signal amplifying circuit of optical fiber sensor |
| CN116470856B (en) * | 2023-04-28 | 2023-10-24 | 应急管理部国家自然灾害防治研究院 | Demodulation weak signal amplifying circuit of optical fiber sensor |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130703 Termination date: 20190104 |
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| CF01 | Termination of patent right due to non-payment of annual fee |