CN202931417U - Wireless communication telephone microphone - Google Patents
Wireless communication telephone microphone Download PDFInfo
- Publication number
- CN202931417U CN202931417U CN 201220523015 CN201220523015U CN202931417U CN 202931417 U CN202931417 U CN 202931417U CN 201220523015 CN201220523015 CN 201220523015 CN 201220523015 U CN201220523015 U CN 201220523015U CN 202931417 U CN202931417 U CN 202931417U
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- China
- Prior art keywords
- capacitor
- nand gate
- gate circuit
- resistor
- circuit
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- Expired - Fee Related
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Abstract
The utility model discloses a wireless communication telephone microphone, which comprises a dc source, a first NAND gate circuit, a second NAND gate circuit, a third NAND gate circuit, a fourth NAND gate circuit, a time-base integrated circuit, an antenna, the microphone, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first resistor, a second resistor and a third resistor. The NAND gate circuit is employed for being taken as a main component of the circuit, and has the advantages of simple circuit structure, stable performance, and no noise and soundless generation.
Description
Technical field
The utility model relates to a kind of communication telephones microphone, relates in particular to a kind of wireless telephony communication microphone.
Background technology
At present, mobile phone, phone have become indispensable instrument in people communicate by letter life, especially radio telephone and intercom use more, unstable due to the microphone of telephone set due to circuit voltage, the defective of performance, cause when making a phone call from noise or the phenomenon such as noiseless, make troubles to people's life of communicating by letter.
Summary of the invention
The purpose of this utility model provides a kind of wireless telephony communication microphone with regard to being in order to address the above problem.
The utility model is achieved through the following technical solutions above-mentioned purpose:
the utility model comprises DC power supply, the first NAND gate circuit, the second NAND gate circuit, the 3rd NAND gate circuit, the 4th NAND gate circuit, time-base integrated circuit, antenna, microphone, the first capacitor, the second capacitor, the 3rd capacitor, the 4th capacitor, the 5th capacitor, the first resistor, the second resistor and the 3rd resistor, the cathode output end of described DC power supply respectively with the electrode input end of described time-base integrated circuit, the first end of described the second capacitor be connected the first end of the 4th resistor and connect, the low triggering end of described time-base integrated circuit respectively with the control end of described the second NAND gate circuit, the first end of described the first capacitor, the second end of described the second capacitor, the control end of described the first NAND gate circuit be connected the cathode output end of DC power supply and connect, the low triggering end of described time-base integrated circuit respectively with the first end of described the first resistor, the second end of described the first capacitor, the control end of described the 3rd NAND gate circuit connects, the second end of described the first resistor and the control end of described time-base integrated circuit be connected the first end of the second resistor and be connected, the second end of described the second resistor is connected with the first end of described the 3rd capacitor, the second end of described the 3rd capacitor is connected with the cathode output end of described DC power supply, the forced resetting end of described time-base integrated circuit respectively with the first end of described the 4th capacitor be connected the first end of the 5th capacitor and be connected, the second end of described the 5th capacitor respectively with the cathode output end of described DC power supply be connected the first end of microphone and be connected, the second end of described microphone respectively with the second end of described the 4th capacitor be connected the second end of the 4th resistor and be connected, the first end of described the first NAND gate circuit is connected with the first end of described the second NAND gate circuit, the second end of described the second NAND gate circuit is connected with the first end of described the 3rd NAND gate circuit, the second end of described the 3rd NAND gate circuit respectively with the second end of described the first NAND gate circuit be connected the first end of the 4th NAND gate circuit and be connected, the second end of described the 4th NAND gate circuit is connected with described antenna.
The beneficial effects of the utility model are:
The utility model is by adopting NAND gate circuit to be used as the main components of circuit, has advantages of that circuit structure is simple, stable performance and noise can not occur and the phenomenon such as noiseless.
Description of drawings
Fig. 1 is the circuit diagram of a kind of wireless telephony communication microphone described in the utility model.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing:
as shown in Figure 1: the utility model comprises DC power supply, the first NAND gate circuit D1, the second NAND gate circuit D2, the 3rd NAND gate circuit D3, the 4th NAND gate circuit D4, time-base integrated circuit IC, antenna, microphone MIC, the first capacitor C1, the second capacitor C2, the 3rd capacitor C3, the 4th capacitor C4, the 5th capacitor C5, the first resistor R1, the second resistor R2 and the 3rd resistor R3, the cathode output end of DC power supply respectively with the electrode input end of time-base integrated circuit IC, the first end of the first end of the second capacitor C2 and the 4th resistor R4 connects, the low triggering end of time-base integrated circuit IC respectively with the control end of the second NAND gate circuit D2, the first end of the first capacitor C1, the second end of the second capacitor C2, the control end of the first NAND gate circuit D1 is connected cathode output end and is connected with DC power supply, the low triggering end of time-base integrated circuit IC respectively with the first end of the first resistor R1, the second end of the first capacitor C1, the control end of the 3rd NAND gate circuit D3 connects, the second end of the first resistor R1 and the control end of time-base integrated circuit IC be connected the first end of resistor R2 and be connected, the second end of the second resistor R2 is connected with the first end of the 3rd capacitor C3, the second end of the 3rd capacitor C3 is connected with the cathode output end of DC power supply, the forced resetting end of time-base integrated circuit IC is connected with the first end of the 4th capacitor C4 and the first end of the 5th capacitor C5 respectively, the second end of the 5th capacitor C5 is connected first end with the cathode output end of DC power supply respectively and is connected with microphone MIC, the second end of microphone MIC is connected with the second end of the 4th capacitor C4 and the second end of the 4th resistor R4 respectively, the first end of the first NAND gate circuit D1 is connected with the first end of the second NAND gate circuit D2, the second end of the second NAND gate circuit D2 is connected with the first end of the 3rd NAND gate circuit D3, the second end of the 3rd NAND gate circuit D3 is connected with the second end of the first NAND gate circuit D1 and the first end of the 4th NAND gate circuit D4 respectively, the second end of the 4th NAND gate circuit D4 is connected with antenna.
Claims (1)
1. wireless telephony communication microphone, it is characterized in that: comprise DC power supply, the first NAND gate circuit, the second NAND gate circuit, the 3rd NAND gate circuit, the 4th NAND gate circuit, time-base integrated circuit, antenna, microphone, the first capacitor, the second capacitor, the 3rd capacitor, the 4th capacitor, the 5th capacitor, the first resistor, the second resistor and the 3rd resistor, the cathode output end of described DC power supply respectively with the electrode input end of described time-base integrated circuit, the first end of described the second capacitor be connected the first end of the 4th resistor and connect, the low triggering end of described time-base integrated circuit respectively with the control end of described the second NAND gate circuit, the first end of described the first capacitor, the second end of described the second capacitor, the control end of described the first NAND gate circuit be connected the cathode output end of DC power supply and connect, the low triggering end of described time-base integrated circuit respectively with the first end of described the first resistor, the second end of described the first capacitor, the control end of described the 3rd NAND gate circuit connects, the second end of described the first resistor and the control end of described time-base integrated circuit be connected the first end of the second resistor and be connected, the second end of described the second resistor is connected with the first end of described the 3rd capacitor, the second end of described the 3rd capacitor is connected with the cathode output end of described DC power supply, the forced resetting end of described time-base integrated circuit respectively with the first end of described the 4th capacitor be connected the first end of the 5th capacitor and be connected, the second end of described the 5th capacitor respectively with the cathode output end of described DC power supply be connected the first end of microphone and be connected, the second end of described microphone respectively with the second end of described the 4th capacitor be connected the second end of the 4th resistor and be connected, the first end of described the first NAND gate circuit is connected with the first end of described the second NAND gate circuit, the second end of described the second NAND gate circuit is connected with the first end of described the 3rd NAND gate circuit, the second end of described the 3rd NAND gate circuit respectively with the second end of described the first NAND gate circuit be connected the first end of the 4th NAND gate circuit and be connected, the second end of described the 4th NAND gate circuit is connected with described antenna.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220523015 CN202931417U (en) | 2012-10-14 | 2012-10-14 | Wireless communication telephone microphone |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220523015 CN202931417U (en) | 2012-10-14 | 2012-10-14 | Wireless communication telephone microphone |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202931417U true CN202931417U (en) | 2013-05-08 |
Family
ID=48221324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220523015 Expired - Fee Related CN202931417U (en) | 2012-10-14 | 2012-10-14 | Wireless communication telephone microphone |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202931417U (en) |
-
2012
- 2012-10-14 CN CN 201220523015 patent/CN202931417U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130508 Termination date: 20131014 |