CN202840923U - Control circuit and switch mode converter - Google Patents

Control circuit and switch mode converter Download PDF

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CN202840923U
CN202840923U CN 201220432910 CN201220432910U CN202840923U CN 202840923 U CN202840923 U CN 202840923U CN 201220432910 CN201220432910 CN 201220432910 CN 201220432910 U CN201220432910 U CN 201220432910U CN 202840923 U CN202840923 U CN 202840923U
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output
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timing
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欧阳茜
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Chengdu Monolithic Power Systems Co Ltd
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Chengdu Monolithic Power Systems Co Ltd
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Abstract

The utility model discloses a control circuit and switch mode converter, wherein the switch mode converter includes first switch tube, the switching on of the first switch tube of control circuit control and turn-off make the output voltage of switch mode converter equal to predetermined output reference voltage value, control circuit turns off first switch tube and maintains certain turn-off time at least when the output voltage of switch mode converter is greater than first threshold voltage to reduce output voltage's overshoot, wherein first threshold voltage is less than predetermined output reference voltage value.

Description

Control circuit and switched-mode converter
Technical field
The utility model relates generally to a kind of electronic circuit, relates in particular to a kind of control circuit for switched-mode converter.
Background technology
Most of electronic products such as notebook computer, desktop computer, PDA etc. need direct current (DC) power supply to provide power through overregulating, for example supply power voltage to each functional module.Along with the development of electronic technology, power supply needs faster load transient response speed usually.Yet the load transient response excessive velocities causes new problem easily, produces larger overshoot, namely output voltage Hui Zhen when the load positive transition such as output voltage.
As shown in Figure 1, take the DC decompression formula converter of constant on-time control as example, at T0 constantly, load current IO is with speed positive transition faster, thereby cause output voltage VO to reduce rapidly, inductive current IL rising, the side switch pipe is under the control of control circuit, periodically open-minded with constant on-time, until T1 moment output voltage VO increases to default output reference voltage value DVO.For the sake of simplicity, inductive current IL shown in Figure 1 has represented the average current that flows through inductance.Under the impact of output capacitor, output voltage VO lags behind inductive current IL in phase place.When output voltage VO increases to default output reference voltage value DVO, inductive current IL has been far longer than load current IO, the energy that is stored in the inductor is transferred to output voltage VO, thereby causes that output voltage VO far above default output reference voltage value DVO, produces larger overshoot.
Summary of the invention
In order to solve a previously described problem or a plurality of problem, the utility model proposes a kind of control circuit for switched-mode converter and control method, with the output voltage overshoot that reduces or avoid causing because of the load current saltus step.
A kind of control circuit for switched-mode converter according to the utility model one embodiment, wherein switched-mode converter comprises the first switching tube, the output reference voltage value that control circuit is controlled conducting and the shutoff of the first switching tube and made the output voltage of switched-mode converter equal to preset, described control circuit comprises: switch control unit produces pulse control signal according to output voltage and default output reference voltage value; The overshoot control unit produces the overshoot control signal according to output voltage and first threshold voltage; And logical block, produce conducting and the shutoff of switch controlling signal to control the first switching tube according to pulse control signal and overshoot control signal; Wherein switch controlling signal is controlled the first switching tube and is turn-offed when the overshoot control signal is in the first state, and switch controlling signal is controlled conducting and the shutoff of the first switching tube according to pulse control signal when the overshoot control signal is in the second state.
In one embodiment, described overshoot control unit comprises: the first comparing unit, have first input end, the second input and output, and wherein first input end is coupled to output voltage, and the second input is coupled to first threshold voltage; The rising judging unit has input and output, and wherein input receives output voltage, and output output propradation is judged signal, judges whether output voltage is in ascent stage; And first timing unit, have first input end, the second input and output, wherein first input end is coupled to the output of the first comparing unit and the output of rising judging unit, and the second input receives the turn-off time, output output overshoot control signal; Wherein the first timing unit begins timing and the overshoot control signal is the first state when output voltage increases to first threshold voltage, until the timing time of the first timing unit when equaling the turn-off time the first timing unit stop timing and the overshoot control signal is the second state.
In one embodiment, described overshoot control unit comprises: the first comparing unit, have first input end, the second input and output, and wherein first input end is coupled to output voltage, and the second input is coupled to first threshold voltage; The second comparing unit has first input end, the second input and output, and wherein first input end is coupled to output voltage, and the second input is coupled to Second Threshold voltage, and wherein Second Threshold voltage is less than first threshold voltage; The rising judging unit has input and output, and wherein input receives output voltage, and output output propradation is judged signal, judges whether output voltage is in ascent stage; The second timing unit, have the input of startup, stop input and output, wherein start input and be coupled to the output of the second comparing unit and the output of rising judging unit, stop input and be coupled to the output of the first comparing unit and the output of rising judging unit, output is exported the second timing time, wherein the second timing unit begins timing when output voltage increases to Second Threshold voltage, and the second timing unit stops timing when output voltage increases to first threshold voltage; Computing unit obtains the turn-off time according to the second timing time; And first timing unit, have first input end, the second input and output, wherein first input end is coupled to the output of the first comparing unit and the output of rising judging unit, and the second input receives the turn-off time, output output overshoot control signal; Wherein the first timing unit begins timing and the overshoot control signal is the first state when output voltage increases to first threshold voltage, until the timing time of the first timing unit when equaling the turn-off time the first timing unit stop timing and the overshoot control signal is the second state.
According to a kind of switched-mode converter of the utility model one embodiment, this switched-mode converter comprises above-mentioned control circuit and the first switching tube.
In one embodiment, described the first switching tube has first end, the second end and control end, and wherein first end receives input voltage, and control end is coupled to the output of control circuit.
In one embodiment, described switched-mode converter also comprises: the second switch pipe, have first end, the second end and control end, and wherein first end is coupled to the second end of the first switching tube, and the second end is coupled to ground, and control end is coupled to the output of control circuit; Inductor has first end and the second end, and wherein first end is coupled to the second end of the first switching tube and the first end of second switch pipe; And output capacitor, be electrically coupled with between second end and ground of inductor, wherein the second end of inductor provides described output voltage.
According to embodiment of the present utility model, increase to by the output voltage in switched-mode converter and to turn-off the first switching tube before the default output reference voltage value and keep certain turn-off time and realize reducing even eliminate the caused output voltage overshoot of load variations.
Description of drawings
In order better to understand the utility model, will be described in detail the utility model according to the following drawings:
Fig. 1 be DC decompression formula converter under the control of existing constant on-time when the load current positive transition inductive current and the oscillogram of output voltage;
Fig. 2 is the circuit block diagram according to the switched-mode converter 200 of the utility model one embodiment;
Fig. 3 is the circuit theory diagrams according to the buck converter 300 of the utility model one embodiment;
Fig. 4 be according to the utility model one embodiment according to the load current positive transition of buck converter 300 shown in Figure 3 the time oscillogram;
Fig. 5 is that description is according to the flow chart of the control procedure of the switched-mode converter of the utility model one embodiment;
Fig. 6 is the circuit theory diagrams according to the overshoot control circuit 600 that is used for buck converter 300 shown in Figure 3 of the utility model one embodiment;
Fig. 7 is the oscillogram during according to the load current positive transition under overshoot control circuit shown in Figure 6 600 controls of the utility model one embodiment;
Fig. 8 is that description is according to the flow chart of the control procedure of the switched-mode converter of another embodiment of the utility model.
Embodiment
The below will describe specific embodiment of the utility model in detail, should be noted that the embodiments described herein only is used for illustrating, and be not limited to the utility model.In the following description, in order to provide thorough understanding of the present utility model, a large amount of specific detail have been set forth.Yet, it is evident that for those of ordinary skills: needn't adopt these specific detail to carry out the utility model.In other examples, for fear of obscuring the utility model, do not specifically describe known circuit, material or method.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: special characteristic, structure or characteristic in conjunction with this embodiment or example description are comprised among at least one embodiment of the utility model.Therefore, phrase " in one embodiment ", " in an embodiment ", " example " or " example " that occurs in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can with any suitable combination and or sub-portfolio with specific feature, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that at this diagram that provides all be for illustrative purposes, and diagram is drawn in proportion not necessarily.Should be appreciated that when claiming " element " " to be connected to " or " coupling " during to another element it can be directly to connect or be couple to another element or can have intermediary element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, not having intermediary element.The identical identical element of Reference numeral indication.Term used herein " and/or " comprise any and all combinations of one or more relevant projects of listing.
Fig. 2 is the circuit block diagram according to the switched-mode converter 200 of the utility model one embodiment.Switched-mode converter 200 comprises power stage circuit 21 and control circuit 22.
Power stage circuit 21 comprises switch main circuit 211 and low pass filter 212, and wherein switch main circuit 211 comprises the first switching tube.In one embodiment, low pass filter 212 is comprised of inductor and capacitor.Switch main circuit 211 receives input voltage VIN, by conducting and the shutoff of the first switching tube, through low pass filter 212 output VD VO.Load RL be coupled in output voltage VO and systematically between.Power stage circuit 21 can be DC/DC conversion circuit or ac/dc translation circuit, can adopt the topological structure that is fit to arbitrarily such as buck converter, booster converter, half-bridge converter etc.
Control circuit 22 comprises switch control unit 221, overshoot control unit 222 and logical block 223.Control circuit 22 is controlled the first switching tube by output switch control signal CTRL conducting comes regulation output voltage VO, the output reference voltage value DVO that makes output voltage VO equal to preset with shutoff.Control circuit 22 can be integrated on the chip.In one embodiment, control circuit 22 is realized by analog integrated circuit.In other embodiments, control circuit 22 can be by digital circuits such as single-chip microcomputer (MCU), digital signal processor (DSP), field programmable gate array (FPGA) and application-specific integrated circuit (ASIC)s (ASIC).
Switch control unit 221 is according to output voltage VO and default output reference voltage value DVO output pulse control signal PWM.In one embodiment, switch control unit 221 is coupled to output voltage VO and reference voltage VREF, wherein the reference voltage VREF output reference voltage value DVO that equals to preset.In other embodiments, other signal of the reference voltage VREF reference voltage level DVO that also can equal to preset and compensating signal etc. is superimposed.Switch control unit 221 also can be coupled to output voltage VO by feedback circuit.In one embodiment, switch control unit 221 receives feedback signal VFB and the reference voltage VREF that represents output voltage VO, by relatively feedback signal VFB and reference voltage VREF export pulse control signal PWM, wherein reference voltage VREF is relevant with the product of a Proportional coefficient K with default output voltage reference value DVO, VREF=DVO*K for example, described Proportional coefficient K equals the ratio of feedback signal VFB and output voltage VO.The control mode that switch control unit can adopt voltage monocycle FEEDBACK CONTROL, the control of electric current and voltage ring feedback, nonlinear Control, constant on-time control or the control of constant turn-off time etc. to be fit to arbitrarily.
Overshoot control unit 222 turn-offed the first switching tube and keeps certain turn-off time Toff before output voltage VO increases to default output reference voltage value DVO, to reduce or to avoid the overshoot of output voltage VO.In one embodiment, overshoot control unit 222 is coupled to output voltage VO and first threshold voltage Vthl, and output overshoot control signal RBC.When output voltage VO increased to first threshold voltage Vthl, overshoot control signal RBC was effective status, for example low level.Overshoot control signal RBC is converted to disarmed state, for example high level after keeping the certain turn-off time Toff of effective status.When overshoot control signal RBC was effective status, control circuit 22 was kept the first switching tube and is turn-offed; When overshoot control signal RBC was disarmed state, the first switching tube is conducting and shutoff under the control of switch control unit 221.In one embodiment, turn-off time Toff is a fixing constant.In other embodiments, turn-off time Toff can adjust in real time according to the circuit parameter of switched-mode converter 200.Turn-off time Toff also can be stored in the register, by such as communication bus settings such as 12C, SMBUS.In one embodiment, first threshold voltage Vthl is less than default output reference voltage value DVO.
Logical block 223 received pulse control signal PWM and overshoot control signal RBC, and conducting and the shutoff to control the first switching tube according to pulse control signal PWM and overshoot control signal RBC generation switch controlling signal CTRL.When overshoot control signal RBC was in effective status, switch controlling signal CTRL controlled the first switching tube and turn-offs; When overshoot control signal RBC was in disarmed state, switch controlling signal CTRL controlled the first switching tube work according to pulse control signal PWM, such as conducting and shutoff.
Fig. 3 is the circuit theory diagrams according to the buck converter 300 of the utility model one embodiment.Fig. 3 is take buck converter topology as example, and those skilled in the art will be appreciated that other circuit topological structure that is fit to arbitrarily also can be applied to the utility model.The power stage circuit of buck converter 300 comprises the switch main circuit that is comprised of side switch pipe M1 and side switch pipe M2 and the low pass filter that is comprised of inductor L and output capacitor CO.The control circuit of buck converter 300 comprises switch control unit 31, overshoot control unit 32 and logical block 33.In one embodiment, buck converter 300 also comprises the feedback circuit that is comprised of resistor R1 and resistor R2.Resistor R1 has first end and the second end, and wherein first end is coupled to output voltage VO.Resistor R2 has first end and the second end, and wherein first end is coupled to the second end of resistor R1, the second end coupling system ground.The public point output feedback signal VFB of resistor R1 and resistor R2.
Side switch pipe M1 has first end, the second end and control end, and wherein first end is coupled to input voltage VIN.Side switch pipe M2 has first end, the second end and control end, and wherein first end is coupled to the second end of side switch pipe M1, and the second end is coupled to systematically.Inductor L has first end and the second end, and wherein first end is coupled to the common port of side switch pipe M1 and side switch pipe M2.Output capacitor CO has first end and the second end, and wherein first end is coupled to the second end of inductor L, and the second end is coupled to systematically.Side switch pipe M1 is such as being the switching tube that bipolar junction transistor (BJT), junction field effect transistor (JFET), mos field effect transistor (MOSFET), insulated gate gate pole transistor (IGBT) etc. are fit to arbitrarily.In the embodiment shown in fig. 3, side switch pipe M1 is N-shaped MOSFET.In other embodiments, side switch pipe M1 also can be p-type MOSFET.Side switch pipe M2 is such as being the switching tube that bipolar junction transistor (BJT), junction field effect transistor (JFET), mos field effect transistor (MOSFET), insulated gate gate pole transistor (IGBT) etc. are fit to arbitrarily.Side switch pipe M2 also can be diode.In the embodiment shown in fig. 3, side switch pipe M2 is N-shaped MOSFET.In other embodiments, side switch pipe M2 also can be p-type MOSFET.
In the embodiment shown in fig. 3, switch control unit 31 comprises comparator 311, (RS) trigger 312 and ON time generation unit 313 reset-set.Comparator 311 has first input end, the second input and output, and wherein first input end for example can be positive input, and the second input for example can be reverse input end.In one embodiment, the first input end of comparator 311 is coupled to reference voltage VREF, and the second input of comparator 311 is coupled to feedback signal VFB.Reference voltage VREF has represented default output reference voltage value DVO, perhaps default output reference voltage value DVO and the stack of compensating signal.Reference voltage VREF for example can be constant DC level, also can be the direct current signal that has comprised the real-time adjusting of compensating signal.Comparator 311 is exported asserts signal SET by comparison reference voltage VREF and feedback signal VFB at output.In one embodiment, as feedback signal VFB during less than reference voltage VREF, asserts signal SET is in effective status, for example high level.As feedback signal VFB during greater than reference voltage VREF, asserts signal SET is in disarmed state, for example low level.Rest-set flip-flop 312 comprises set input S, the RESET input R and output Q, wherein set input S is coupled to the output of comparator 311, the RESET input R is coupled to the output of ON time generation unit 313, output Q output pulse control signal PWM.ON time generation unit 313 received pulse control signal PWM also export ON time control signal TON.When pulse control signal PWM is in effective status, high level for example, the 313 beginning timing of ON time generation unit, until the ON time that timing time equals to be scheduled to, ON time control signal TON resets rest-set flip-flop 312 and exports the pulse control signal PWM of disarmed state, low level for example is to turn-off side switch pipe M1.In one embodiment, ON time generation unit 313 receives input voltage VIN and output voltage VO, and generates a constant on-time VO/ (VIN*fs) according to input voltage VIN and output voltage VO, and wherein fs is the switching frequency of buck converter 300.
In the embodiment shown in fig. 3, overshoot control unit 32 comprises comparing unit 321 and timing unit 324.
Comparing unit 321 has first input end, the second input and output, and wherein first input end for example can be positive input, and the second input for example can be reverse input end.In one embodiment, first input end is coupled to output voltage VO, and the second input is coupled to first threshold voltage Vthl.In embodiment as shown in Figure 3, when output voltage VO during greater than first threshold voltage Vthl, the comparison signal cmp of comparing unit 321 output high level, otherwise as output voltage VO during less than first threshold voltage Vthl, the comparison signal cmp of comparing unit 321 output low levels.
Timing unit 324 has first input end, the second input and output, and wherein first input end is coupled to the output of comparing unit 321, and the second input receives turn-off time Toff, output output overshoot control signal RBC.Timing unit 324 starts timer according to the comparison signal cmp of comparing unit 321 outputs, and exports effective overshoot control signal RBC until timing time equals turn-off time Toff.In one embodiment, when output voltage VO increased to first threshold voltage Vthl, timing unit 324 started timer and the timing of starting from scratch, and overshoot control signal RBC becomes effective status, for example low level; Until timing time is when equaling turn-off time Toff, timing unit 324 stops timing, and overshoot control signal RBC becomes disarmed state, for example high level.
In one embodiment, overshoot control unit 32 comprises also judging whether output voltage VO is in the rising judging unit 322 of ascent stage.Rising judging unit 322 receives output voltage VO, exports effective propradation and judge signal flag when the continuous propradation of being in of output voltage.Rising judging unit 322 for example can comprise the slope decision circuitry, judges slope that the output voltage VO of adjacent one or several switch periods changes whether for just, thereby judges whether output voltage VO is in propradation.Rising judging unit 322 for example can obtain by delay unit the time delayed signal of output voltage VO, and this time delayed signal and output voltage VO are compared to judge whether output voltage VO is in ascent stage.In embodiment as shown in Figure 3, rising judging unit 322 comprises the delay unit that is comprised of resistor R3 and capacitor C1, and comparator 3221.The end of resistor R3 is coupled to output voltage VO, and the other end of resistor R3 is coupled to the end of capacitor C1, and the other end of capacitor C1 is coupled to systematically.Comparator 3221 has first input end, the second input and output, and wherein first input end for example can be positive input, and the second input for example can be reverse input end.In one embodiment, the first input end of comparator 3221 is coupled to output voltage VO, and the second input of comparator 3221 is coupled to the public point of resistor R3 and capacitor C1 to receive the time delayed signal of output voltage VO.In embodiment as shown in Figure 3, when output voltage VO was in ascent stage, output voltage VO was greater than its time delayed signal, and the effective propradation of rising judging unit 322 outputs is judged signal flag, for example high level.
Logical circuit 323 has first input end, the second input and output, and wherein first input end is coupled to the output of comparing unit 321, and the second input is coupled to the output of rising judging unit 322.Timing unit 324 is coupled to the output of comparing unit 321 and the output of rising judging unit 322 by logical circuit 323.Logical circuit 323 is judged signal flag output timing enabling signal Ttr according to comparison signal cmp and propradation.When output voltage VO was in propradation greater than first threshold voltage Vthl and output voltage VO, Ttr was effective for the timing enabling signal.In embodiment as shown in Figure 3, logical circuit 323 is AND circuit.When comparison signal cmp and propradation judge that signal flag be high level simultaneously, export the timing enabling signal Ttr of high level.In one embodiment, when timing enabling signal Ttr is high level, the timer initiation in the timing unit 324 and the upwards timing of starting from scratch, overshoot control signal RBC becomes effective status; When timing time equaled turn-off time Toff, timing unit stopped timing, and overshoot control signal RBC becomes disarmed state from effective status.
In one embodiment, overshoot control unit 32 also comprises register 325, in order to export turn-off time Toff.Turn-off time Toff is such as passing through such as communication bus settings such as I2C, SMBUS.In other embodiments, turn-off time Toff also can be by calculating (back detailed description) in real time.
Logical block 33 received pulse control signal PWM and overshoot control signal RBC, and produce switch controlling signal CTRL with conducting and the shutoff of control side switch pipe M1 and side switch pipe M2 according to pulse control signal PWM and overshoot control signal RBC.In one embodiment, when overshoot control signal RBC is in effective status, low level for example, switch controlling signal CTRL control side switch pipe M1 turn-offs.When overshoot control signal RBC is in disarmed state, high level for example, switch controlling signal CTRL is according to conducting and the shutoff of pulse control signal PWM control side switch pipe M1 and side switch pipe M2.In embodiment as shown in Figure 3, logical block 33 is AND circuit.
Fig. 4 be according to the utility model one embodiment according to the load current positive transition of buck converter 300 shown in Figure 3 the time oscillogram.As shown in Figure 4, at T3 constantly, load current IO is with faster speed positive transition, 100A/us for example, output voltage VO reduces rapidly, inductive current IL rising, overshoot control signal RBC is high level, namely is in disarmed state, and switch controlling signal CTRL is determined by pulse control signal PWM.At T4 constantly, output voltage VO is in propradation and output voltage VO greater than first threshold voltage Vthl, overshoot control signal RBC becomes low level, be effective status, no matter which kind of state pulse control signal PWM is in, and switch controlling signal CTRL is that low level is turn-offed to keep side switch pipe M1.Until T5 constantly, when namely side switch pipe M1 time of keeping shutoff equaled turn-off time Toff, overshoot control signal RBC became disarmed state from effective status, and switch controlling signal CTRL is determined that by pulse control signal PWM the side switch pipe recovers normal operation.
In the embodiment shown in fig. 4, control circuit turn-offs side switch pipe M1 and equals turn-off time Toff until side switch pipe M1 keeps the time of shutoff when output voltage VO increases to first threshold voltage Vthl, thereby turn-off in advance side switch pipe M1, the energy that is stored in the inductance L is discharged in the output voltage VO in advance, to reduce the overshoot of output voltage VO.
The utility model also provides a kind of control method of switched-mode converter, thereby the output voltage VO that is included in switched-mode converter is turn-offed the first switching tube and is kept the overshoot that certain turn-off time Toff reduces output voltage VO before increasing to default output reference voltage value DVO, for example turn-off the first switching tube and keep turn-off time Toff when output voltage VO increases to first threshold voltage Vthl, wherein first threshold voltage Vthl is less than default output reference voltage value DVO.Turn-off time Toff also can be by calculating (back detailed description) such as can be by such as communication bus settings such as I2C, SMBUS.
Fig. 5 is that description is according to the flow chart of the control procedure of the switched-mode converter of the utility model one embodiment.The flow chart of control procedure shown in Figure 5 is set forth as an example of switched-mode converter 200 example.When circuit brings into operation, output voltage VO and first threshold voltage Vthl are compared, and judge whether output voltage VO is in ascent stage, judge namely whether output voltage VO is increasing.When output voltage VO is not in ascent stage or output voltage VO less than first threshold voltage Vthl, keep the current on off state of power stage circuit 21, the first switching tube normal operation, for example conducting or turn-off the first switching tube under the control of switch control unit 221; When output voltage VO is in ascent stage and output voltage VO greater than first threshold voltage Vthl, enter step 501, keep the first switching tube and turn-off.The first switching tube continues to keep certain turn-off time Toff after turn-offing.In embodiment as shown in Figure 5, keep turn-off time toff and comprise step 502-504.In the step 502, timing unit starts timing time cntl zero clearing when the first switching tube is forced to turn-off.In the step 503, timing time cntl increases, i.e. cntl=cntl+ Δ T, and wherein Δ T for example can be the cycle of one or more system clocks.When timing time cntl is not equal to turn-off time Toff, get back to step 503, timing time cntl continues to increase; When timing time cntl equals the Toff of turn-off time, enter step 504 and step 505, timing unit stops timing, and the first switching tube recovers normal operation.It for example can be conducting or shutoff under the control of switch control unit 221 that the first switching tube recovers normal operation.
Notice that in above-described flow chart, the function that marks in the frame also can be according to being different from occurring in sequence shown in the figure.For example, in fact the square frame that two adjoining lands represent can be carried out substantially concurrently, and they also can be carried out by opposite order sometimes, and this depends on related concrete function.
During the load current positive transition, when output voltage VO increases to first threshold voltage Vthl, turn-off the first switching tube and keep certain turn-off time Toff to reduce or to avoid the overshoot of output voltage VO.For different application scenarios, turn-off time Toff for example can pass through communication bus or external circuit setting.But different load hopping amplitudes and speed may need different turn-off time Toff to reach optimized control effect.Toff is long when the turn-off time, and output voltage VO is slack-off for the dynamic responding speed of load variations, and output voltage needs the longer time to return to predetermined output reference voltage DVO; Toff is too short when the turn-off time, and the dynamic responding speed of output voltage VO is enough fast, and output voltage VO can return to predetermined output reference voltage DVO very soon, but too fast response speed may cause overshoot.A kind of overshoot control circuit that can self adaptation calculates turn-off time Toff has below been proposed.
Fig. 6 is the circuit theory diagrams according to the overshoot control circuit 600 that is used for buck converter 300 shown in Figure 3 of the utility model one embodiment.When overshoot control circuit 600 increases to first threshold voltage Vthl in output voltage VO, turn-off the first switching tube and keep certain turn-off time Toff, wherein turn-off time Toff calculates from the time interval that Second Threshold voltage Vth2 increases to first threshold voltage Vthl according to output voltage VO.
Overshoot control circuit 600 comprises comparing unit 601, rising judging unit 602, logical circuit 603, timing unit 604, comparing unit 605, logical block 606, timing unit 607 and computing unit 608.
Comparing unit 601 has first input end, the second input and output, wherein first input end is coupled to output voltage VO, the second end is coupled to first threshold voltage Vthl, and output is according to output voltage VO and first threshold voltage Vthl output comparison signal cmp.Rising judging unit 602 obtains propradation according to output voltage VO and judges signal flag.In one embodiment, rising judging unit 322 can comprise the slope decision circuitry, judges slope that the output voltage VO of adjacent one or several switch periods changes whether for just, thereby judges whether output voltage VO is in propradation.In one embodiment, can obtain an inhibit signal according to output voltage VO, then this inhibit signal and output voltage VO be compared, when output voltage VO can think that output voltage VO is in ascent stage during greater than this inhibit signal.Logical circuit 603 has first input end, the second input and output, wherein first input end is coupled to the output of comparing unit 601, the second input is coupled to the output of rising judging unit 602, and output is judged signal flag output timing enabling signal Ttr according to comparison signal cmp and propradation.When output voltage VO was in propradation greater than first threshold voltage Vthl and output voltage VO, Ttr was effective for the timing enabling signal, for example is high level.In embodiment as shown in Figure 6, logical circuit 603 is AND circuit.Timing unit 604 has first input end, the second input and output, wherein first input end is coupled to the output of logical circuit 603 to receive timing enabling signal Ttr, the second input receives turn-off time Toff, output output overshoot control signal RBC.Timing unit 604 starts timer and exports effective overshoot control signal RBC according to timing enabling signal Ttr, until timing time equals turn-off time Toff.
Comparing unit 605 has first input end, the second input and output, wherein the first output is coupled to output voltage VO, the second input is coupled to Second Threshold voltage Vth2, and output is according to output voltage VO and Second Threshold voltage Vth2 output comparison signal cmp2.When output voltage VO during greater than Second Threshold voltage Vth2, comparison signal cmp2 is effective, for example is high level; When output voltage VO during less than Second Threshold voltage Vth2, comparison signal cmp2 is invalid, for example is low level.
Logical block 606 has first input end, the second input and output, and wherein first input end is coupled to the output that postpones comparing unit 604, and the second input is coupled to the output of comparing unit 605, output output timing enabling signal Ttr2.In one embodiment, logical block 606 is AND circuit.When output voltage VO was in ascent stage greater than Second Threshold voltage Vth2 and output voltage VO, Ttr2 was effective for the timing enabling signal, for example is high level.
Timing unit 607 has the input of startup Start, stops input Stop and output, wherein start the output that input Start is coupled to logical block 606, stop the output that input Stop is coupled to logical block 603, output output timing time cnt2.When output voltage VO is in propradation greater than Second Threshold voltage Vth2 and output voltage VO, Ttr2 is effective for the timing enabling signal, and timing unit 607 beginning timing are until output voltage VO is when rising to first threshold voltage Vthl, timing unit stops timing, and output timing time cnt2.Timing time cnt2 has represented output voltage VO increases to first threshold voltage Vthl from Second Threshold voltage Vth2 the time interval.In one embodiment, Second Threshold voltage Vth2 is less than first threshold voltage Vthl, and first threshold voltage Vthl is less than default output reference voltage value DVO.In one embodiment, the output reference voltage value DVO that first threshold voltage Vthl equals to preset deducts a constant M, Vthl=DVO-M namely, the output reference voltage value DVO that Second Threshold voltage Vth2 equals to preset deducts 2 times constant M, namely Vth2=DVO-2M.
Computing unit 608 has input and output, wherein input be coupled to timing unit 607 output to receive timing time cnt2, output is according to timing time cnt2 output turn-off time Toff.Turn-off time Toff is along with the increase of timing time cnt2 or dwindle and correspondingly increase or dwindle.In one embodiment, turn-off time Toff is along with the increase of poor (being VIN-VO) of input voltage VIN and output voltage VO or dwindle and correspondingly increase or dwindle, and turn-off time Toff is along with the increase of output voltage VO or dwindle and correspondingly dwindle or increase.
In one embodiment, turn-off time Toff is:
Toff=cnt2(VIN-VO)/VO (1)
Overshoot control circuit 600 does not as shown in Figure 6 need outer setting turn-off time Toff, can calculate flexibly turn-off time Toff under different application scenarios, the overshoot control control signal RBC that is optimized.
Fig. 7 is the oscillogram during according to the load current positive transition under overshoot control circuit 600 control of the utility model one embodiment.As shown in Figure 7, at T6 constantly, load current IO is with faster speed positive transition, the example output voltage VO reduces rapidly, inductive current IL rising, and overshoot control signal RBC is high level, namely be in disarmed state, switch controlling signal CTRL is determined by pulse control signal PWM.At T7 constantly, output voltage VO is in ascent stage and output voltage VO greater than Second Threshold voltage Vth2, timing unit 607 beginning timing.At T8 constantly, output voltage VO increases to first threshold voltage Vthl, timing unit 607 stops timing and exports timing time cnt2, and timing time cnt2 has represented output voltage VO and increased to the used time interval T8-T7 of first threshold voltage Vthl from Second Threshold voltage Vth2.At T8 constantly, overshoot control signal RBC becomes effective status, i.e. low level, and no matter which kind of state pulse control signal PWM is in, and switch controlling signal CTRL output low level is to turn-off side switch pipe M1.Until T9 constantly, the time of overshoot control signal RBC continuous and effective state is when equaling turn-off time Toff, overshoot control signal RBC becomes disarmed state from effective status, for example become high level, switch controlling signal CTRL determines that by pulse control signal PWM side switch pipe M1 works under the control of pulse control signal PWM.In one embodiment, the output reference voltage value DVO that first threshold voltage Vthl equals to preset deducts a constant M, Vthl=DVO-M namely, the output reference voltage value DVO that Second Threshold voltage Vth2 equals to preset deducts 2 times constant M, Vth2=DVO-2M namely, turn-off time Toff equals CNT (VIN-VO)/VO.
Fig. 8 is that description is according to the flow chart of the control procedure of the switched-mode converter of another embodiment of the utility model.Control procedure shown in Figure 8 is set forth as an example of switched-mode converter 200 example.When control method shown in Figure 8 increases to first threshold voltage Vthl in output voltage VO, turn-off the first switching tube and keep certain turn-off time Toff, wherein turn-off time Toff calculates from the time interval that Second Threshold voltage Vth2 increases to first threshold voltage Vthl according to output voltage VO.First threshold voltage Vthl for example can be that the output reference voltage value DVO that presets deducts a constant M, Vthl=DVO-M namely, Second Threshold voltage Vth2 for example can be that the output reference voltage value DVO that presets deducts 2 times constant M, namely Vth2=DVO-2M.
When circuit brings into operation, output voltage VO and Second Threshold voltage Vth2 are compared, and judge whether output voltage VO is in ascent stage, judge namely whether output voltage VO is increasing.When output voltage VO is in ascent stage and output voltage VO less than Second Threshold voltage Vth2, enter step 801, the second timing unit starts, timing time cnt2 zero clearing.In the step 802, timing time cnt2 increases, i.e. cnt2=cnt2+ Δ T, and wherein Δ T for example can be the cycle of one or more system clocks.When output voltage VO during greater than first threshold voltage Vthl, timing time cnt2 continues to increase; When output voltage VO during less than first threshold voltage Vthl, enter step 803, the second timing unit stops, and output timing time cnt2, and timing time cnt2 has represented output voltage VO and increased to the time interval that first threshold voltage Vthl needs from Second Threshold voltage Vth2.In one embodiment, calculate turn-off time Toff according to timing time cnt2, turn-off time Toff for example equals cnt2 (VIN-VO)/VO.In the step 804, turn-off the first switching tube and keep certain turn-off time Toff, timing time cnt2 zero clearing.When the turn-off time Toff time then, in the step 805, the first switching tube recovers normal operation, for example conducting or shutoff under the control of switch control unit 221.
Notice that in above-described flow chart, the function that marks in the frame also can be according to being different from occurring in sequence shown in the figure.For example, in fact the square frame that two adjoining lands represent can be carried out substantially concurrently, and they also can be carried out by opposite order sometimes, and this depends on related concrete function.
Some above-mentioned specific embodiments only describe the utility model in an exemplary fashion, and these embodiment are not fully detailed, and are not used in the scope of the present utility model that limits.It all is possible changing and revise for disclosed embodiment, the selectivity embodiment that other are feasible and can be understood by those skilled in the art the equivalent variations of element among the embodiment.Other variations of embodiment disclosed in the utility model and modification do not exceed spirit of the present utility model and protection range.

Claims (5)

1. control circuit, be used for switched-mode converter, wherein switched-mode converter comprises the first switching tube, the output reference voltage value that control circuit is controlled conducting and the shutoff of the first switching tube and made the output voltage of switched-mode converter equal to preset, it is characterized in that described control circuit comprises:
Switch control unit produces pulse control signal according to output voltage and default output reference voltage value;
The overshoot control unit produces the overshoot control signal according to output voltage and first threshold voltage; And
Logical block produces conducting and the shutoff of switch controlling signal to control the first switching tube according to pulse control signal and overshoot control signal; Wherein
Switch controlling signal is controlled the first switching tube and is turn-offed when the overshoot control signal is in the first state, and switch controlling signal is controlled conducting and the shutoff of the first switching tube according to pulse control signal when the overshoot control signal is in the second state.
2. control circuit as claimed in claim 1 is characterized in that, wherein the overshoot control unit comprises:
The first comparing unit has first input end, the second input and output, and wherein first input end is coupled to output voltage, and the second input is coupled to first threshold voltage;
The rising judging unit has input and output, and wherein input receives output voltage, and output output propradation is judged signal, judges whether output voltage is in ascent stage; And
The first timing unit has first input end, the second input and output, and wherein first input end is coupled to the output of the first comparing unit and the output of rising judging unit, and the second input receives the turn-off time, output output overshoot control signal; Wherein
The first timing unit begins timing and the overshoot control signal is the first state when output voltage increases to first threshold voltage, until the timing time of the first timing unit when equaling the turn-off time the first timing unit stop timing and the overshoot control signal is the second state.
3. control circuit as claimed in claim 1 is characterized in that, wherein the overshoot control unit comprises:
The first comparing unit has first input end, the second input and output, and wherein first input end is coupled to output voltage, and the second input is coupled to first threshold voltage;
The second comparing unit has first input end, the second input and output, and wherein first input end is coupled to output voltage, and the second input is coupled to Second Threshold voltage, and wherein Second Threshold voltage is less than first threshold voltage;
The rising judging unit has input and output, and wherein input receives output voltage, and output output propradation is judged signal, judges whether output voltage is in ascent stage;
The second timing unit, have the input of startup, stop input and output, wherein start input and be coupled to the output of the second comparing unit and the output of rising judging unit, stop input and be coupled to the output of the first comparing unit and the output of rising judging unit, output is exported the second timing time, wherein the second timing unit begins timing when output voltage increases to Second Threshold voltage, and the second timing unit stops timing when output voltage increases to first threshold voltage;
Computing unit obtains the turn-off time according to the second timing time; And
The first timing unit has first input end, the second input and output, and wherein first input end is coupled to the output of the first comparing unit and the output of rising judging unit, and the second input receives the turn-off time, output output overshoot control signal; Wherein
The first timing unit begins timing and the overshoot control signal is the first state when output voltage increases to first threshold voltage, until the timing time of the first timing unit when equaling the turn-off time the first timing unit stop timing and the overshoot control signal is the second state.
4. a switched-mode converter is characterized in that, comprises the first switching tube and such as each described control circuit in the claims 1 to 3.
5. switched-mode converter as claimed in claim 4 is characterized in that, the first switching tube has first end, the second end and control end, and wherein first end receives input voltage, and control end is coupled to the output of control circuit;
This switched-mode converter also comprises:
The second switch pipe has first end, the second end and control end, and wherein first end is coupled to the second end of the first switching tube, and the second end is coupled to ground, and control end is coupled to the output of control circuit;
Inductor has first end and the second end, and wherein first end is coupled to the second end of the first switching tube and the first end of second switch pipe; And
Output capacitor is electrically coupled with between second end and ground of inductor, and wherein the second end of inductor provides described output voltage.
CN 201220432910 2012-08-29 2012-08-29 Control circuit and switch mode converter Expired - Fee Related CN202840923U (en)

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CN102801288A (en) * 2012-08-29 2012-11-28 成都芯源***有限公司 Control circuit, switch mode converter and control method
CN103346536A (en) * 2013-06-08 2013-10-09 昂宝电子(上海)有限公司 System and method used for performing two-stage protection on power conversion system
CN104917370A (en) * 2014-03-11 2015-09-16 登丰微电子股份有限公司 Voltage reduction conversion controller
CN105572528A (en) * 2014-11-04 2016-05-11 意法半导体股份有限公司 Detection circuit, related active discharge circuit, integrated circuit and method
CN111464013A (en) * 2019-01-22 2020-07-28 博发电子股份有限公司 DC/DC transformer and operation method thereof
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102801288A (en) * 2012-08-29 2012-11-28 成都芯源***有限公司 Control circuit, switch mode converter and control method
CN102801288B (en) * 2012-08-29 2015-05-13 成都芯源***有限公司 Control circuit, switch mode converter and control method
CN103346536A (en) * 2013-06-08 2013-10-09 昂宝电子(上海)有限公司 System and method used for performing two-stage protection on power conversion system
US10749439B2 (en) 2013-06-08 2020-08-18 On-Bright Electronics (Shanghai) Co., Ltd. Systems and methods for two-level protection of power conversion systems
CN103346536B (en) * 2013-06-08 2016-02-17 昂宝电子(上海)有限公司 For carrying out the system and method for two class protection to power converting system
US10305386B2 (en) 2013-06-08 2019-05-28 On-Bright Electronics (Shanghai) Co., Ltd. Systems and methods for two-level protection of power conversion systems
CN104917370B (en) * 2014-03-11 2017-07-07 登丰微电子股份有限公司 Step-down switching controller
CN104917370A (en) * 2014-03-11 2015-09-16 登丰微电子股份有限公司 Voltage reduction conversion controller
CN105572528A (en) * 2014-11-04 2016-05-11 意法半导体股份有限公司 Detection circuit, related active discharge circuit, integrated circuit and method
US10345348B2 (en) 2014-11-04 2019-07-09 Stmicroelectronics S.R.L. Detection circuit for an active discharge circuit of an X-capacitor, related active discharge circuit, integrated circuit and method
CN105572528B (en) * 2014-11-04 2020-01-07 意法半导体股份有限公司 Detection circuit, related active discharge circuit, integrated circuit and method
US11750010B2 (en) 2014-11-04 2023-09-05 Stmicroelectronics S.R.L. Detection circuit for an active discharge circuit of an X-capacitor, related active discharge circuit, integrated circuit and method
CN111464013A (en) * 2019-01-22 2020-07-28 博发电子股份有限公司 DC/DC transformer and operation method thereof
CN112702176A (en) * 2020-12-22 2021-04-23 海光信息技术股份有限公司 I2C bus power supply control circuit, control method and chip

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