CN202797938U - Overvoltage protection circuit and TV set - Google Patents
Overvoltage protection circuit and TV set Download PDFInfo
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- CN202797938U CN202797938U CN 201220393808 CN201220393808U CN202797938U CN 202797938 U CN202797938 U CN 202797938U CN 201220393808 CN201220393808 CN 201220393808 CN 201220393808 U CN201220393808 U CN 201220393808U CN 202797938 U CN202797938 U CN 202797938U
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Abstract
The utility model provides an overvoltage protection circuit and a TV set. The overvoltage protection circuit comprises a PFC booster circuit, a transformer, a main chip control circuit, and a detection circuit. The main chip control circuit can be used to control the working of the PFC booster circuit, and a first end of the main chip control circuit is connected with a second input end of the PFC booster circuit, in addition, a second end of the main chip control circuit is connected with a second output end of the transformer. The detection circuit can be used to detect the abnormal condition of the circuit and control the working of the main chip control circuit. A first end of the detection circuit is connected with a third end of the main chip control circuit, and a second end of the detection circuit is connected with a third output end of the transformer. The utility model provides the TV set comprising the above mentioned overvoltage protection circuit. The overvoltage protection circuit can be used to solve the problems of the prior art of the explosion and the fire caused by the overvoltage of the high voltage large capacitor, and has advantages of safety, reliability, simple circuit, and ability of effectively reducing the production costs.
Description
Technical field
The utility model belongs to power technique fields, relates in particular to a kind of overvoltage crowbar and television set.
Background technology
According to existing national standard, when the Overall Power Consumption of panel TV during greater than 75W, power supply must add PFC(Power Factor Correction, power factor correction) booster circuit.The PFC booster circuit of existing panel TV is a Boost topology circuit, and constant high voltage of this topological circuit output is to high-voltage capacitance.This topology has effectively solved the power factor (PF) problem of power supply, but controls owing to its output voltage feeds back to control chip by the sample resistance sampling, and therefore the quality requirement to sample resistance is very high in the use procedure of reality.In the process of production in enormous quantities and user's use, always exist the sample resistance resistance to change or line voltage such as uprises unusually at other situation, can cause this moment the voltage at high-voltage capacitance two ends to raise, surpass that it is withstand voltage and cause that high-voltage capacitance is on fire from explosion, cause the serious harm of flaming machine.
The utility model content
The purpose of this utility model is to provide a kind of overvoltage crowbar, is intended to solve the problem that has the large electric capacity overvoltage of high pressure exploding and firing in the prior art.In order to solve the problems of the technologies described above, the utility model adopts following scheme to be achieved:
A kind of overvoltage crowbar; comprise PFC booster circuit, transformer; the first input end of described PFC booster circuit is voltage input end; the output of described PFC booster circuit is connected with the input of described transformer; the first output of described transformer is voltage output end, and described overvoltage crowbar also comprises:
Be used for the master chip control circuit of control PFC booster circuit work, the first end of described master chip control circuit is connected with the second input of described PFC booster circuit, and the second end of described master chip control circuit is connected with the second output of described transformer;
For detection of the circuit abnormality situation and control the testing circuit of master chip control circuit work, the first end of described testing circuit is connected with the 3rd end of described master chip control circuit, and the second end of described testing circuit is connected with the 3rd output of described transformer.
Described master chip control circuit comprises the 8th resistance and the first chip, ground connection after the crus secunda of described the first chip is connected with the first end of described the 8th resistance, the 5th pin of described the first chip is connected with the second end of described the 8th resistance, and the 14 pin of described the first chip is connected with the second input of described PFC booster circuit.
Described testing circuit comprises the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the first diode, the second diode, the first voltage stabilizing didoe, the second voltage stabilizing didoe, the 3rd voltage stabilizing didoe, the first electric capacity, the second electric capacity, the first metal-oxide-semiconductor;
The output of the first end of described the first resistance and described PFC booster circuit be connected the first end of former limit winding of transformer and be connected, the second end of described the first resistance and the 9th pin of described the first chip be connected the first end of the 4th resistance and be connected ground connection after the second end of described the 4th resistance is connected with the first end of described the 5th resistance;
The second end of the former limit winding of described transformer is connected with the drain electrode of described the first metal-oxide-semiconductor, the source electrode of described the first metal-oxide-semiconductor is connected with the tenth tripod of described the first chip by the second resistance, the grid of described the first metal-oxide-semiconductor is connected with the tenth pin of described the first chip by the 3rd resistance, and the grid of described the first metal-oxide-semiconductor also is connected with the second end of described the 5th resistance;
The anodic bonding of the first end of the auxiliary winding of described transformer and described the first diode, the negative electrode of described the first diode is by the first capacity earth, and the negative electrode of described the first diode also is connected with the first pin of described the first chip; The first end of the auxiliary winding of described transformer also is connected through the negative electrode of the 6th resistance with described the second diode, the anode of described the second diode is by the second capacity earth, the anode of described the second diode also with the anodic bonding of described the first voltage stabilizing didoe, the anodic bonding of the negative electrode of described the first voltage stabilizing didoe and described the second voltage stabilizing didoe, the anodic bonding of the negative electrode of described the second voltage stabilizing didoe and described the 3rd voltage stabilizing didoe, the negative electrode of described the 3rd voltage stabilizing didoe is connected with the 5th pin of described the first chip through the 7th resistance;
The second end ground connection of the auxiliary winding of described transformer, and the second end of the first end of the former limit winding of described transformer and auxiliary winding is Same Name of Ends.
Further, described the first electric capacity is polar capacitor, and an end that is connected with the negative electrode of described the first diode is for anodal.
Further, described the second electric capacity is polar capacitor, and with an end of the anodic bonding of described the second diode be negative pole.
Further, described the first metal-oxide-semiconductor is N channel enhancement metal-oxide-semiconductor.
Further, the model of described the first chip is TEA1753.
Another purpose of the present utility model is to provide a kind of television set, comprises above-mentioned overvoltage crowbar.
The voltage protection circuit that the utility model provides has solved the problem of the large electric capacity overvoltage of prior art mesohigh exploding and firing, and safe and reliable, circuit is simple, can effectively reduce production costs simultaneously.
Description of drawings
Fig. 1 is the theory diagram of the protective circuit that provides of the utility model;
Fig. 2 is the detailed circuit diagram of the protective circuit that provides of the utility model.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explaining the utility model, and be not used in restriction the utility model.
The detailed description embodiment is as follows:
With reference to figure 1; a kind of overvoltage crowbar 10; comprise PFC booster circuit 11, transformer 13; the first input end of described PFC booster circuit 11 is voltage input end; the output of described PFC booster circuit 11 is connected with the input of described transformer 13; the first output of described transformer 13 is voltage output end, and described overvoltage crowbar 10 also comprises:
The master chip control circuit 12 that is used for 11 work of control PFC booster circuit, the first end of described master chip control circuit 12 is connected with the second input of described PFC booster circuit 11, and the second end of described master chip control circuit 12 is connected with the second output of described transformer 13;
For detection of the circuit abnormality situation and control the testing circuit 14 of master chip control circuit 11 work, the first end of described testing circuit 14 is connected with the 3rd end of described master chip control circuit 12, and the second end of described testing circuit 14 is connected with the 3rd output of described transformer 13.
Described master chip control circuit 14 comprises the 8th resistance R 8 and the first chip IC 1, ground connection after the crus secunda of described the first chip IC 1 is connected with the first end of described the 8th resistance R 8, the 5th pin of described the first chip IC 1 is connected with the second end of described the 8th resistance R 8, and the 14 pin of described the first chip IC 1 is connected with the second input of described PFC booster circuit 11.
Described testing circuit comprises the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the first diode D1, the second diode D2, the first voltage stabilizing didoe ZD1, the second voltage stabilizing didoe ZD2, the 3rd voltage stabilizing didoe ZD3, the first capacitor C 1, the second capacitor C 2, the first metal-oxide-semiconductor Q1;
The output of the first end of described the first resistance R 1 and described PFC booster circuit 11 be connected the first end of former limit winding of transformer 13 and be connected, the 9th pin of the second end of described the first resistance R 1 and described the first chip IC 1 be connected the first end of the 4th resistance R 4 and be connected ground connection after the second end of described the 4th resistance R 4 is connected with the first end of described the 5th resistance R 5;
The second end of the former limit winding of described transformer 13 is connected with the drain electrode of described the first metal-oxide-semiconductor Q1, the source electrode of described the first metal-oxide-semiconductor Q1 is connected with the tenth tripod of described the first chip IC 1 by the second resistance R 2, the grid of described the first metal-oxide-semiconductor Q1 is connected with the tenth pin of described the first chip IC 1 by the 3rd resistance R 3, and the grid of described the first metal-oxide-semiconductor Q1 also is connected with the second end of described the 5th resistance R 5;
The anodic bonding of the first end of the auxiliary winding of described transformer 13 and described the first diode D1, the negative electrode of described the first diode D1 is by the first capacitor C 1 ground connection, and the negative electrode of described the first diode D1 also is connected with the first pin of described the first chip IC 1; The first end of the auxiliary winding of described transformer 13 also is connected with the negative electrode of described the second diode D2 through the 6th resistance R 6, the anode of described the second diode D2 is by the second capacitor C 2 ground connection, the anode of described the second diode D2 also with the anodic bonding of described the first voltage stabilizing didoe ZD1, the anodic bonding of the negative electrode of described the first voltage stabilizing didoe ZD1 and described the second voltage stabilizing didoe ZD2, the anodic bonding of the negative electrode of described the second voltage stabilizing didoe ZD2 and described the 3rd voltage stabilizing didoe ZD3, the negative electrode of described the 3rd voltage stabilizing didoe ZD3 is connected through the 5th pin of the 7th resistance R 7 with described the first chip IC 1;
The second end ground connection of the auxiliary winding of described transformer 13, and the second end of the first end of the former limit winding of described transformer and auxiliary winding is Same Name of Ends.
Further, described the first capacitor C 1 is polar capacitor, and an end that is connected with the negative electrode of described the first diode D1 is for anodal.
Further, described the second capacitor C 2 is polar capacitor, and with an end of the anodic bonding of described the second diode D2 be negative pole.
Further, described the first metal-oxide-semiconductor Q1 is N channel enhancement metal-oxide-semiconductor.
Further, the model of described the first chip IC 1 is TEA1753.
Another purpose of the present utility model is to provide a kind of television set, comprises above-mentioned overvoltage crowbar 10.
The elaboration operation principle is as follows:
Described PFC booster circuit output voltage is to transformer 13, then by transformer 13 output voltages to load, described transformer 13 also is described master chip control circuit 12 power supplies simultaneously, described testing circuit 14 detects the voltage of transformer 13, if electric voltage exception raises, testing circuit 14 can send abnormal signal to master chip control circuit 12, makes its control PFC booster circuit 11 stop to boost; If voltage is normal, testing circuit 14 sends the normal operation signal also can for master chip control circuit 12, makes the normal operation of its control PFC booster circuit.
The first pin of described the first chip IC 1 is the power supply pin, and the 5th pin is general protection input pin, and when it was low-voltage, chip quit work; The 9th pin of the first chip IC 1 is that the PFC output voltage detects input pin, and the tenth pin is programmable inverse-excitation type current detecting input pin, and the tenth tripod is inverse-excitation type door driver output pin, output high level during normal operation; The 14 pin is PFC switch control pin.
During normal operation, the tenth tripod is high level, then the first metal-oxide-semiconductor Q1 conducting, and then the second end of described transformer 13 is low level.Because the second end of auxiliary winding and the first end of former limit winding are Same Name of Ends, and the second end ground connection of auxiliary winding, be low level, the first end of so described auxiliary winding then is a negative voltage, through the first voltage stabilizing didoe ZD1, the second voltage stabilizing didoe ZD2, the 3rd voltage stabilizing didoe ZD3 voltage stabilizing, again through the 7th resistance R 7, being connected to behind the 5th pin of the first chip IC 1 is a high level, described PFC booster circuit 11 normal operations of the 14 foot control system of the first chip IC 1.
When electric voltage exception raises; the absolute value of the negative voltage of the voltage of the first end of the auxiliary winding of described transformer 13 can be larger; pass through so through the first voltage stabilizing didoe ZD1, the second voltage stabilizing didoe ZD2, the 3rd voltage stabilizing didoe ZD3 voltage stabilizing; again through the 7th resistance R 7; being connected to behind the 5th pin of the first chip IC 1 is a low level, and the first chip IC 1 is quit work by locked so; so described PFC booster circuit 11 stops to boost, and realizes the purpose of protective circuit.
The voltage protection circuit that the utility model provides has solved the problem of the large electric capacity overvoltage of prior art mesohigh exploding and firing, and safe and reliable, circuit is simple, can effectively reduce production costs simultaneously.
The above only is preferred embodiment of the present utility model; not in order to limit the utility model; all any modifications of within spirit of the present utility model and principle, doing, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.
Claims (9)
1. overvoltage crowbar; comprise PFC booster circuit, transformer; the first input end of described PFC booster circuit is voltage input end; the output of described PFC booster circuit is connected with the input of described transformer; the first output of described transformer is voltage output end; it is characterized in that described overvoltage crowbar also comprises:
Be used for the master chip control circuit of control PFC booster circuit work, the first end of described master chip control circuit is connected with the second input of described PFC booster circuit, and the second end of described master chip control circuit is connected with the second output of described transformer;
For detection of the circuit abnormality situation and control the testing circuit of master chip control circuit work, the first end of described testing circuit is connected with the 3rd end of described master chip control circuit, and the second end of described testing circuit is connected with the 3rd output of described transformer.
2. overvoltage crowbar as claimed in claim 1; it is characterized in that; described master chip control circuit comprises the 8th resistance and the first chip; ground connection after the crus secunda of described the first chip is connected with the first end of described the 8th resistance; the 5th pin of described the first chip is connected with the second end of described the 8th resistance, and the 14 pin of described the first chip is connected with the second input of described PFC booster circuit.
3. overvoltage crowbar as claimed in claim 1, it is characterized in that described testing circuit comprises the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the first diode, the second diode, the first voltage stabilizing didoe, the second voltage stabilizing didoe, the 3rd voltage stabilizing didoe, the first electric capacity, the second electric capacity, the first metal-oxide-semiconductor;
The output of the first end of described the first resistance and described PFC booster circuit be connected the first end of former limit winding of transformer and be connected, the second end of described the first resistance and the 9th pin of described the first chip be connected the first end of the 4th resistance and be connected ground connection after the second end of described the 4th resistance is connected with the first end of described the 5th resistance;
The second end of the former limit winding of described transformer is connected with the drain electrode of described the first metal-oxide-semiconductor, the source electrode of described the first metal-oxide-semiconductor is connected with the tenth tripod of described the first chip by the second resistance, the grid of described the first metal-oxide-semiconductor is connected with the tenth pin of described the first chip by the 3rd resistance, and the grid of described the first metal-oxide-semiconductor also is connected with the second end of described the 5th resistance;
The anodic bonding of the first end of the auxiliary winding of described transformer 13 and described the first diode, the negative electrode of described the first diode is by the first capacity earth, and the negative electrode of described the first diode also is connected with the first pin of described the first chip; The first end of the auxiliary winding of described transformer also is connected through the negative electrode of the 6th resistance with described the second diode, the anode of described the second diode is by the second capacity earth, the anode of described the second diode also with the anodic bonding of described the first voltage stabilizing didoe, the anodic bonding of the negative electrode of described the first voltage stabilizing didoe and described the second voltage stabilizing didoe, the anodic bonding of the negative electrode of described the second voltage stabilizing didoe and described the 3rd voltage stabilizing didoe, the negative electrode of described the 3rd voltage stabilizing didoe is connected with the 5th pin of described the first chip through the 7th resistance.
4. overvoltage crowbar as claimed in claim 3 is characterized in that, the second end ground connection of the auxiliary winding of described transformer, and the second end of the first end of the former limit winding of described transformer and auxiliary winding is Same Name of Ends.
5. overvoltage crowbar as claimed in claim 3 is characterized in that, described the first electric capacity is polar capacitor, and an end that is connected with the negative electrode of described the first diode is for anodal.
6. overvoltage crowbar as claimed in claim 3 is characterized in that, described the second electric capacity is polar capacitor, and with an end of the anodic bonding of described the second diode be negative pole.
7. overvoltage crowbar as claimed in claim 3 is characterized in that, described the first metal-oxide-semiconductor is N channel enhancement metal-oxide-semiconductor.
8. overvoltage crowbar as claimed in claim 2 is characterized in that, the model of described the first chip is TEA1753.
9. a television set is characterized in that, comprises each described overvoltage crowbar in the claim 1-8 item.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN 201220393808 CN202797938U (en) | 2012-08-10 | 2012-08-10 | Overvoltage protection circuit and TV set |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN 201220393808 CN202797938U (en) | 2012-08-10 | 2012-08-10 | Overvoltage protection circuit and TV set |
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CN202797938U true CN202797938U (en) | 2013-03-13 |
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CN 201220393808 Expired - Fee Related CN202797938U (en) | 2012-08-10 | 2012-08-10 | Overvoltage protection circuit and TV set |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110994967A (en) * | 2019-12-25 | 2020-04-10 | 深圳创维-Rgb电子有限公司 | Reverse switching circuit, television power supply and television |
CN111564144A (en) * | 2020-04-30 | 2020-08-21 | 深圳创维-Rgb电子有限公司 | Power supply switching control circuit and display device |
-
2012
- 2012-08-10 CN CN 201220393808 patent/CN202797938U/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110994967A (en) * | 2019-12-25 | 2020-04-10 | 深圳创维-Rgb电子有限公司 | Reverse switching circuit, television power supply and television |
CN111564144A (en) * | 2020-04-30 | 2020-08-21 | 深圳创维-Rgb电子有限公司 | Power supply switching control circuit and display device |
CN111564144B (en) * | 2020-04-30 | 2021-09-03 | 深圳创维-Rgb电子有限公司 | Power supply switching control circuit and display device |
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Legal Events
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130313 Termination date: 20150810 |
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EXPY | Termination of patent right or utility model |