CN202720425U - Liquid crystal display (LCD) panel and display device - Google Patents
Liquid crystal display (LCD) panel and display device Download PDFInfo
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- CN202720425U CN202720425U CN 201220325347 CN201220325347U CN202720425U CN 202720425 U CN202720425 U CN 202720425U CN 201220325347 CN201220325347 CN 201220325347 CN 201220325347 U CN201220325347 U CN 201220325347U CN 202720425 U CN202720425 U CN 202720425U
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- film transistor
- tft
- thin film
- ito
- liquid crystal
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Abstract
The utility model discloses a liquid crystal display (LCD) panel and a display device and belongs to the technical field of display. The LCD panel comprises anti-static indium zinc oxide and indium tin oxide (ITO), wherein the anti-static indium zinc oxide and ITO are arranged in a Pad area of the LCD panel. The anti-static ITO is covered on a drive signal line of an integrated circuit (IC). The LCD panel and the display device are connected with the anti-static ITO and a public electrode of an array base plate through the net-shaped anti-static ITO which is arranged on the Pad area of the panel, and an anti-static protective return circuit, so that the LCD panel and the display device can effectively perform static protection of a corresponding line in the Pad area, are beneficial to improving yield of panels, and reduce possibility of static damage.
Description
Technical field
The utility model relates to the display technique field, particularly a kind of liquid crystal panel and display device of electrostatic prevention damage.
Background technology
In TFT LCD(Thin Film Transistor (TFT) liquid crystal display) in the technique, because the existence of charged particle in the environment, in a single day this band point particle touches the circuit in the TFT LCD panel, will produce point discharge, this discharge is easy to make panel circuit and thin-film device breakdown, and then reduce the picture disply quality, show bad such as bright line, bright spot etc.Some are bad can repair some bad then unrepairables in subsequent technique.Even can repair, also can increase cost.The best way is exactly to improve yield by technique and technological improvement, reduction electrostatic damage probability.
Fig. 1 is existing liquid crystal panel structure schematic diagram, as shown in Figure 1, the drive signal line road that grid IC is arranged at the edge of the Pad of liquid crystal panel regional (exterior lateral area on border, viewing area 200 among Fig. 1), and array base palte public electrode lead-in wire and color membrane substrates public electrode lead-in wire, these circuits are not by the CF(color membrane substrates) on the ITO(indium zinc oxide) cover, do not obtain electrostatic screening, be easy to be subject to the impact of exterior static and damaged.
The utility model content
The technical matters that (one) will solve
The technical problems to be solved in the utility model is: a kind of liquid crystal panel and display device are provided, to avoid static the circuit in the Pad zone of liquid crystal panel are caused damage.
(2) technical scheme
For solving the problems of the technologies described above, the utility model provides a kind of liquid crystal panel, and it comprises: the electrostatic prevention indium zinc oxide ITO that is arranged on the Pad zone of described liquid crystal panel; The drive signal line road of described electrostatic prevention ITO covering gate IC.
Wherein, described electrostatic prevention ITO is reticulate texture.
Wherein, described electrostatic prevention ITO connects the public electrode of array base palte by the electrostatic protection loop.
Wherein, described electrostatic protection loop comprises: the first film transistor, the second thin film transistor (TFT), the 3rd thin film transistor (TFT), the 4th thin film transistor (TFT) and the 5th thin film transistor (TFT);
Grid and the source electrode of the transistorized source electrode of described the first film, the second thin film transistor (TFT), and the source electrode of the 3rd thin film transistor (TFT) is connected to each other formation the first tie point; The drain electrode of the transistorized drain electrode of the first film, the 4th thin film transistor (TFT), and the grid of the 5th thin film transistor (TFT) and drain electrode are connected to each other and form the second tie point; Grid and the source electrode of the drain electrode of the transistorized grid of the first film, the second thin film transistor (TFT), the grid of the 3rd thin film transistor (TFT) and drain electrode, the 4th thin film transistor (TFT), and the source electrode of the 5th thin film transistor (TFT) is connected to each other;
Described the first tie point connects described electrostatic prevention ITO, and described the second tie point connects the public electrode of described array base palte; Perhaps,
Described the second tie point connects described electrostatic prevention ITO, and described the first tie point connects the public electrode of described array base palte.
Wherein, described electrostatic prevention ITO also covers the public electrode lead-in wire of described array base palte and/or the public electrode lead-in wire of described color membrane substrates.
The utility model also provides a kind of display device, and it comprises described liquid crystal panel.
(3) beneficial effect
Liquid crystal panel of the present utility model and display device; by at the netted electrostatic prevention ITO of the Pad of panel region division; and connect described electrostatic prevention ITO by the antistatic protection loop; and the public electrode of array base palte; can effectively carry out electrostatic protection to the respective lines in Pad zone; be conducive to improve the panel yield, reduce the electrostatic damage probability.
Description of drawings
Fig. 1 is existing liquid crystal panel structure schematic diagram;
Fig. 2 is the described liquid crystal panel structure schematic diagram of the utility model embodiment;
Fig. 3 is the circuit diagram in the described electrostatic protection of the utility model embodiment loop;
Fig. 4 is the equivalent circuit diagram when the second thin film transistor (TFT) or the 3rd thin film transistor (TFT) are breakdown in the described electrostatic protection loop;
Fig. 5 is the equivalent circuit diagram when the 4th thin film transistor (TFT) or the 5th thin film transistor (TFT) are breakdown in the described electrostatic protection loop.
Embodiment
Below in conjunction with drawings and Examples, embodiment of the present utility model is described in further detail.Following examples are used for explanation the utility model, but are not used for limiting scope of the present utility model.
Fig. 2 is the described liquid crystal panel structure schematic diagram of the utility model embodiment, as shown in Figure 2, described liquid crystal panel comprises array base palte and color membrane substrates, is provided with electrostatic prevention ITO 101 in the Pad zone (being the exterior lateral area on border, viewing area 200) of described liquid crystal panel.
Described electrostatic prevention ITO 101 is mainly used in the drive signal line road 102 of covering gate IC 107, and the public electrode lead-in wire 104 of the public electrode of described array base palte lead-in wire 103 and described color membrane substrates.Simultaneously; because the different or change of liquid crystal panel structure; also may exist other circuit to be in the Pad zone; and do not covered by the ITO of color membrane substrates; at this moment in order to protect these circuits to exempt from electrostatic damage; shape or position that should the described electrostatic prevention ITO 101 of appropriate change be to protect accordingly.
As shown in Figure 2, described electrostatic prevention ITO 101 is reticulate texture, can reduce its coupling capacitance, prevents that coupling capacitance from impacting the circuit of respective regions.
Simultaneously, described electrostatic prevention ITO 101 also connects the public electrode of described array base palte by electrostatic protection loop 105, in order to discharge in time the entrained static of described electrostatic prevention ITO 101.
Fig. 3 is the circuit diagram in the described electrostatic protection of the utility model embodiment loop; as shown in Figure 3, described electrostatic protection loop comprises: the first film transistor T 1, the second thin film transistor (TFT) T2, the 3rd thin film transistor (TFT) T3, the 4th thin film transistor (TFT) T4 and the 5th thin film transistor (TFT) T5.
The grid of the source electrode of described the first film transistor T 1, the second thin film transistor (TFT) T2 and source electrode, and the source electrode of the 3rd thin film transistor (TFT) T3 is connected to each other formation the first tie point P; The drain electrode of the drain electrode of the first film transistor T 1, the 4th thin film transistor (TFT) T4, and the grid of the 5th thin film transistor (TFT) T5 and drain electrode are connected to each other and form the second tie point Q; The grid of the grid of the drain electrode of the grid of the first film transistor T 1, the second thin film transistor (TFT) T2, the 3rd thin film transistor (TFT) T3 and drain electrode, the 4th thin film transistor (TFT) T4 and source electrode, and the source electrode of the 5th thin film transistor (TFT) T5 is connected to each other.
Described the first tie point P connects described electrostatic prevention ITO 101, and described the second tie point Q connects the public electrode of described array base palte; Perhaps described the first tie point P connects the public electrode of described array base palte, and described the second tie point Q connects described electrostatic prevention ITO 101.
Suppose that described the first tie point P connects described electrostatic prevention ITO101 by first signal line A1; described the second tie point Q connects the public electrode of described array base palte by secondary signal line A2, the principle of work that the below simply introduces described antistatic protection loop 105 is as follows:
When producing static on the described electrostatic prevention ITO 101, the second thin film transistor (TFT) T2, the 3rd thin film transistor (TFT) T3, the first film transistor T 1, the 4th thin film transistor (TFT) T4 and the 5th thin film transistor (TFT) T5 open successively, and the shunt access of formation more than at least two is with the public electrode of Anti-static to described array base palte.Wherein, described shunt access comprises: A1-T2(T3)-T4(T5)-A2, A1-T1-A2.
Simultaneously, in the described electrostatic protection loop 105, even the part thin film transistor (TFT) is breakdown, still do not affect the 105 whole normal operations of described electrostatic protection loop.
Such as, when the second thin film transistor (TFT) T2 or the 3rd thin film transistor (TFT) T3 are breakdown, equivalent electrical circuit as shown in Figure 4, the grid of the first film transistor T 1 is equivalent to be directly connected to first signal line A1 at this moment, when producing static on the described electrostatic prevention ITO 101, the first film transistor T 1, the 4th thin film transistor (TFT) T4, the 5th successively conducting of thin film transistor (TFT) T5 are dredged public electrode to described array base palte with static through secondary signal line A2.
If when the 4th thin film transistor (TFT) T4 or the 5th thin film transistor (TFT) T5 are breakdown, equivalent electrical circuit as shown in Figure 5, the grid of the first film transistor T 1 is equivalent to be directly connected to secondary signal line A2 at this moment, when producing static on the described electrostatic prevention ITO 101, the second thin film transistor (TFT) T2, the 3rd thin film transistor (TFT) T3 and successively conducting of the first film transistor T 1 are dredged public electrode to described array base palte with static through secondary signal line A2.
Referring to Fig. 2; because the excellent specific property in described antistatic protection loop 105; its conduct static is adopted in many places in described liquid crystal panel, and public electrode and electrostatic protection bus 108 such as connect described array base palte by described antistatic protection loop 105 connect from described data I C
106 data lines of drawing and described electrostatic protection bus 108 connect the grid line of drawing from described grid IC 107 and described electrostatic protection bus 108 etc.
The utility model also provides a kind of display device that comprises described liquid crystal panel, and described display device can be LCD TV, computer monitor or mobile phone display screen etc.
The described liquid crystal panel of the utility model embodiment and display device; by at the netted electrostatic prevention ITO of the Pad of panel region division; and the public electrode that connects described electrostatic prevention ITO and array base palte by the antistatic protection loop; can effectively carry out electrostatic protection to the respective lines in Pad zone; be conducive to improve the panel yield, reduce the electrostatic damage probability.
Above embodiment only is used for explanation the utility model; and be not limitation of the utility model; the those of ordinary skill in relevant technologies field; in the situation that do not break away from spirit and scope of the present utility model; can also make a variety of changes and modification; therefore all technical schemes that are equal to also belong to category of the present utility model, and scope of patent protection of the present utility model should be defined by the claims.
Claims (6)
1. a liquid crystal panel is characterized in that, comprising: the electrostatic prevention indium zinc oxide ITO that is arranged on the Pad zone of described liquid crystal panel; The drive signal line road of described electrostatic prevention ITO covering gate IC.
2. liquid crystal panel as claimed in claim 1 is characterized in that, described electrostatic prevention ITO is reticulate texture.
3. liquid crystal panel as claimed in claim 1 is characterized in that, described electrostatic prevention ITO connects the public electrode of array base palte by the electrostatic protection loop.
4. liquid crystal panel as claimed in claim 3 is characterized in that, described electrostatic protection loop comprises: the first film transistor, the second thin film transistor (TFT), the 3rd thin film transistor (TFT), the 4th thin film transistor (TFT) and the 5th thin film transistor (TFT);
Grid and the source electrode of the transistorized source electrode of described the first film, the second thin film transistor (TFT), and the source electrode of the 3rd thin film transistor (TFT) is connected to each other formation the first tie point; The drain electrode of the transistorized drain electrode of the first film, the 4th thin film transistor (TFT), and the grid of the 5th thin film transistor (TFT) and drain electrode are connected to each other and form the second tie point; Grid and the source electrode of the drain electrode of the transistorized grid of the first film, the second thin film transistor (TFT), the grid of the 3rd thin film transistor (TFT) and drain electrode, the 4th thin film transistor (TFT), and the source electrode of the 5th thin film transistor (TFT) is connected to each other;
Described the first tie point connects described electrostatic prevention ITO, and described the second tie point connects the public electrode of described array base palte; Perhaps,
Described the second tie point connects described electrostatic prevention ITO, and described the first tie point connects the public electrode of described array base palte.
5. liquid crystal panel as claimed in claim 3 is characterized in that, described electrostatic prevention ITO also covers the public electrode lead-in wire of described array base palte and/or the public electrode lead-in wire of color membrane substrates.
6. a display device is characterized in that, comprises the described liquid crystal panel of one of claim 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220325347 CN202720425U (en) | 2012-07-05 | 2012-07-05 | Liquid crystal display (LCD) panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220325347 CN202720425U (en) | 2012-07-05 | 2012-07-05 | Liquid crystal display (LCD) panel and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202720425U true CN202720425U (en) | 2013-02-06 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220325347 Expired - Lifetime CN202720425U (en) | 2012-07-05 | 2012-07-05 | Liquid crystal display (LCD) panel and display device |
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| Country | Link |
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| CN (1) | CN202720425U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108267904A (en) * | 2016-12-30 | 2018-07-10 | 乐金显示有限公司 | Display panel |
| CN109375439A (en) * | 2018-12-20 | 2019-02-22 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN112530937A (en) * | 2020-12-02 | 2021-03-19 | Tcl华星光电技术有限公司 | Electrostatic protection circuit and display panel |
| CN113835253A (en) * | 2021-09-09 | 2021-12-24 | 浙江泰嘉光电科技有限公司 | Transparent electrode and liquid crystal panel with electrostatic protection function |
-
2012
- 2012-07-05 CN CN 201220325347 patent/CN202720425U/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108267904A (en) * | 2016-12-30 | 2018-07-10 | 乐金显示有限公司 | Display panel |
| CN109375439A (en) * | 2018-12-20 | 2019-02-22 | 武汉华星光电技术有限公司 | Array substrate and display panel |
| CN112530937A (en) * | 2020-12-02 | 2021-03-19 | Tcl华星光电技术有限公司 | Electrostatic protection circuit and display panel |
| WO2022116307A1 (en) * | 2020-12-02 | 2022-06-09 | Tcl华星光电技术有限公司 | Electrostatic protection circuit and display panel |
| CN112530937B (en) * | 2020-12-02 | 2022-09-27 | Tcl华星光电技术有限公司 | Electrostatic protection circuit and display panel |
| US11776457B2 (en) | 2020-12-02 | 2023-10-03 | Tcl China Star Optoelectronics Technology Co., Ltd | Electrostatic protection circuit and display panel |
| CN113835253A (en) * | 2021-09-09 | 2021-12-24 | 浙江泰嘉光电科技有限公司 | Transparent electrode and liquid crystal panel with electrostatic protection function |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130206 |