CN202633285U - Lower packaging body structure of package on package - Google Patents
Lower packaging body structure of package on package Download PDFInfo
- Publication number
- CN202633285U CN202633285U CN2012202211709U CN201220221170U CN202633285U CN 202633285 U CN202633285 U CN 202633285U CN 2012202211709 U CN2012202211709 U CN 2012202211709U CN 201220221170 U CN201220221170 U CN 201220221170U CN 202633285 U CN202633285 U CN 202633285U
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- packaging body
- chip
- stacked package
- support plate
- body structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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- Packaging Frangible Articles (AREA)
Abstract
The utility model discloses a lower packaging body structure of a package on package. The structure comprises a substrate, wherein the substrate has an upper surface; at least one chip is arranged on the upper surface of the substrate, and is electrically connected to the substrate; a plurality of welding pads are arranged on the upper surface of the substrate; and a reinforced metal ring is arranged on the upper surface of the substrate, and is arranged between the chip and the welding pads. The reinforced metal ring is used to prevent the lower packaging body structure of the package on package from warping due to thermal expansion and contraction.
Description
Technical field
The utility model relates to a kind of packaging structure, particularly relevant for a kind of packaging structure of following packaging body of stacked package.
Background technology
Now; Along with the size of electronic installation reduces; The semiconductor packages industry is in order to satisfy the demand of various high-density packages; Develop the package design that various different types gradually, (system in package, SIP) design concept is usually used in framework high-density packages product to wherein various system in package.In recent years, stack type semiconductor (package on package, POP) encapsulation have been introduced to various electronic apparatus application etc.The encapsulation of this kind stack type semiconductor is that a plurality of semiconductor packaging structures of accomplishing packaging technology are respectively formed an encapsulation integral body through piling up, thereby has reduced whole package dimension.
Yet; Said stack type semiconductor is encapsulated in still has following problems in the actual use, for example: in order to reduce whole packaging height (for example less than 1 millimeter), the employed support plate of this kind stack type package structure; Particularly descend the support plate of packaging body, its thickness also need meet the trend of slimming.Because the adhesive body material thermal coefficient of expansion (CTE) between the two of the material of support plate of packaging body own and support plate top does not match down; Therefore in manufacture process and when in use producing high temperature; The support plate of following packaging body promptly expands with heat and contract with cold easily and warpage (warpage) takes place; Thereby cause as chip burst apart (crack), problem such as support plate rupture of line, and seriously influence the quality and the yields (yield) of chip reliability and encapsulation process.
So, be necessary to provide a kind of packaging structure, to solve the existing in prior technology problem.
The utility model content
In view of this, the utility model provides a kind of packaging structure, to solve packaging body warpage issues under the existing in prior technology stacked package.
The main purpose of the utility model is to provide a kind of following packaging body structure of stacked package; It can the balance stacked package under support plate and the thermal coefficient of expansion between the adhesive body material of packaging body; Reduce the probability of support plate warpage; With the reliability and stability that increases packaging body, and the quality and the yields of raising encapsulation process.
For reaching the aforementioned purpose of the utility model, the utility model one embodiment provides a kind of following packaging body structure of stacked package, and wherein the packaging body structure comprises under institute's stacked package: a support plate, at least one chip, several weld pads and a reinforced metal ring.Said support plate comprises a upper surface.Said at least one chip is positioned at said upper surface of said carrier plate and is electrically connected to said support plate.Said several weld pads are positioned at said upper surface of said carrier plate.Said reinforced metal ring is positioned at said upper surface of said carrier plate, and is arranged between said chip and the said weld pad.
Moreover the utility model one embodiment provide another kind of stacking and packaging construction, and wherein said stacking and packaging construction comprises: packaging body on the packaging body and once.Said packaging body down comprises: a support plate, at least one chip, several weld pads and a reinforced metal ring.Said support plate comprises a upper surface.Said at least one chip is positioned at said upper surface of said carrier plate and is electrically connected to said support plate.Said several weld pads are positioned at said upper surface of said carrier plate.Said reinforced metal ring is positioned at said upper surface of said carrier plate, and is arranged between said chip and the said weld pad.The said packaging body of going up is electrically connected to the said support plate of packaging body down through said weld pad.
Compared with prior art; The packaging structure of the utility model; The support plate of packaging body and the thermal coefficient of expansion between the packaging plastic material under like this can the balance stacked package; Thereby reduce the support plate warpage probability of packaging body under the stacked package, increase the reliability and stability of packaging body, and improve the quality and the yields of encapsulation process.
Description of drawings
Fig. 1 is the sketch map of the following packaging body structure of the utility model one embodiment stacked package.
Figure 1A is the local enlarged diagram of the following packaging body structure of the utility model one embodiment stacked package.
Fig. 2 is the sketch map before the assembling of the utility model one embodiment stacking and packaging construction.
Fig. 3 is the sketch map of the utility model one embodiment stacking and packaging construction.
Fig. 4 is the local enlarged diagram of the following packaging body structure of another embodiment stacked package of the utility model.
Fig. 5 is the local enlarged diagram of the following packaging body structure of the another embodiment stacked package of the utility model.
Embodiment
For making the utility model above-mentioned purpose, characteristic and advantage more obviously understandable, hereinafter is special lifts the utility model preferred embodiment, and conjunction with figs., elaborates as follows.Moreover, the direction term that the utility model is mentioned, for example " on ", D score, " preceding ", " back ", " left side ", " right side ", " interior ", " outward ", " side " etc., only be direction with reference to annexed drawings.Therefore, the direction term of use is in order to explanation and understands the utility model, but not in order to restriction the utility model.
Fig. 1 is the sketch map that the following packaging body of the stacked package of the utility model one embodiment is constructed, and Figure 1A is the partial enlarged drawing of Fig. 1.Please with reference to shown in Fig. 1 and Figure 1A, the following packaging body structure 100 of the utility model one embodiment mainly comprises support plate 110, chip 120, projection (bumps) 130, primer 140, first metal ball 150, adhesive body 160, reinforced metal ring 170 and tin ball 180.
In the present embodiment, support plate 110 is in order to carries chips 120, and chip 120 is electrically connected to support plate 110 through projection 130 with flip-chip (flip chip) mode, and primer 140 is in order to fill the gap between chip 120 and the support plate 110.First metal ball 150 is positioned at the upper surface 115 of support plate 110; Reinforced metal ring 170 also is positioned at the upper surface 115 of support plate 110; And adhesive body 160 coating chips 120, reinforced metal ring 170, and form groove 190 in the position of first metal ball 150 and expose first metal ball 150 and electrically connect in order to packaging body on.
More detailed; In the present embodiment, support plate 110 can be an organic substrate (organic substrate), comprises line layer 111, core layer 112, solder mask 113, via 114, insulating barrier 117 and weld pad 118; Wherein core layer 112 is an intermediate layer; Line layer 111 is positioned at the upper and lower surface of core layer 112 in order to conduction, conducted signal or ground connection, generally formed by the copper foil layer etching, and the line layer 111 of upper and lower surface electrically connects through via 114; Generally be coated with conductive material in the via 114, like copper etc.At the upper surface or the lower surface of core layer 112, line layer 111 have two-layer or more than, can in addition be folded with insulating barrier 117 between the adjacent two-layer line layer 111 this moment.Then has solder mask 113 between the adjacent lines of same line layer 111, in order to insulate and to protect.Weld pad 118 exposes to the open air out in upper surface 115, is electrically connected to support plate 110 in order to place first conductive metal balls, 150, the first conductive metal balls 150 through weld pad 118.Line layer 111 and solder mask 113 only are in order to signal in Fig. 1 and Figure 1A, do not represent the design of its practical layout.Forming several tin balls 180 on support plate 110 lower surfaces on 116 externally electrically connects.But the present invention is not limited to this, and support plate 110 is the support plate of other type also, like ceramic support plate (ceramic substrate) or lead frame (leadframe), also can externally electrically connect through pin (lead) or stitch modes such as (pin).
In the present embodiment; Chip 120 electrically connects with upside-down mounting mode and support plate 110 through projection 130; Primer 140 still is not limited to this in order to fill the gap between chip 120 and the support plate 110, for example also can adopt like routing mode (wire bonding) to engage.Simultaneously, also can comprise a plurality of chips 120 in the following packaging body structure 100, and can select above pile up down or the mode of level adjacency is positioned on the upper surface 115 of support plate 110.
In the present embodiment, weld pad 118 is positioned at the marginal position of support plate 110 upper surfaces 115, and around (around) zone at chip 120 place, wherein weld pad 118 for example can use the mode of array (array) be arranged in chip 120 places the zone around.But the present invention is not limited to this kind layout type, the quantity of weld pad 118 and around the number of plies also can do corresponding adjustment according to the demand of design, and weld pad 118 can be positioned at any position of the upper surface 115 of support plate 110 according to design demand.Moreover; Adhesive body 160 is positioned at support plate 110 upper surfaces 115 sides, in order to coating chip 120, reinforced metal ring 170, and at the position of weld pad 118 formation groove 190; To expose weld pad 118, in order to electrically connect through packaging body on weld pad 118 and placement first metal ball 150 and on it.
In the present embodiment, reinforced metal ring 170 is positioned at support plate 110 upper surfaces 115, and is arranged at the zone between weld pad 118 and the chip 120, this kind layout better under the balance integrated stress of packaging body structure 100 distribute.The present invention can do the adjustment of corresponding placement position and shape according to the layout needs of weld pad 118 on the upper surface 115 of support plate 110 to reinforced metal ring 170.In the present embodiment, the height of reinforced metal ring 170 is not limit, can be higher than, be less than or equal to chip 120 and be positioned over the height on the support plate 110, after will describe to some different designs among the embodiment that states, repeat no more here.Moreover the width of reinforced metal ring 170 designs according to the gap width between weld pad 118 and the chip 120.Reinforced metal ring 170 does not have fixed shape; Can be a ring-shaped continuous structure; Or discontinuous structure; The cross section of reinforced metal ring 170 can be a rectangle, circle, trapezoidal, triangle or other arbitrary shape, and the plan view shape of reinforced metal ring 170 can also be a rectangle, circle, trapezoidal, triangle or other arbitrary shape.
Fig. 2 is the preceding sketch map of stacking and packaging construction assembling of the utility model one embodiment, and Fig. 3 is the sketch map of the stacking and packaging construction of the utility model one embodiment.Please with reference to Fig. 2 and shown in Figure 3, stacking and packaging construction 300 is to be piled up with last packaging body structure 200 by following packaging body structure 100 to form.Last packaging body structure 200 comprises second metal ball 250, electrically connects through second metal ball 250 and following packaging body structure 100.Last packaging body structure 200 can be the packing forms of any kind, only needs to form second metal ball 250 in lower surface and gets final product.After packaging body structure 100 is placed through groove 190 contrapositions with last packaging body structure 200 down; Then can first metal ball 150 be combined with second metal ball 250 through modes such as reflows; So can between packaging body structure 100 under the stacked package and last packaging body structure 200, form conductive pole 310 and electrically connect, and accomplish the assembling of stacking and packaging construction 300 with realization.In the present embodiment, last packaging body structure 200 also can adopt and following packaging body structure 100 similar structures, so that upwards pile up more encapsulating structure again.
Please with reference to shown in Figure 4; The local enlarged diagram of the following packaging body structure of the stacked package of another embodiment of the utility model; In the present embodiment, the height of reinforced metal ring 170 is designed to be higher than the height after chip 120 is positioned over support plate 110, after utilizing adhesive body 160 to cover chip 120 and reinforced metal ring 170; Can pass through a grinding steps, grind and remove a part of adhesive body 160 of packaging body structure 100 down.After grinding, the upper surface 161 of the adhesive body 160 of packaging body structure 100 exposes the upper surface 171 of reinforced metal ring 170 under final the formation.In the present embodiment, the upper surface 171 of reinforced metal ring 170 is exposed to outside the adhesive body 160, therefore can increase the radiating efficiency that the support plate 110 that descends packaging body structure 100 is dispelled the heat.
Please refer to please with reference to shown in Figure 5; The local enlarged diagram of the following packaging body structure of the stacked package of the another embodiment of the utility model; In the present embodiment, the height of reinforced metal ring 170 is designed to be greater than or equal to the height after chip 120 is positioned over support plate 110, after utilizing adhesive body 160 to cover chip 120 and reinforced metal ring 170; Can pass through a grinding steps, grind and remove a part of adhesive body 160 of packaging body structure 100 down.After grinding, the upper surface 161 of the adhesive body 160 of packaging body structure 100 exposes the upper surface 171 of reinforced metal ring 170 and the upper surface 121 of chip 120 simultaneously under final the formation.In the present embodiment, the upper surface 171 of reinforced metal ring 170 all is exposed to outside the adhesive body 160 with the upper surface 121 of chip 120, therefore can further increase the radiating efficiency that the support plate 110 that descends packaging body structure 100 is dispelled the heat.
As stated; Though can reduce encapsulation volume, increase packaging density compared to existing stack type package structure; The warpage of Chang Yinwei encapsulating structure also, and cause shortcomings such as chip bursts apart, the support plate circuit bursts apart, the packaging body structure is through having increased reinforced metal ring 170 under the stacked package of the utility model of Fig. 1 on said support plate 110; It can effectively improve the excessive support plate that causes 110 warpage issues of thermal expansion coefficient difference between support plate 110 and the adhesive body 160 really; Through reducing the probability of support plate 110 warpages, and then improve the reliability and stability of encapsulation, and improve the quality and the yields of encapsulation process.
The utility model is described by above-mentioned related embodiment, yet the foregoing description is merely the example of implementing the utility model.Must be pointed out that disclosed embodiment does not limit the scope of the utility model.On the contrary, being contained in the spirit of claims and the modification and impartial setting of scope includes in the scope of the utility model.
Claims (10)
1. the following packaging body of a stacked package is constructed, and it is characterized in that: the following packaging body structure of said stacked package comprises:
One support plate comprises a upper surface;
At least one chip is positioned at said upper surface of said carrier plate and is electrically connected to said support plate;
Several weld pads are positioned at said upper surface of said carrier plate; And
One reinforced metal ring is positioned at said upper surface of said carrier plate, and is arranged between said chip and the said weld pad.
2. the following packaging body of stacked package as claimed in claim 1 is constructed, and it is characterized in that: said chip is positioned at a chip put area of said upper surface of said carrier plate, and said reinforced metal ring is around said chip put area.
3. the following packaging body of stacked package as claimed in claim 1 is constructed, and it is characterized in that: said reinforced metal ring is a continuous structure or a discontinuous structure.
4. the following packaging body of stacked package as claimed in claim 1 is constructed; It is characterized in that: the following packaging body structure of said stacked package more comprises several first conductive metal balls and is positioned at described upper surface, and said first conductive metal balls is electrically connected to said support plate in abutting connection with said weld pad and through said weld pad.
5. the following packaging body of stacked package as claimed in claim 4 is constructed; It is characterized in that: the following packaging body structure of said stacked package more comprises an adhesive body; Coat at least the said chip of part, the said reinforced metal ring of part at least, and expose said first conductive metal balls.
6. the following packaging body of stacked package as claimed in claim 5 is constructed, and it is characterized in that: said adhesive body exposes a upper surface of said reinforced metal ring.
7. the following packaging body of stacked package as claimed in claim 5 is constructed, and it is characterized in that: said adhesive body exposes a upper surface of said chip.
8. the following packaging body of stacked package as claimed in claim 4 is constructed; It is characterized in that: said first conductive metal balls is in order to packaging body structure on the following packaging body structure and that electrically connects said stacked package; The said packaging body structure of going up comprises several second conductive metal balls, to electrically connect said first conductive metal balls of packaging body structure down.
9. the following packaging body of stacked package as claimed in claim 1 is constructed, and it is characterized in that: the material of said reinforced metal ring is selected from copper ring, aluminium ring or its alloy ring body.
10. stacking and packaging construction, it is characterized in that: said stacking and packaging construction comprises:
Packaging body once, it comprises:
One support plate comprises a upper surface;
At least one chip is positioned at said upper surface of said carrier plate and is electrically connected to said support plate;
Several weld pads are positioned at said upper surface of said carrier plate; And
One reinforced metal ring is positioned at said upper surface of said carrier plate, and is arranged between said chip and the said weld pad; And
Packaging body on one is electrically connected to the said support plate of packaging body down through said weld pad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012202211709U CN202633285U (en) | 2012-05-17 | 2012-05-17 | Lower packaging body structure of package on package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012202211709U CN202633285U (en) | 2012-05-17 | 2012-05-17 | Lower packaging body structure of package on package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202633285U true CN202633285U (en) | 2012-12-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2012202211709U Expired - Lifetime CN202633285U (en) | 2012-05-17 | 2012-05-17 | Lower packaging body structure of package on package |
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| CN (1) | CN202633285U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104201156A (en) * | 2014-08-08 | 2014-12-10 | 天水华天科技股份有限公司 | Substrate based bumped flip chip CSP (Chip Scale Package) package part, substrate and manufacturing method |
| CN107910314A (en) * | 2017-12-12 | 2018-04-13 | 苏州日月新半导体有限公司 | Integrated circuit package body and its manufacture method |
| CN110168717A (en) * | 2017-10-20 | 2019-08-23 | 华为技术有限公司 | A kind of chip-packaging structure and packaging method |
| TWI686907B (en) * | 2016-07-20 | 2020-03-01 | 台灣積體電路製造股份有限公司 | Semiconductor package and manufacturing method thereof |
| WO2020199064A1 (en) * | 2019-03-30 | 2020-10-08 | 华为技术有限公司 | Chip package, terminal device, and preparation method |
-
2012
- 2012-05-17 CN CN2012202211709U patent/CN202633285U/en not_active Expired - Lifetime
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104201156A (en) * | 2014-08-08 | 2014-12-10 | 天水华天科技股份有限公司 | Substrate based bumped flip chip CSP (Chip Scale Package) package part, substrate and manufacturing method |
| TWI686907B (en) * | 2016-07-20 | 2020-03-01 | 台灣積體電路製造股份有限公司 | Semiconductor package and manufacturing method thereof |
| CN110168717A (en) * | 2017-10-20 | 2019-08-23 | 华为技术有限公司 | A kind of chip-packaging structure and packaging method |
| CN110168717B (en) * | 2017-10-20 | 2021-08-20 | 华为技术有限公司 | Chip packaging structure and packaging method |
| US11309227B2 (en) | 2017-10-20 | 2022-04-19 | Huawei Technologies Co., Ltd. | Chip package structure having a package substrate disposed around a die |
| CN107910314A (en) * | 2017-12-12 | 2018-04-13 | 苏州日月新半导体有限公司 | Integrated circuit package body and its manufacture method |
| WO2020199064A1 (en) * | 2019-03-30 | 2020-10-08 | 华为技术有限公司 | Chip package, terminal device, and preparation method |
| CN113348551A (en) * | 2019-03-30 | 2021-09-03 | 华为技术有限公司 | Chip package, terminal equipment and preparation method |
| CN113348551B (en) * | 2019-03-30 | 2023-12-29 | 华为技术有限公司 | Chip packaging, terminal equipment and preparation method |
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