CN202587560U - High-power electronic ballast - Google Patents
High-power electronic ballast Download PDFInfo
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- CN202587560U CN202587560U CN 201220207437 CN201220207437U CN202587560U CN 202587560 U CN202587560 U CN 202587560U CN 201220207437 CN201220207437 CN 201220207437 CN 201220207437 U CN201220207437 U CN 201220207437U CN 202587560 U CN202587560 U CN 202587560U
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Abstract
The utility mode relates to a high-power electronic ballast which uses an active secondary detection technology to suppress a surge current and realizes soft start. The high-power electronic ballast comprises an EMI filter circuit, a rectification circuit, an MCU control circuit, a sampling detection circuit, and a half-bridge inverter circuit. An output terminal of the rectification circuit is connected with one end of a first inductor L11. The other end of the first inductor is respectively connected with a drain electrode D of a field effect transistor and a positive electrode of a diode D11. A negative electrode of the diode D11 is respectively connected with one end of a second resistor R12 and one end of a first resistor R11. The other end of the second resistor R12 is respectively connected with one end of a third resistor R13 and the sampling detection circuit. When a power supply is turned on, the start surge current is suppressed through the resistor R11; then the sampling circuit carries out secondary detection; and when the voltage reaches 400 V, the control circuit sends an instruction to make the half-bridge inverter circuit work, so that the surge current suppressing and the soft start are realized in the real sense.
Description
Technical field
The utility model relates to the great-power electronic ballast technical field, is specifically related to a kind of great-power electronic ballast that adopts active secondary detection technology to suppress surge current, realization soft start.
Background technology
Great-power electronic ballast generally adopts Active Power Factor Correction Technology when start powers up, because the charging of filter capacitor can produce very big surge current.At present, suppress the impact of start surge current on the market in the high-power HID electric ballast following 3 kinds of schemes arranged:
First kind is to adopt single negative temperature coefficient NTC thermistor to suppress the power connection surge current impact of moment; Like Fig. 1, in energized moment, its resistance of NTC thermistor is higher; Be used for producing lower surge current when logical rigidly connecting; And thermistor can heat by nature under normal operative condition, and its resistance also drops to the work resistance thereupon, can avoid more consumption.Less for low power electric ballast operating current, loss is little, but autophage is bigger in great-power electronic ballast, and temperature rise is also very big, and is obviously improper.Especially work as power cutoff and reclosing fast, thermistor is cooling fully also, with the function of forfeiture surge inhibition, thereby loses the protection to electric ballast.
Second kind is to be employed in the bridge rectifier front end to place relay (or bidirectional triode thyristor) and resistance R parallel way, as shown in Figure 2.During start, suppress surge current through R, accomplish charging through delay circuit to capacitor C 1 after, the relay adhesive, resistance R is bypassed by relay, thereby the power consumption when reducing to move fully.This is the common method that present great-power electronic ballast suppresses surge current.But when when voltage is low; Owing to adopt the electric ballast of APFC to have constant output characteristic, the electric current through relay contact will increase, and makes that relay contact may be by scorification; Thereby make the lost of life of relay, reduce the useful life of electric ballast indirectly.
The third is in APFC, to adopt the parallelly connected power connection surge impact of moment that suppresses with resistance R of relay (or bidirectional triode thyristor); As shown in Figure 3; Because boosting mode is generally adopted in the electric ballast APFC, is promoted to 400V, like this when operate as normal; Descend significantly through the relay contact electric current, increased the useful life of relay.But the connection of this mode, when the input power connection, pfc circuit can be promoted to 400V with electrochemical capacitor C1 voltage in a short period of time; Suppress effect for reaching preferably surge current, often the value of resistance R all can reach about 10 ohm, in the time of near connecting the peak value that moment is in alternating current; When capacitor C 1 voltage reached 400V, the instantaneous voltage amplitude at resistance R two ends may reach more than the 100V, at this moment; The magnitude of voltage that bears between the source electrode of MOSFET pipe and the drain electrode reaches more than the 500V; The withstand voltage that surpasses the MOSFET pipe possibly damage the MOSFET pipe, shortens the useful life of electric ballast.
Summary of the invention
The purpose of the utility model provides a kind of great-power electronic ballast that adopts active secondary detection technology to suppress surge current, realization soft start, thereby can prolong the life-span of ballast and HID fluorescent tube.
For realizing the foregoing invention purpose; The utility model has adopted following technical scheme: a kind of great-power electronic ballast; Comprise the EMI filter circuit and the rectification circuit series connection of series connection; The output of rectification circuit is connected with an end of first inductance L 11; The other end of first inductance L 11 is connected with the drain D of FET QE, the positive pole of diode D11 respectively; It is characterized in that: the grid G of FET QE is connected with the MCU control circuit through the PFC booster circuit, and the negative pole of diode D11 is connected with an end of second resistance R 12, an end of first resistance R 11 respectively, and the other end of second resistance R 12 is connected with sample detecting circuit 40 with an end of the 3rd resistance R 13 respectively; The other end of first resistance R 11 is connected with positive pole, the half-bridge inversion circuit of first capacitor C 11 respectively, and the two ends of first resistance R 11 are parallel with a pair of normally opened contact of relay K; Half-bridge inversion circuit is connected with an end of second inductance L 12; The other end of second inductance L 12 is connected with an end of second capacitor C 12, the end of HID lamp H respectively, the equal ground connection of an end of the other end of an end of rectification circuit, the substrate of FET QE and source S, the 3rd resistance R 13, the negative pole of first capacitor C 11, half-bridge inversion circuit; The equal ground connection of the other end of the other end of second capacitor C 12, HID lamp H.
Described FET QE is the P-channel enhancement type isolated gate FET.
Behind power connection, suppress the start surge currents through resistance R 11, sample circuit detects the total voltage of resistance R 11 and capacitor C 11 for the first time simultaneously, because before the variation of sampling location was adjusted to resistance R 11, sampled voltage no longer was the voltage of traditional C1.When total voltage reached 400V, APFC was automatically accomplished the control to 400V, guaranteed can not puncture MOSFET, and control circuit is given an order and let the relay adhesive simultaneously, with resistance R 11 bypasses; After this sample circuit carries out the second time and detects, (this moment since R11 by bypass, detected value is the terminal voltage of capacitor C 11; This moment, voltage possibly be lower than 400V; APFC is adjusted to 400V with voltage automatically), when voltage reached 400V, control circuit sent instruction; Make half-bridge inversion circuit work, realize truly inhibition surge current and soft start.
Description of drawings
Fig. 1-the 3rd, the circuit theory diagrams of three kinds of concrete schemes of the prior art;
Fig. 4 is the circuit theory diagrams of the utility model.
Embodiment
A kind of great-power electronic ballast; It comprises EMI filter circuit 10, rectification circuit 20, MCU control circuit 50, sample detecting circuit 40, half-bridge inversion circuit 60, first inductance L 11, second inductance L 12, diode D11, FET QE, first resistance R 11, second resistance R 12, the 3rd resistance R 13, relay K, first capacitor C 11, second capacitor C 12 and HID lamp H; The EMI filter circuit 10 of series connection and rectification circuit 20 series connection; The output of rectification circuit 20 is connected with an end of first inductance L 11; The other end of first inductance L 11 is connected with the drain D of FET QE, the positive pole of diode D11 respectively; It is characterized in that: the grid G of FET QE is connected with MCU control circuit 50 through PFC booster circuit 30; The negative pole of diode D11 is connected with an end of second resistance R 12, an end of first resistance R 11 respectively; The other end of second resistance R 12 is connected with sample detecting circuit 40 with an end of the 3rd resistance R 13 respectively, and the other end of first resistance R 11 is connected with positive pole, the half-bridge inversion circuit 60 of first capacitor C 11 respectively, and the two ends of first resistance R 11 are parallel with a pair of normally opened contact of relay K; Half-bridge inversion circuit 60 is connected with an end of second inductance L 12; The other end of second inductance L 12 is connected with an end of second capacitor C 12, the end of HID lamp H respectively, the equal ground connection of an end of the other end of an end of rectification circuit 20, the substrate of FET QE and source S, the 3rd resistance R 13, the negative pole of first capacitor C 11, half-bridge inversion circuit 60; The equal ground connection of the other end of the other end of second capacitor C 12, HID lamp H.
Described FET QE is the P-channel enhancement type isolated gate FET.
The workflow of the utility model is: civil power AC 220V is the electromagnetic interference that electromagnetic interference filter circuit filtering suppresses electrical network through EMI filter circuit 10; After the Schottky rectification module rectification that rectification circuit 20 promptly is made up of 4 diodes, giving PFC booster circuit 30 is the circuit of power factor correction power supply; The input signal of MCU control circuit 50 is provided by PFC booster circuit 30 and 70 of semi-bridge inversion control circuits; The MOSFET pipe is that the coral utmost point G of field effect pipe QE links to each other with PFC booster circuit 30; Drain D is connected on the positive pole of diode D11, source S ground connection.After diode D11 boosts, be divided into two-way, wherein one the tunnel through resistance R 12, R13 series connection flow direction ground, and sample circuit is delivered to MCU control circuit 50 from R12, the middle number of winning the confidence of R13; The relay K that another road process is parallel with one another and the anode of first resistance R, 11 to first capacitor C 11, the negativing ending grounding of C11, half-bridge inversion circuit 60 is connected in parallel on the two ends of C11, by 70 controls of semi-bridge inversion control circuit.The output plus terminal of half-bridge inversion circuit 60 connects second inductance L 12, negativing ending grounding.The other end of L12 is connected with the HID lamp, the other end ground connection of HID lamp, and second capacitor C 12 is connected in parallel on HID lamp two ends.
The utility model can solve three kinds of puzzlements that mode is brought in the background technology well; Adopt the active secondary detection technology of relay to suppress the great-power electronic ballast of surge current, realization soft start of starting shooting, thereby can prolong the life-span of ballast and HID fluorescent tube.
Claims (2)
1. great-power electronic ballast; Comprise the EMI filter circuit (10) and rectification circuit (20) series connection of series connection; The output of rectification circuit (20) is connected with an end of first inductance L 11; The other end of first inductance L 11 is connected with the drain D of FET QE, the positive pole of diode D11 respectively; It is characterized in that: the grid G of FET QE is connected with MCU control circuit (50) through PFC booster circuit (30), and the negative pole of diode D11 is connected with an end of second resistance R 12, an end of first resistance R 11 respectively, and the other end of second resistance R 12 is connected with sample detecting circuit (40) with an end of the 3rd resistance R 13 respectively; The other end of first resistance R 11 is connected with positive pole, the half-bridge inversion circuit (60) of first capacitor C 11 respectively, and the two ends of first resistance R 11 are parallel with a pair of normally opened contact of relay K; Half-bridge inversion circuit (60) is connected with an end of second inductance L 12; The other end of second inductance L 12 is connected with an end of second capacitor C 12, the end of HID lamp H respectively, the equal ground connection of an end of the other end of an end of rectification circuit (20), the substrate of FET QE and source S, the 3rd resistance R 13, the negative pole of first capacitor C 11, half-bridge inversion circuit (60); The equal ground connection of the other end of the other end of second capacitor C 12, HID lamp H.
2. great-power electronic ballast according to claim 1 is characterized in that: described FET QE is the P-channel enhancement type isolated gate FET.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220207437 CN202587560U (en) | 2012-05-10 | 2012-05-10 | High-power electronic ballast |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220207437 CN202587560U (en) | 2012-05-10 | 2012-05-10 | High-power electronic ballast |
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| Publication Number | Publication Date |
|---|---|
| CN202587560U true CN202587560U (en) | 2012-12-05 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220207437 Expired - Lifetime CN202587560U (en) | 2012-05-10 | 2012-05-10 | High-power electronic ballast |
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| Country | Link |
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| CN (1) | CN202587560U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102665369A (en) * | 2012-05-10 | 2012-09-12 | 合肥大明节能科技有限公司 | High-power electronic ballast |
| CN115912899A (en) * | 2023-02-20 | 2023-04-04 | 广东东菱电源科技有限公司 | Capacitor series voltage division circuit |
-
2012
- 2012-05-10 CN CN 201220207437 patent/CN202587560U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102665369A (en) * | 2012-05-10 | 2012-09-12 | 合肥大明节能科技有限公司 | High-power electronic ballast |
| CN115912899A (en) * | 2023-02-20 | 2023-04-04 | 广东东菱电源科技有限公司 | Capacitor series voltage division circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee | ||
| CP03 | Change of name, title or address |
Address after: 4 building, No. 6, Zhenxing Road, Shushan new industrial park, Anhui, Hefei, 230031 Patentee after: HEFEI MING ENERGY-SAVING TECHNOLOGY Co.,Ltd. Address before: Zhenxin road Shushan District of Hefei City, Anhui province 230031 6 4 floor Patentee before: Hefei Daming Energy-Saving Technology Co.,Ltd. |
|
| CP03 | Change of name, title or address |
Address after: 230031 4th floor, No.6 Zhenxing Road, Shushan new industrial park, Hefei City, Anhui Province Patentee after: Hefei Daming Zhilian Technology Co.,Ltd. Address before: 230031 4th floor, No.6 Zhenxing Road, Shushan new industrial park, Hefei City, Anhui Province Patentee before: HEFEI MING ENERGY-SAVING TECHNOLOGY Co.,Ltd. |
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| CP03 | Change of name, title or address | ||
| CX01 | Expiry of patent term |
Granted publication date: 20121205 |
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| CX01 | Expiry of patent term |