CN202584692U

CN202584692U - LCD controller

Info

Publication number: CN202584692U
Application number: CN 201220091844
Authority: CN
Inventors: 任玉洁; 卢玉超; 刘新宁; 王镇; 孙亚芳; 杨军; 时龙兴
Original assignee: Southeast University
Current assignee: Southeast University
Priority date: 2012-03-13
Filing date: 2012-03-13
Publication date: 2012-12-05
Anticipated expiration: 2022-03-13

Abstract

An LCD controller comprises a SLAVE slave computer module, a DMA channel module, an FIFO buffer, a data format conversion module, a 3D processing module, an OVERLY multilayer superposition module, a DISP FIFO display buffer memory module, and a sequential module. An external processor is in output connection to the SLAVE slave computer module via an AHB interface. The SLAVE slave computer module is respectively in output connection to the DMA channel module, the FIFO buffer, the data format conversion module, the 3D processing module, the OVERLY multilayer superposition module and the sequential module. A display memory DDR is output via the AXI bus and is successively connected with the DMA channel module, the FIFO buffer, the data format conversion module, the 3D processing module, the OVERLY multilayer superposition module and the DISP FIFO display buffer memory module. LCD screen sequential information is generated by the sequential module. Output of both the sequential module and the DISP FIFO display buffer memory module is connected to an external 3D display screen.

Description

A kind of lcd controller

Technical field

The utility model belongs to the chip design art field, relates to the lcd controller in the digital integrated circuit SoC chip, is a kind of lcd controller of supporting functions such as bore hole 3 D visible, multilayer show, automatic reparation.

Background technology

Along with image display technology integrated in the SoC chip, lcd controller has become part indispensable among the SoC on the sheet, and has obtained widespread use in 10 years in the past.Along with developing rapidly of mobile Internet, various abundant multimedia application constantly are integrated in the various portable terminals, and the user hopes to enjoy more gorgeous vivid visual effect as much as possible.Under this background, technology such as bore hole 3 D visible, multilayer demonstration, high definition demonstration are arisen at the historic moment.

Existing lcd controller shows that stereo-picture needs through processor image to be carried out showing after the calculation process again earlier; And existing lcd controller only possesses the free hand drawing layer function, realize that multilayer shows, need multi-layer image be carried out computing stack back with processor and show; More than two kinds of technical schemes can take very big processor system resources, no matter be to use ppu or a processor is set, all can take ample resources in lcd controller, be not suitable for day by day complicated SoC chip system.In addition, in current SoC chip system, data bandwidth more and more becomes system bottleneck, and it is very high to the data bandwidth requirement that LCD plays HD video, when playing HD video, is easy to take place insufficient bandwidth, causes LCD problems such as screen, Hua Ping to occur splitting.

Therefore, also there is defective in above-mentioned prior art, awaits improving and development.

Summary of the invention

The problem that the utility model will solve is: display requirements such as the corresponding bore hole 3 D visible of existing lcd controller, multilayer demonstration, high definition demonstration need take a large amount of processor system resources; Be not suitable for complicated day by day SoC chip system; Insufficient bandwidth takes place easily, causes LCD problems such as screen, Hua Ping to occur splitting; And also all can only realize the function that bore hole 3 D visible, multilayer show at present separately, can not satisfy the demand that 3D shows.

The technical scheme of the utility model is: a kind of lcd controller; Lcd controller is connected with display-memory DDR through the AXI interface; Be connected with ppu through the AHB interface, be connected with the external LCD screen through rgb interface, said external LCD screen is the 3D display screen; Lcd controller comprises SLAVE slave module, DMA channel module, FIFO buffer, data layout conversion module, 3D processing module, OVERLY multilayer laminating module, DISP FIFO display buffer module and tfi module; The DMA channel module comprises at least 3 DMA passages; Ppu is connected to SLAVE slave module through the output of AHB interface; SLAVE slave module is exported respectively and is connected to DMA passage, FIFO buffer, data layout conversion module, 3D processing module, OVERLY multilayer laminating module and tfi module; Display-memory DDR connects DMA channel module FIFO buffer, data layout conversion module, 3D processing module, OVERLY multilayer laminating module and DISP FIFO display buffer module successively through the output of AXI bus; Tfi module produces the lcd screen time sequence information, and the output of tfi module and DISPFIFO display buffer module is connected to the external LCD screen.

Said external LCD screen is for adopting the bore hole 3D screen of disparity barrier technology or lens pillar technology.

The utility model carries out bore hole for the 3D film source and shows, ppu is through ahb bus collocating LCD controller working method register, enable lcd controller after; The reading displayed data are to the FIFO buffer from display-memory DDR through the AXI bus for the DMA passage, and process data layout conversion module becomes 24bpp RGB data layout with the RGB uniform data of video data or different-format, through the 3D processing module image interleaving treatment is become bore hole 3D pattern; Deliver to OVERLAY multilayer laminating module after finishing dealing with; Carry out the COLOR_KEY chroma key and handle, the ALPHA_BLENDING transparent processing is after MIX mixes the overlap-add procedure operation; Final data presented is delivered to DISP FIFO display buffer module; Tfi module produces the required clock signal of LCD screen, delivers to lcd screen interface, i.e. rgb interface together with the pixel data signal of DISP FIFO display buffer module output; The external LCD screen shows according to clock signal and pixel data, realizes that bore hole 3D shows.

Lcd controller is judged current whether insufficient bandwidth according to the video data number in the DISP FIFO display buffer, when video data number during less than setting value, judges that current bandwidth is not enough; Start automatic repair function, that is: lcd controller stops to export video data, and pixel clock signal is changed to disarmed state; The LCD screen stops displacement and refreshes pixel at this moment; Until lcd controller according to the number in the current DISP FIFO display buffer greater than setting value, thereby judge when bandwidth is enough, export video data more again; And pixel clock signal is recovered normal, and the LCD screen will continue normal displacement and refresh pixel at this moment.

The utility model provides a kind of lcd controller of supporting functions such as bore hole 3 D visible, multilayer show, automatic reparation.The utility model has been realized these functions in a controller; Integrated these function subject matters have: 1), show for bore hole 3 D visible and multilayer; Though prior art can independently realize this two functions, all needs processor to come the computing view data; 2), for the automatic reparation of picture, prior art does not also have relevant solution.The lcd controller of the utility model does not have under the situation of extra increase processor, three kinds of functions is concentrated in the controller realize that ppu does not relate to the processing of concrete view data; The action command of responsible Configuration Control Unit only, the utility model lcd controller is supported bore hole 3 D visible, multilayer Presentation Function simultaneously, is not simple function stack; Through continuous artificial debugging to circuit, realize integratedly, and circuit structure is succinct; Do not set up extra processor structure; No longer carry out calculation process,, not only improved arithmetic speed, but also reduced processor load by lcd controller hardware special disposal by ppu.Automatically repair function comes the pixel clock of controlled in real-time output through the empty full state of monitoring fifo buffer; Thereby accomplish automatic reparation, lcd controller is being play HD video, during like the 1080p HD video; If of short duration insufficient bandwidth situation; Lcd controller can temporarily stop output image data, and, when view data sufficient more again output enough up to bandwidth is because insufficient bandwidth is accidental and of short duration situation; Therefore, this method can on the basis that does not influence viewing effect, solve bandwidth of short duration cause inadequately split screen, flower screen problem.

The beneficial effect of the utility model is:

A. the 3D processing module that is provided with interweaves through the right and left eyes image and realizes bore hole 3 D visible function, satisfies current techniques development trend and user's request;

B. realize that through OVERLY multilayer laminating module multilayer shows that OVERLY multilayer laminating module is realized by general purpose multipliers, does not take processor resource, has reduced processor load, has improved processing speed;

C. come the pixel clock of controlled in real-time output through the empty full state of monitoring fifo buffer; Thereby accomplish automatic reparation, though image can repaired pause in theory, because the time of suspending is very short; And the basic resolution of human eye is not come out the so of short duration time; Therefore the viewing experience for the people is can be not influential, has solved the insufficient bandwidth problem when HD video is play, and has improved system reliability.

Description of drawings

Fig. 1 is the utility model and outside annexation figure.

Fig. 2 is the utility model structural drawing.

Fig. 3 is that the utility model bore hole three-dimensional display function is realized synoptic diagram.

Fig. 4 is the utility model multilayer Display Realization structural drawing.

Fig. 5 is that the automatic repair function of the utility model is realized synoptic diagram.

Fig. 6 is in the utility model, and 3D film source raw data is externally deposited organizational form among the display-memory DDR, and the 3D data layout that interweaves of right and left eyes.

Fig. 7 is the structural representation of the utility model 3D processing module.

Embodiment

The said lcd controller of the utility model comprises with lower interface:

1) AMBA AHB interface: ppu is connected to lcd controller through the AHB interface;

2) AMBA AXI interface: lcd controller is connected among the outside display-memory DDR through the AXI interface.

3) lcd screen rgb interface: lcd controller is handled the synthetic final images displayed of a width of cloth in back with view data, outputs on the external LCD screen through rgb interface to show.

Said external LCD screen is for adopting the bore hole 3D screen of disparity barrier technology or lens pillar technology; H60WVHTM12JDMC model 3D screen like VSTAR TECHNOLOGY LIMITED company; This 3D screen, need not to wear special eyeglasses can bore hole directly find out stereoeffect.

The utility model and outside annexation:

As shown in Figure 1, lcd controller is connected reading displayed data from DDR through the AXI interface with display-memory DDR; Be connected ppu collocating LCD controller, the working method of decision lcd controller with ppu through the AHB interface; Be connected with the external LCD screen through rgb interface.

The inner annexation of the utility model:

As shown in Figure 2, ppu is through after the good lcd controller SLAVE of the AHB interface configuration slave module, and the slave module is connected to other each modules, and the configuration control information is provided; The DMA channel module is connected to display-memory DDR through the AXI bus, after the reading of data, is connected in the fifo buffer; Fifo buffer is connected to the data layout conversion module, and the data layout conversion module is connected to the 3D processing module, and the 3D processing module is connected to OVERLAY multilayer laminating module; OVERLAY multilayer laminating module is connected to DISP_FIFO display buffer module; Tfi module produces the lcd screen time sequence information, in conjunction with DISP_FIFO display buffer module, is connected to the external LCD screen together.

Make the said lcd controller operate as normal of the utility model,, follow following configuration flow according to the demonstration needs:

1) collocating LCD screen attribute register;

2) configuration display-memory DDR, need dispose the corresponding figures layer during bore hole stereo display is stereo format, disposes each tomographic image form; Like ground floor is the 24bpp rgb format; The second layer is the YUV420 form, and the 3rd layer is the YUV16bpp rgb format, and the 4th layer of hardware mouse layer is the 1bpp form.Processing mode between the arrangement plan layer is as covering demonstration, transparent demonstration etc.

3) register is repaired in configuration automatically, and promptly DISP FIFO display buffer module will make automatic repair function effective, and the user need dispose corresponding registers.

4) enable lcd controller, lcd controller reads image data through built-in DMA channel module automatically according to user configuration information and handles back output demonstration from display-memory DDR.

The technical scheme of the utility model is following:

Shown in accompanying drawing 2, processor is through ahb bus collocating LCD controller working method register, enable lcd controller after; Built-in DMA channel module through the AXI bus from display-memory DDR the reading displayed data to the FIFO buffer; Process data layout conversion module becomes 24bpp RGB data layout with the RGB uniform data of video data or different-format, if film source is a bore hole 3D film source, then through bore hole 3D processing module the image interleaving treatment is become bore hole 3D pattern; Deliver to OVERLAY multilayer laminating module after finishing dealing with; Carry out the COLOR_KEY chroma key and handle, the ALPHA_BLENDING transparent processing, MIX mixes the overlap-add procedure operation; These processing are operating as prior art, no longer detail.The output data of OVERLAY multilayer laminating module is delivered to DISP FIFO display buffer module; Tfi module produces the required clock signal of LCD screen; Deliver to LCD screen interface together with the pixel data signal of DISP FIFO display buffer module output; Simultaneously, tfi module also is responsible for accomplishing automatic repair function, when system bandwidth is not enough, can suspend the LCD pixel clock signal and when bandwidth is enough, continue normal the demonstration.

Accompanying drawing 2 is the Organization Chart of lcd controller, mainly contains with the lower part and forms:

SLAVE slave module: ppu is through the SLAVE slave of ahb bus collocating LCD controller, and SLAVE slave output control signal is given other each modules.

DMA channel module: rationally arrange the order of four tomographic image FIFO through the bus reading of data; Produce the read data address; Through AXI EBI reading displayed data from DDR.

FIFO buffer module: the data transmission that is used for cushioning different rates.Buffer memory DMA reads the data of lcd controller from bus.

Data layout conversion module: according to the different images form, with its unified 24bpp rgb format view data that converts to.

The 3D processing module: bore hole 3D raw data is carried out interleaving treatment, and right and left eyes two two field pictures are interweaved is merged into piece image.

OVERLAY multilayer laminating module: the view data of difference figure layer is carried out transparent, color key combined treatment, form one deck display image at last and deliver to demonstration FIFO.

DISP FIFO video memory cache module: the final video data that the buffer memory lcd controller has been finished dealing with and supplied lcd screen to show.

Tfi module: the lcd screen sequential demand according to different produces corresponding LCD synchronizing signal, delivers to lcd screen together in conjunction with display data signal and shows.

Describe the described bore hole 3 D visible of the utility model, multilayer below respectively and show, repair automatically implementation procedure:

1. bore hole 3 D visible

The related lcd controller of the utility model is supported bore hole 3 D visible function.Bore hole 3 D visible function refers to that the user need not to wear anaglyph spectacles and can experience the stereoscopic picture plane effect through watching lcd screen, and this need meet the following conditions: film source a.3D; B.3D film source treatment facility; C. support the lcd screen of bore hole 3 D visible, wherein, 3D film source treatment facility is the lcd controller in the utility model.

Implementation method:

Two field picture in the tradition film source is divided into two two field pictures in the 3D film source, be respectively the image that right and left eyes is seen, lcd controller need be the complete image of a frame with two frame right and left eyes image interleaving treatment among the display-memory DDR.Specific practice is: lcd controller reads the left-eye frame picture material earlier from display-memory DDR; Right eye two field picture content among the reading displayed storer DDR again; Output to right and left eyes two field picture content successively the processing module of back then sequentially, i.e. OVERLAY multilayer laminating module.Fig. 3 has shown the difference of the front and back image that interweaves.

Processing procedure:

DMA channel module in the lcd controller reads in the 3D raw data in the 3D processing module through the AXI interface from outside display-memory DDR, sees accompanying drawing 1 and accompanying drawing 2.

The 3D raw data externally among the display-memory DDR to deposit organizational form as shown in Figure 6: the picture frame that white expression left eye is seen; Black is represented the picture frame that right eye is seen, in storer, an original 3D rendering is put delegation's left-eye frame view data earlier; Put delegation's right eye frame image data more continuously; Put delegation's left-eye frame view data more continuously, put delegation's right eye frame image data more continuously, the original 3D rendering of one frame is stored in the storer by this rule.

Play the data organization mode that 3D rendering needs; Shown in the synthetic frame of Fig. 6 the right, first pixel is the pixel of left-eye frame, and then second pixel that pixel is the right eye frame; So circulation is deposited, and finally being presented on the screen is the image of right and left eyes pixel interleaving.

The work that the 3D processing module is done is the 3D raw data of depositing among the outside display-memory DDR, shown in Fig. 6 left side, handles to change into the 3D data layout that the right and left eyes that can on screen, show interweaves, shown in Fig. 6 the right.

Hardware is realized:

As shown in Figure 7, the 3D processing module mainly contains 4 hardware subelements and forms: write control module, read control module, left-eye frame impact damper, right eye frame buffer.Write control module and be responsible for the raw data of reading in is put into left-eye frame impact damper and right eye frame buffer by left-right frames successively, write delegation's left-eye frame image earlier, write delegation's right eye two field picture again to the right eye frame buffer, successively circulation to the left-eye frame impact damper.Left-eye frame impact damper and right eye frame buffer are deposited the left eye data and the right eye data of delegation respectively; Read control module and be responsible for successively from left-eye frame impact damper and right eye frame buffer read pixel and interweave getting up to deliver to screen display continuously, read the pixel data of a left-eye frame impact damper earlier, read the pixel data of a right eye frame buffer again, circulate successively.As shown in Figure 6.

Annexation:

Like Fig. 2 and shown in Figure 7: write the Data Input Interface of control module as the 3D processing module; Be connected to the data layout conversion module; Be connected to left-eye frame impact damper and right eye frame buffer; The right and left eyes frame buffer is connected to reads control module, reads the output interface of control module as the 3D processing module, is connected to OVERLAY multilayer laminating module.

2. multilayer shows

The related lcd controller of the utility model supports the stack of 4 tomographic images to show; Wherein, Ground floor as a setting layer, the second layer as video layer, the 3rd layer as menu layer, the 4th layer as hardware mouse layer; The user only need place 4 tomographic image desired datas in the display buffer; After configuring lcd controller, the built-in DMA passage of lcd controller just can be delivered to output demonstration in the DISP FIFO display buffer also through being output into a width of cloth composograph after the OVERLY multilayer overlap-add procedure through AXI bus reading of data from display-memory DDR.

Do not have independent functions such as hardware handles multilayer demonstration in the prior art, can only do these operations with processor, and the utility model has designed special hardware: 3D processing module and OVERLAY multilayer laminating module are realized the multilayer overlap-add operation; Need not processor and participate in, therefore do not take processor system resources, like this; In the utility model; When doing the multilayer display process, ppu can be done other things simultaneously, has improved processor efficient.

Originally the lcd controller that can only individual layer shows has only a DMA passage, once only read piece image, and the lcd controller of the utility model is provided with at least 4 DMA passages; Corresponding 4 tomographic images; First corresponding background layer, second corresponding video layer, the 3rd corresponding menu layer, the 4th corresponding mouse layer adopt the AXI EBI, can read 4 sub-pictures simultaneously; When reading 4 sub-pictures, 4 sub-pictures are carried out the multilayer overlap-add operation; From the improvement of an original DMA passage to 4 a DMA passage, the utility model has solved the reading speed problem, promptly within a certain period of time from reading piece image to reading 4 sub-pictures.

Implementation method:

As shown in Figure 4, OVERLAY multilayer laminating module is responsible for exporting after each tomographic image mixing overlap-add procedure.With the synthetic piece image of ground floor image and second layer image blend stack back, mix being superimposed as piece image again with the 3rd tomographic image earlier, mix to be superimposed as with the 4th tomographic image at last and finally want images displayed.Stacking method between whenever two-layer is identical; The pixel data of getting the ground floor image multiply by coefficient a; The pixel of second layer image multiply by coefficient b; Wherein a and b sum are 1, and the value of a and b is obtained through configuration SLAVE slave module by ppu, at last two multiplied result additions is obtained final stack pixel.

Hardware is realized:

Mixing laminating module shown in the accompanying drawing 4 is realized by general purpose multipliers.

3. repair automatically

When the automatic repair function of lcd controller support that the utility model is related, this function are applied to LCD broadcast HD video, because the flower that insufficient bandwidth causes shields, splits phenomenons such as screen.

Implementation method:

Lcd controller is judged current whether insufficient bandwidth according to the video data number in the DISP FIFO display buffer module, when video data number during less than the value set, judges that current bandwidth is not enough; This moment flower taking place easily shields, splits phenomenons such as screen; Need launch automatic repair function, lcd controller stops DISP FIFO display buffer module output video data, and the control timing module; Clock signal is changed to disarmed state, and lcd screen stops displacement and refreshes pixel at this moment.When lcd controller judges that greater than setting value bandwidth is enough according to the number in the current DISP FIFO display buffer, export video data more again, and pixel clock signal is recovered normal, the LCD screen will continue normal displacement and refresh pixel at this moment.Time-out makes the data channel of lcd screen can discharge overstocked data, and in this process, the time of time-out is very short, and the basic resolution of human eye is not come out the so of short duration time, and therefore the viewing experience for the people is can be not influential.

Fig. 5 has briefly described the whole process of automatic reparation.As shown in the figure: the Clock clock is the work reference clock of hardware; Pixle_Clock is the pixel clock of output; Hori_syn is that line synchronizing signal, the Data_Enable signal of output is the data enable signal of output; The FIFO_Read signal is inner FIFO read signal, and the Almost_Empty signal is that inner FIFO is with spacing wave; Wherein Pixle_Clock, Hori_syn, Data_Enable, FIFO_Read signal come from tfi module, and the Almost_Empty signal comes from DISP FIFO display buffer module, and is as shown in the figure; When Almost_Empty is effective with the spacing wave pulse (high level); Pixle_Clock output pixel signal can keep high level, stops to export the normal pixel clock signal, simultaneously; The FIFO_Read signal becomes the low level disarmed state; When the Almost_Empty signal became the low level disarmed state, Pixle_Clock continued normal clock signal, and the FIFO_Read read signal continues normal output read signal high level.

Claims

1. a lcd controller is characterized in that lcd controller passes through the AXI interface and is connected with display-memory DDR, is connected with ppu through the AHB interface, is connected with the external LCD screen through rgb interface, and said external LCD screen is the 3D display screen; Lcd controller comprises SLAVE slave module, DMA channel module, FIFO buffer, data layout conversion module, 3D processing module, OVERLY multilayer laminating module, DISP FIFO display buffer module and tfi module; The DMA channel module comprises at least 4 DMA passages; Ppu is connected to SLAVE slave module through the output of AHB interface; SLAVE slave module is exported respectively and is connected to DMA passage, FIFO buffer, data layout conversion module, 3D processing module, OVERLY multilayer laminating module and tfi module; Display-memory DDR connects DMA channel module FIFO buffer, data layout conversion module, 3D processing module, OVERLY multilayer laminating module and DISP FIFO display buffer module successively through the output of AXI bus; Tfi module produces the lcd screen time sequence information, and the output of tfi module and DISP FIFO display buffer module is connected to the external LCD screen.

2. a kind of lcd controller according to claim 1 is characterized in that said external LCD screen is for adopting the bore hole 3D screen of disparity barrier technology or lens pillar technology.