CN202549830U - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
CN202549830U
CN202549830U CN 201220187530 CN201220187530U CN202549830U CN 202549830 U CN202549830 U CN 202549830U CN 201220187530 CN201220187530 CN 201220187530 CN 201220187530 U CN201220187530 U CN 201220187530U CN 202549830 U CN202549830 U CN 202549830U
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CN
China
Prior art keywords
semiconductor device
outside lead
change portion
lead
outside
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 201220187530
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Chinese (zh)
Inventor
荻野博之
生田目裕子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
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Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Application granted granted Critical
Publication of CN202549830U publication Critical patent/CN202549830U/en
Anticipated expiration legal-status Critical
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The utility model provides a semiconductor device for configuring external leads through which large current flows according to the narrow pitch. Through the semiconductor device, the external leads are arranged in a staggered shape. The semiconductor device is characterized in that each external lead is provided with a thick part, a bending part, a changing part and an inserting part; and after the thick part is formed, the lengths from the bending part to the changing part are uniform. In addition, the semiconductor device is characterized in that in the more than three external leads led out from the side surface of a resin encapsulation body, the external leads at the two ends are lengthened from the bending parts to the changing parts compared with the external leads on the inner side.

Description

Semiconductor device
Technical field
The utility model relates to semiconductor device, particularly staggered outside lead structure.
Background technology
In recent years; Encapsulated the semiconductor device of semiconductor element through resin etc.; Owing to will tackle high request, therefore there is the radical tendency of taking on the outside lead that is electrically connected of installation base plate that increase, so-called many pinizations to highly integrated, multifunction.
The opposing party, also high for the requirement of the miniaturization of electronic equipment, high performance, echo therewith on installation base plate, also advancing narrow pitchization etc. to insert the raising of mounting techniques.For example, about the hole of the installation base plate that is used for being electrically connected with semiconductor device, with multiple row be configured to differ from one another staggered.
Have as prior art is known, in semiconductor device,, lead-in wire is formed staggered also for narrow pitchization.For example,, can use lead bending machine, lead-in wire is bent into staggered (with reference to Fig. 4) with bending roll according to the patent documentation relevant 1 with lead bending machine.
In addition; According to patent documentation 2; In the semiconductor device that has with the configuration of same that arrange, the outside leads that 3 row are above of the configuration of 2 outside leads of DIP (Dual Inline Package) type, the length of outside lead that can be through making the inboard is longer than the outside lead in the outside, thereby when being inserted into installation base plate; At first be inserted into correct position, be inserted into correct position (with reference to Fig. 5) while revise the outside lead in the outside afterwards while revising inboard outside lead.
And then; According to improving relevant patent documentation 3 with lead-in wire intensity; Be bent to form to staggered, having in the semiconductor device of the outside lead of the distance of resin-encapsulated body side surface and short outside lead, wideer through the width that makes long outside lead than the width of short outside lead; Thereby can increase lead-in wire intensity, reduce lead deformation.In addition, through partly changing the width of long outside lead, thereby can make the welded condition even (with reference to Fig. 6) of long outside lead and short outside lead.
[patent documentation 1] japanese kokai publication sho 47-25791 communique
[patent documentation 2] japanese kokai publication sho 61-049447 communique
[patent documentation 3] japanese kokai publication hei 11-135702 communique
In the semiconductor device that has used the power semiconductor element of handling big voltage and current, generally need make the outside lead overstriking of flowing through big electric current.On the other hand, for the high-density installationization (narrow pitchization) that realizes installation base plate, the size of expectation substrate aperture is as far as possible little, equably configuration.
In the prior art shown in above-mentioned patent documentation 1 and the above-mentioned patent documentation 2, the thickness that forms staggered outside lead is the same.But when making the outside lead overstriking in order to flow through big electric current, substrate aperture also needs to strengthen, and has the problem that hinders narrow pitchization.
In addition, in the prior art shown in the above-mentioned patent documentation 3, forming when staggered, though the overstriking in order to improve intensity of long outside lead, short outside lead is not thick.But, in the semiconductor device that has used the power semiconductor element, in order to flow through big electric current, need with the length overstriking irrespectively of outside lead, exist in the problem that can not flow through big electric current in the short outside lead in the prior art.
In aforesaid prior art, existence can not come the problem of the outside lead of configuration flow super-high-current with narrow pitch.
The utility model content
Therefore, the utility model is accomplished in order to address the above problem, and its purpose is, according to the outside lead of narrow pitch configuration flow super-high-current.
In order to address the above problem, the utlity model has the structure that is described below.The semiconductor device of the utility model, it forms a plurality of outside leads staggered, and this semiconductor device is characterised in that outside lead has thick portion, bend, change portion and insertion section, and the length from bend to change portion that has formed after the thick portion is even.In addition, it is characterized in that deriving from the resin-encapsulated body side surface the outside lead more than 3, the change portion of the outside lead at two ends is than the outside lead of inboard, the length from bend to change portion is longer.
The utility model can provide the semiconductor device according to the outside lead of narrow pitch configuration flow super-high-current.
Description of drawings
Fig. 1 is the stereogram of semiconductor device 1 of the embodiment 1 of the utility model.
Fig. 2 is the enlarged drawing of outside lead 4a of semiconductor device 1 of the embodiment 1 of the utility model.
Fig. 3 is the enlarged drawing of outside lead 4b of semiconductor device 1 of the embodiment 1 of the utility model.
Fig. 4 is the stereogram of the semiconductor device of existing example 1.
Fig. 5 is the stereogram of the semiconductor device of existing example 2.
Fig. 6 is the stereogram of the semiconductor device of existing example 3.
Fig. 7 is the stereogram of the semiconductor device of embodiment 2.
Fig. 8 is the stereogram of the semiconductor device of embodiment 3.
Fig. 9 is the enlarged drawing of change portion of the semiconductor device of variation 1.
Figure 10 is the enlarged drawing of change portion of the semiconductor device of variation 2.
Symbol description
1: semiconductor device; 2: the resin-encapsulated body; 3: the resin-encapsulated body side surface; 4: outside lead; 4a: outside lead (length from bend to change portion is long); 4b: outside lead (length from bend to change portion is short); 5: thick portion; 6: bend; 7: change portion; 7a: change portion (variation 1); 7b: change portion (variation 2); 8: the insertion section; 9: installation base plate; 10: scolding tin; 11: electric power is used outside lead; 12: outside lead is used in control; 13: change portion height; 14: substrate aperture.
Embodiment
Below, the semiconductor device of the execution mode of the utility model is described.In addition, in following accompanying drawing record,, represent with identical or similar symbol for identical or similar part.But accompanying drawing is the figure of signal, and the ratio of size relationship etc. are different with reality.Therefore, should judge concrete size etc. according to following explanation.In addition, also comprise size relationship or ratio different portions each other each other certainly at accompanying drawing.
[embodiment 1]
Below, describe with reference to the semiconductor device 1 of accompanying drawing the embodiment 1 of the utility model.Fig. 1 is the stereogram of semiconductor device of the embodiment 1 of the utility model.
As shown in Figure 1, semiconductor device 1 is made up of resin-encapsulated body 2, outside lead 4.
Resin-encapsulated body 2 is to use resin to form metal die and pressure apparatus, as transfer modling and the packaging body that resin forms.For example, in resin-encapsulated body 2, use thermosetting epoxy resin.
Resin-encapsulated body side surface 3 is lateral surfaces of resin-encapsulated body 2.Semiconductor device 1 is DIP (the Dual Inline Package) type that outside lead 4 is derived from relative resin-encapsulated body side surface 3.
Outside lead 4 is made up of thick portion 5, bend 6, change portion 7 and insertion section 8.For example, the thick flat shape sheet material of 0.5mm is used the etching and processing of punch process and chemistry, use copper or copper alloy more, can implement silver-plated etc. the surface for material.
Thick portion 5, in order to flow through big electric current, the position from resin-encapsulated body side surface 3 to change portion 7 forms thick shape.For example, the width dimensions of thick portion 5 is 2.0mm.
Bend 6 is the parts that are described below: can the insertion section 8 of the outside lead 4 of deriving in vertical direction from resin-encapsulated body side surface 3 being inserted into the mode that is configured to staggered substrate aperture for high-density installationization, the thick portion 5 of outside lead 4 is formed the part of about 90 degree.
Change portion 7 is the parts that are described below: the thickness of the thick portion 5 of deriving from resin-encapsulated body side surface 3, be used to flow through big electric current attenuates up to the part that becomes the thickness identical with insertion section 8.Be shaped as the conical by its shape that front end attenuates to insertion section 8 from thick portion 5.In addition, after having formed thick portion, the length from bend 6 to change portion 7 is even.
Insertion section 8 is the ends from the outside lead 4 of resin-encapsulated body side surface 3 derivation.Thickness with the hole that can be inserted into installation base plate 9, through the welding after inserting can with being electrically connected of installation base plate etc. in use.For example, the width dimensions of insertion section 8 is 0.7mm.
Then, with reference to Fig. 2, Fig. 3, the connection state of outside lead 5 and installation base plate 9 is shown.Fig. 2 is the enlarged drawing of outside lead 4a of semiconductor device 1 of the embodiment 1 of the utility model.Fig. 3 is the enlarged drawing of outside lead 4b of semiconductor device 1 of the embodiment 1 of the utility model.
In Fig. 2; The outside lead more than 34 of deriving from the resin-encapsulated body side surface; The outside lead 4a at the two ends that length from bend to change portion 7 is long, promptly be provided with in the position that change portion 7 is touched installation base plate 9, only illustrate 1 and describe.
When in substrate aperture 14, inserting the insertion section 8 of outside lead 4a, change portion 7 contacts with installation base plate 9, brings into play function as stop part, can not be inserted into this more than position.Stopping on the position of inserting, through having used the welding of scolding tin 10, realization is electrically connected with installation base plate 9.
In Fig. 3, by in the outside lead more than 34 of deriving, the outside lead 4b of inboard is described.Also only illustrating 1 here describes.
Outside lead 4b is than outside lead 4a, and is shorter to the length of change portion 7 from bend, for example, in the distance of when substrate aperture 14 is inserted, vacating 0.3mm, the change portion height 13 of installation base plate 9 that become arrival not.When welding, through the phenomenon of climbing of scolding tin 10, scolding tin 10 is climbed to change portion 7, obtains at all not inferior being electrically connected with outside lead 4a.
Then, the effect to the semiconductor device of the above embodiments 1 describes.
The semiconductor device of the embodiment 1 of the utility model, in forming a plurality of staggered outside leads, can make from bend to change portion length uniformly, to the interval chap of change portion, can flow through big electric current.
In addition, through the length different external lead-in wire of combination from bend to change portion, thereby the change portion that at first contacts with installation base plate becomes stop part, carries out the aligning when substrate aperture is inserted easily.
In addition, become conical by its shape through making change portion shape, big thereby the surface area at scolding tin junction surface becomes, can improve weld strength, improve credible.
In addition, even make the outside lead overstriking in order to flow through big electric current, also can be through change portion, and make the size that becomes staggered substrate aperture identical with pitch, can help the high-density installationization of installation base plate.
As stated, though put down in writing the execution mode of the utility model, should not be construed as the description and the accompanying drawing that constitute a part of this disclosure and limit the utility model.Those skilled in the art can openly expect various replacement execution modes, embodiment and application technology from this.
As embodiment 2; Semiconductor device 1 also can be as shown in Figure 7, in identical semiconductor device; Semiconductor element is used in the power semiconductor element and the control of this power semiconductor element of control, carried the IPM (Intelligent Power Module) in identical resin-encapsulated body.
In IPM, the electric power that flows through big electric current is thicker with outside lead 12 than control with outside lead 11.But; Through change portion 7 being set on outside lead 11 at electric power; Insert the size of electric power thereby can make, control big or small identical with the substrate aperture of outside lead 12 with inserting, can help high-density installationization based on the installation base plate of narrow pitchization with the substrate aperture of outside lead 11.
In addition; The electric power more than 3 with outside lead 11 in, through making length, longer to the length of change portion than bend from the outside lead of inboard from the bend of the outside lead that is positioned at two ends to change portion; Thereby the change radicals by which characters are arranged in traditional Chinese dictionaries that are positioned at the outside lead at two ends contact with installation base plate earlier; Work as stop part,, therefore can position easily can not be inserted into this more than position.
As embodiment 3, semiconductor device 1 also can be as shown in Figure 8, only from a resin-encapsulated body side surface, derive ZIP (the Zigzag Inline Package) type of outside lead.With the situation of IPM likewise, according to the utility model,, also can realize narrow pitchization even flow through the outside lead of big electric current, also obtain the effect of locating.
As variation, for example as shown in Figure 9 also can be the stair-stepping change 7a of portion.When in substrate aperture 14, inserting the insertion section 8 of outside lead 4a, the 7a of change portion contacts with installation base plate 9, brings into play function as stop part, can not be inserted into this more than position.Stopping on the position of inserting, through having used the welding of scolding tin 10, realization is electrically connected with installation base plate 9.In addition, big through attenuate steppedly thereby the bond surface area of scolding tin 10 becomes, can improve weld strength, improve credible.
In addition, shown in figure 10, also can be the 7b of change portion of concave shape.When in substrate aperture 14, inserting the insertion section 8 of outside lead 4a, the 7b of change portion contacts with installation base plate 9, brings into play function as stop part, can not be inserted into this more than position.Stopping on the position of inserting, through having used the welding of scolding tin 10, realization is electrically connected with installation base plate 9.In addition, be full of scolding tin 10 through part in depression, big thereby the bond surface area of scolding tin 10 becomes, can improve weld strength, improve credible.
In addition, though the material of outside lead 4 is copper or copper alloy, also can be aluminum or aluminum alloy.Thus, can realize lightweight, low price.

Claims (5)

1. semiconductor device; It forms a plurality of outside leads staggered; This semiconductor device is characterised in that said outside lead has thick portion, bend, change portion and insertion section, and the length from said bend to said change portion that forms after the said thick portion is even.
2. semiconductor device according to claim 1 is characterized in that,
Derived the said outside lead more than 3 from the resin-encapsulated body side surface, the said change portion of the said outside lead at two ends is than the said outside lead of inboard, and the length from said bend to said change portion is longer.
3. semiconductor device according to claim 1 and 2 is characterized in that,
In said outside lead, said change portion is shaped as conical by its shape.
4. semiconductor device according to claim 1 and 2 is characterized in that,
In said outside lead, said change portion is shaped as stairstepping.
5. semiconductor device according to claim 1 and 2 is characterized in that,
In said outside lead, said change portion is shaped as concave shape.
CN 201220187530 2012-03-26 2012-04-27 Semiconductor device Expired - Fee Related CN202549830U (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012-001647 2012-01-06
JP2012001647U JP3176067U (en) 2012-03-26 2012-03-26 Semiconductor device

Publications (1)

Publication Number Publication Date
CN202549830U true CN202549830U (en) 2012-11-21

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Application Number Title Priority Date Filing Date
CN 201220187530 Expired - Fee Related CN202549830U (en) 2012-03-26 2012-04-27 Semiconductor device

Country Status (2)

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JP (1) JP3176067U (en)
CN (1) CN202549830U (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109478738A (en) * 2016-07-12 2019-03-15 株式会社自动网络技术研究所 Connector and the electrical connection module for having the connector
CN109841590A (en) * 2017-11-28 2019-06-04 恩智浦美国有限公司 Lead frame for the IC apparatus with J lead and gull wing lead
CN109904136A (en) * 2017-12-07 2019-06-18 恩智浦美国有限公司 Lead frame for the IC apparatus with J lead and gull wing lead
CN110707063A (en) * 2018-07-10 2020-01-17 恩智浦美国有限公司 Lead frame with bendable leads

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109478738A (en) * 2016-07-12 2019-03-15 株式会社自动网络技术研究所 Connector and the electrical connection module for having the connector
CN109841590A (en) * 2017-11-28 2019-06-04 恩智浦美国有限公司 Lead frame for the IC apparatus with J lead and gull wing lead
CN109904136A (en) * 2017-12-07 2019-06-18 恩智浦美国有限公司 Lead frame for the IC apparatus with J lead and gull wing lead
CN110707063A (en) * 2018-07-10 2020-01-17 恩智浦美国有限公司 Lead frame with bendable leads

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Publication number Publication date
JP3176067U (en) 2012-06-14

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Legal Events

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20121121

Termination date: 20210427

CF01 Termination of patent right due to non-payment of annual fee