CN202305829U - Photoelectric data conversion device - Google Patents
Photoelectric data conversion device Download PDFInfo
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- CN202305829U CN202305829U CN2011204157742U CN201120415774U CN202305829U CN 202305829 U CN202305829 U CN 202305829U CN 2011204157742 U CN2011204157742 U CN 2011204157742U CN 201120415774 U CN201120415774 U CN 201120415774U CN 202305829 U CN202305829 U CN 202305829U
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Abstract
The utility model discloses a photoelectric data conversion device, aiming at rapidly converting an optical signal and an electric signal in a seismic data acquisition process. The photoelectric data conversion device comprises an FPGA (field programmable gate array) circuit used for analyzing and processing the electric signal, a first conduction unit, a second conduction unit and a third conduction unit, wherein the first conduction unit is used for carrying out equilibrium processing on information data received by a serial low voltage differential signal, converting the information data after equilibrium processing to a positive voltage emitter coupling logic signal, converting the positive voltage emitter coupling logic signal into a parallel electric signal and sending the electric signal to the FPGA circuit; the second conduction unit is used for converting a control command sent by the FPGA circuit in the form of a parallel electric signal into a serial electric signal and sending the serial electric signal; and the third conduction unit is used for converting the parallel electric signal sent by the FPGA circuit into the optical signal, sending the optical signal, converting the received optical signal into the parallel electric signal and sending the parallel electric signal to the FPGA circuit. Thus, rapid conversion between the optical signal and the electric signal is completed.
Description
Technical field
The utility model relates to a kind of photooptical data conversion equipment.
Background technology
Earthquake data acquisition is one of important step in the seismic exploration, requires receiving record seismic event without distortion.System for acquiring seismic data must have great dynamic range, low noise, abilities such as low drift, broadband and influence of jamming ripple.
The real-time Transmission of geological data and order and photoelectricity switch; It is important techniques in the physical prospecting earthquake data acquisition; It need be accomplished during gathering and convert hyperchannel, high-resolution geological data into optical signal transmission to workstation, and workstation light signal command conversion becomes electric signal not have the conversion transmission in real time of error code ground.
At present, when carrying out data transmission, because the transmission medium of underwater operation cable is an electric signal, and lead-in cable still need use light signal as transmission medium.Therefore between the two, need the device that to realize changing fast between the photoelectricity.
The utility model content
The utility model technical matters to be solved is to provide a kind of photooptical data conversion equipment so that light signal in the earthquake data acquisition process and electric signal are changed fast for prior art.
In order to solve the problems of the technologies described above, the utility model provides a kind of photooptical data conversion equipment, comprising:
Field programmable logic array (FPLA) (FPGA) circuit that electric signal is resolved and handled;
Link to each other with this FPGA circuit, to converting the positive voltage ECL signal after the information data equilibrium treatment that receives with the Low Voltage Differential Signal of serial into, and this positive voltage ECL conversion of signals being sent to first onunit of this FPGA circuit after for parallel electric signal;
Link to each other with this FPGA circuit, the control command that this FPGA circuit is sent with parallel electric signal converts the electric signal of serial and second onunit that sends into;
Link to each other with this FPGA circuit, the parallel electrical signal conversion that this FPGA circuit is sent becomes light signal and sends and the light signal that receives converted to the 3rd onunit that sends to this FPGA circuit behind the parallel electric signal.
Preferably, this first onunit comprises:
The reception balanced device of the information data equilibrium treatment that this Low Voltage Differential Signal with serial is received;
Link to each other with this reception balanced device, this Low Voltage Differential Signal after this equilibrium treatment is converted into the level shifting circuit of positive voltage ECL signal;
Link to each other with this level shifting circuit and this FPGA circuit, this positive voltage ECL conversion of signals is electric signal that walks abreast and the serial-parallel conversion circuit that sends to this FPGA circuit.
Preferably, this first onunit comprises:
Link to each other with this reception balanced device, this Low Voltage Differential Signal of this serial is carried out Filtering Processing and this Low Voltage Differential Signal of this serial of Filtering Processing sent to the match circuit of this reception balanced device.
Preferably, this match circuit includes difference parallel impedance with voltage clamp effect and the RC circuit with filter action.
Preferably, this level shifting circuit comprises the pull-up resistor combinational circuit.
Preferably, the 3rd onunit comprises:
Link to each other with this FPGA circuit, the parallel electrical signal conversion that this FPGA circuit is sent becomes the serial-parallel conversion circuit that sends, the electrical signal conversion of the serial that receives is sent to for parallel electric signal this FPGA circuit behind the electric signal of serial;
Link to each other the level shifting circuit that receives the electric signal of serial and the electric signal of the serial that received carried out send after the level conversion with this serial-parallel conversion circuit;
Link to each other with this level shifting circuit, the electrical signal conversion of carrying out the serial after the level conversion through this level shifting circuit is light signal and sends, the light signal that receives is converted into the electric signal of serial and sends to the photoelectric commutator of this level shifting circuit.
Preferably, the differential lines of this level shifting circuit is provided with the different clamp resistance of resistivity.
Compared with prior art, the embodiment of the utility model adopts FPGA circuit and a plurality of onunit, respectively with system for acquiring seismic data in transmitting device and DPM carry out signal exchange, accomplished the quick conversion of light signal and electric signal.Among the embodiment of the utility model, the slewing rate of photosignal is fast and low in energy consumption, and maximum transfer speed is also higher.The embodiment of the utility model adopts match circuit and multiple level shifting circuit, and the bit error rate is low in transmission and the signal conversion process.The example structure of the utility model is simple, easy for installation.
Description of drawings
Fig. 1 is the photooptical data conversion device structure synoptic diagram of the utility model embodiment.
Embodiment
For the purpose, technical scheme and the advantage that make the utility model is clearer, hereinafter will combine accompanying drawing that the embodiment of the utility model is elaborated.Need to prove that under the situation of not conflicting, embodiment among the application and the characteristic among the embodiment be combination in any each other.
As shown in Figure 1; The photooptical data conversion equipment of the utility model embodiment is when using; (Data Processing Modular, DPM) 3 link to each other, and can carry out exchanges data with data transmission device 2 and DPM 3 with data transmission device 2 and data processing equipment respectively.
As shown in Figure 1; The embodiment of the utility model comprises field programmable logic array (FPLA) (FPGA) circuit 1 that main realization is resolved and handled electric signal, and first onunit 4, second onunit 5 and the 3rd onunit 6 that all are connected with FPGA circuit 1.Wherein first onunit 4 and second onunit 5 are connected between this FPGA circuit 1 and this data transmission device 2, and the 3rd onunit 6 is connected between this FPGA circuit 1 and this DPM 3.
This first onunit 4 receives the information data that this data transmission device 2 sends with this electric signal of Low Voltage Differential Signal (LVDS); This LVDS signal is carried out converting positive voltage ECL (PECL) signal into after the equilibrium treatment, and this PECL conversion of signals is sent to FPGA circuit 1 after for parallel electric signal.
Second onunit 5 receives the control command that FPGA circuit 1 send with parallel electric signal, and sends to data transmission device 2 after converting this control command into serial electric signal.
After the parallel electrical signal conversion that the 3rd onunit 6 sends FPGA circuit 1 becomes serial electric signal, convert serial electric signal to light signal again and send to DPM 3; Also this DPM 3 is sent to light signal and converts serial electric signal to, and with this serial electric signal convert to and horizontal electrical signal send to FPGA circuit 1.
The embodiment of the utility model adopts FPGA circuit 1 and a plurality of onunit, carries out signal exchange with data transmission device 2 and DPM 3 respectively, and is low in energy consumption, and the slewing rate of photosignal is high, and maximum transfer speed is high.
As shown in Figure 1, first onunit 4 comprises reception balanced device 41, first level shifting circuit 42 and first serial-parallel conversion circuit 43 of mutual series connection.The LVDS signal of the serial that reception balanced device 41 reception data transmission devices 2 send also carries out equilibrium treatment.First level shifting circuit 42 receives the LVDS signal of the serials after reception balanced device 1 equilibrium treatment, and is to send to first serial-parallel conversion circuit 43 after being similarly the PECL signal of serial of electric signal with the LVDS conversion of signals of the serial after this equilibrium treatment.First serial-parallel conversion circuit 43 receives the PECL signal of the serial of sending from first level shifting circuit 42, and with sending to FPGA circuit 1 after the PECL conversion of signals of this serial and behind the horizontal electrical signal.
Among the embodiment of the utility model, this first level shifting circuit 42 can be the pull-up resistor combinational circuit that comprises diode.
As shown in Figure 1, among the embodiment of the utility model, first onunit 4 can also comprise match circuit 44, and this match circuit 44 is arranged between this reception balanced device 41 and this data transmission device 2, can carry out Filtering Processing to the LVDS electric signal of serial.
Among the embodiment of the utility model, this match circuit 44 includes difference parallel impedance and RC circuit, and this difference parallel impedance is made up of the build-out resistor of different resistivity, has the voltage clamp effect; This RC circuit has filter action.
Among the embodiment of the utility model, this second onunit 5 can be a signal transceiver.
As shown in Figure 1, the 3rd onunit 6 comprises second serial-parallel conversion circuit 61, second level shifting circuit 62 and the photoelectric commutator 63 that is cascaded.Second serial-parallel conversion circuit 61 receives the parallel electric signal that FPGA circuit 1 send, and the electrical signal conversion that will walk abreast sends to second level shifting circuit 62 after becoming the PECL signal of serial; Second level shifting circuit 62 receives the PECL signal of the serial that second serial-parallel conversion circuit 61 sends, and the PECL signal of this serial is carried out sending to photoelectric commutator 63 after the level conversion; Photoelectric commutator 63 will pass through the electrical signal conversion that this second level shifting circuit 62 carries out after the level conversion and become light signal to send to DPM 3.
Photoelectric commutator 63 also receives the light signal that DPM 3 sends, and sends to second level shifting circuit 62 after this light signal being converted into the electric signal of serial; Second level shifting circuit 62 receives the electric signal of the serial that photoelectric commutators 63 send, and the electric signal of this serial is carried out level conversion, and the electric signal of the serial after the level conversion is sent to second serial-parallel conversion circuit 61; Second serial-parallel conversion circuit 61 receives the electric signal of the serial that second level shifting circuit 62 sends, and the electrical signal conversion of this serial is sent to FPGA circuit 1 after for parallel electric signal.
Among the embodiment of the utility model, the differential lines of second level shifting circuit 62 is provided with the different clamp resistance of resistivity.Because what transmit on the transmission twisted-pair feeder is the differential signal of PECL; On every differential lines, add the pull-up resistor and the pull down resistor that adapt; Can with PECL signal clamper in the required level range of photoelectric commutator, so just realize from the PECL signal to the level conversion the photoelectric commutator.
The embodiment of the utility model adopts match circuit and multiple level shifting circuit, and the bit error rate is low in the transmission of signal and the transfer process.The example structure of the utility model is simple, easy for installation.
Though the embodiment that the utility model disclosed as above, the embodiment that described content just adopts for the ease of understanding the utility model is not in order to limit the utility model.Technician under any the utility model in the technical field; Under the prerequisite of spirit that does not break away from the utility model and disclosed and scope; Can do any modification and variation what implement in form and on the details; But the scope of patent protection of the utility model still must be as the criterion with the scope that appending claims was defined.
Claims (7)
1. a photooptical data conversion equipment is characterized in that, comprising:
Field programmable logic array (FPLA) (FPGA) circuit that electric signal is resolved and handled;
Link to each other with this FPGA circuit, to converting the positive voltage ECL signal after the information data equilibrium treatment that receives with the Low Voltage Differential Signal of serial into, and this positive voltage ECL conversion of signals being sent to first onunit of this FPGA circuit after for parallel electric signal;
Link to each other with this FPGA circuit, the control command that this FPGA circuit is sent with parallel electric signal converts the electric signal of serial and second onunit that sends into;
Link to each other with this FPGA circuit, the parallel electrical signal conversion that this FPGA circuit is sent becomes light signal and sends and the light signal that receives converted to the 3rd onunit that sends to this FPGA circuit behind the parallel electric signal.
2. photooptical data conversion equipment according to claim 1 is characterized in that, this first onunit comprises:
The reception balanced device of the information data equilibrium treatment that this Low Voltage Differential Signal with serial is received;
Link to each other with this reception balanced device, this Low Voltage Differential Signal after this equilibrium treatment is converted into the level shifting circuit of positive voltage ECL signal;
Link to each other with this level shifting circuit and this FPGA circuit, this positive voltage ECL conversion of signals is electric signal that walks abreast and the serial-parallel conversion circuit that sends to this FPGA circuit.
3. photooptical data conversion equipment according to claim 2 is characterized in that, this first onunit comprises:
Link to each other with this reception balanced device, this Low Voltage Differential Signal of this serial is carried out Filtering Processing and this Low Voltage Differential Signal of this serial of Filtering Processing sent to the match circuit of this reception balanced device.
4. photooptical data conversion equipment according to claim 3 is characterized in that:
This match circuit includes difference parallel impedance with voltage clamp effect and the RC circuit with filter action.
5. according to claim 2,3 or 4 described photooptical data conversion equipments, it is characterized in that:
This level shifting circuit comprises the pull-up resistor combinational circuit.
6. photooptical data conversion equipment according to claim 1 is characterized in that, the 3rd onunit comprises:
Link to each other with this FPGA circuit, the parallel electrical signal conversion that this FPGA circuit is sent becomes the serial-parallel conversion circuit that sends, the electrical signal conversion of the serial that receives is sent to for parallel electric signal this FPGA circuit behind the electric signal of serial;
Link to each other the level shifting circuit that receives the electric signal of serial and the electric signal of the serial that received carried out send after the level conversion with this serial-parallel conversion circuit;
Link to each other with this level shifting circuit, the electrical signal conversion of carrying out the serial after the level conversion through this level shifting circuit is light signal and sends, the light signal that receives is converted into the electric signal of serial and sends to the photoelectric commutator of this level shifting circuit.
7. photooptical data conversion equipment according to claim 6 is characterized in that:
The differential lines of this level shifting circuit is provided with the different clamp resistance of resistivity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011204157742U CN202305829U (en) | 2011-10-27 | 2011-10-27 | Photoelectric data conversion device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011204157742U CN202305829U (en) | 2011-10-27 | 2011-10-27 | Photoelectric data conversion device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202305829U true CN202305829U (en) | 2012-07-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011204157742U Expired - Lifetime CN202305829U (en) | 2011-10-27 | 2011-10-27 | Photoelectric data conversion device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202305829U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106330321A (en) * | 2015-06-24 | 2017-01-11 | 深圳市中兴微电子技术有限公司 | Strong filter canceling method and device |
-
2011
- 2011-10-27 CN CN2011204157742U patent/CN202305829U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106330321A (en) * | 2015-06-24 | 2017-01-11 | 深圳市中兴微电子技术有限公司 | Strong filter canceling method and device |
| CN106330321B (en) * | 2015-06-24 | 2019-02-05 | 深圳市中兴微电子技术有限公司 | A kind of filtering counteracting method and device by force |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 100010 Chaoyangmen North Street, Dongcheng District, Dongcheng District, Beijing Co-patentee after: China Oilfield Services Limited Patentee after: China Offshore Oil Group Co., Ltd. Address before: 100010 Chaoyangmen North Street, Dongcheng District, Dongcheng District, Beijing Co-patentee before: China Oilfield Services Limited Patentee before: China National Offshore Oil Corporation |
|
| CP01 | Change in the name or title of a patent holder | ||
| CX01 | Expiry of patent term |
Granted publication date: 20120704 |
|
| CX01 | Expiry of patent term |