CN202205196U - Serial apparatus general communication bus system - Google Patents
Serial apparatus general communication bus system Download PDFInfo
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- CN202205196U CN202205196U CN2011202796722U CN201120279672U CN202205196U CN 202205196 U CN202205196 U CN 202205196U CN 2011202796722 U CN2011202796722 U CN 2011202796722U CN 201120279672 U CN201120279672 U CN 201120279672U CN 202205196 U CN202205196 U CN 202205196U
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Abstract
The utility model discloses a serial apparatus general communication bus system including a master control chip, at least one I2C (Inter-Integrated Circuit) apparatus and at least one non-I2C serial apparatus, further including an SDA bus and an SCL bus, the clock line of the I2C apparatus is connected to the first GPIO (General Purpose Input/Output) of the master control chip via the SCL bus, the data line of the I2C apparatus is connected to the second GPIO of the master chip via the SDA bus, the clock line of the non-I2C serial apparatus is connected to the second GPIO of the master chip via the SDA bus, and the data line of the non-I2C serial apparatus is connected to the first GPIO of the master chip via the SCL bus. The system in the utility model realizes the general use of the I2C bus of the I2C apparatus and the non-I2C serial apparatus, thereby saving GPIO to be in favor of reducing the volume of the chip.
Description
Technical field
The utility model relates to the serial communication field, relates in particular to a kind of system of serial device common communication bus.
Background technology
Current consumer electronics industry competition is white-hot, and under the pressure of price, the master chip volume is done littler and littler, but its function also will increase, and therefore needs the peripherals of control increasing.At this moment, how to solve the bottleneck that GPIO (General Purpose Input Output, general I/O) the not enough problem of port becomes restriction chip " weight reducing ".
I2C (Inter-Integrated Circuit) bus is by the twin wire universal serial bus of PHILIPS company exploitation, is used to connect microcontroller and peripherals thereof, is a kind of bus standard that extensively adopt in microelectronics Control on Communication field.It is a kind of special shape of synchronous communication, and it is few to have an interface line, and control mode is simple, and the device package form is little, and traffic rate is than advantages such as height.The I2C bus has following characteristics:
1, requires two bus lines: a serial data line SDA, a serial time clock line SCL;
2, each be connected to the device of bus can be through unique address and simple main frame/slave of always existing concern the software set address, main frame can be used as main frame transmitter or main frame receiver;
3, it is real many host buses, if the initialization simultaneously of two or more main frames, data transmission can prevent that data are destroyed through collision detection and arbitration;
4,8 of serial bidirectional data transfers bit rate can reach 100kbit/s under mode standard, can reach 400kbit/s under the quick mode, can reach 3.4Mbit/s under the fast mode;
5, the IC quantity that is connected to same bus only receives the maximum capacitor 400pF restriction of bus.
In addition, the data on the sda line must keep stable in the high level period of clock, and the high or low level state of data line only could change when the clock signal of scl line is low level.When scl line was high level, sda line switched to low level from high level, and this situation is represented initial conditions.When scl line was high level, sda line was switched to high level by low level, and this situation is represented stop condition.Do not produce stop condition if produce the repetition initial conditions, bus can be in busy state always, and the initial conditions (S) of this moment are the same on function with repeating initial conditions (Sr).Each byte that sends on the sda line is necessary for 8, and the bytes in that each transmission can be sent is unrestricted.Must be after each byte with a response bit.At first transmission is the most significant digit (MSB) of data; If (for example in-line interrupt service routine) could receive or send next complete data byte after some other functions of confidential completion; Can make clock line SCL keep low level; Force main frame to get into waiting status, data transmission continues after slave is ready to receive next data byte and discharges clock line SCL.
The data transmission of I2C must be with response, and relevant response time clock is produced by main frame.Transmitter discharges sda line (height) during the time clock of response.During the time clock of response, receiver must drag down sda line, makes it between the high period of this time clock, keep stable low level.Usually the receiver that is addressed except the data with the beginning of CBUS address, must produce a response after each byte that receives.When slave can not respond slave addresses (for example it carrying out some real-time functions can not receive or send); Slave must make data line keep high level, and main frame produces a stop condition then and stops transmission or produce the repetition initial conditions beginning new transmission.If the slave receiver has responded slave addresses, but after having transmitted a period of time, can not receive more multidata byte, main frame must stop transmission again.This situation does not produce response with slave and representes after first byte.Slave makes data line keep high level, and main frame produces one and stops or repeating initial conditions.If in the transmission main frame receiver is arranged, it must not produce a response through last byte that does not produce clock at slave, finishes to slave transmitter notification data.The necessary release data line of slave transmitter allows main frame to produce one and stops or repeating initial conditions.
The addressing mode of I2C bus comprises 7 bit addressings and 10 bit addressings.With 7 bit addressings is example, has formed slave addresses for 7 of first byte, and lowest order (LSB) is the 8th, and it has determined the direction of transmission.The lowest order of first byte is " 0 ", and the expression main frame can write information to selected slave; " 1 " expression main frame can be to from machine sensible information; After having sent an address; Each device in the system all compares 7 addresses with it after initial conditions, if the same, device can judge that it is by hosts; So extremely the slave receiver still is the slave transmitter, is all determined by the R/W position.
In a lot of electronic products, adopt the I2C bus to carry out the communication of main control chip between peripherals.But, have some serial devices not support the I2C bus, here this serial device is called by " non-I2C serial device ", when the multiplexing I2C bus of non-I2C serial device, can with mutual interference mutually between the I2C equipment, influence operate as normal.
The utility model content
The technical matters that the utility model will solve is, can not shared I2C bus takies the defective of more GPIO to I2C equipment in the prior art and non-I2C serial device, and a kind of system of serial device common communication bus is provided.
The utility model solves the technical scheme that its technical matters adopted:
A kind of system of serial device common communication bus is provided; Comprise main control chip, at least one I2C equipment and at least one non-I2C serial device; Also comprise SDA bus and SCL bus; The clock line of said I2C equipment is connected to a GPIO of said main control chip through said SCL bus; The data line of said I2C equipment is connected to the 2nd GPIO of said main control chip through said SDA bus, and the clock line of said non-I2C serial device is connected to said the 2nd GPIO of said main control chip through said SDA bus, and the data line of said non-I2C serial device is connected to a said GPIO of said main control chip through said SCL bus.
In the system of the utility model serial device common communication bus, said I2C equipment is video electronic tuner module.
In the system of the utility model serial device common communication bus, said non-I2C serial device is a two-channel electronic sound volume controller.
The beneficial effect of the system of a kind of serial device common communication bus of the utility model is: receive on the SDA bus and the SDA of non-I2C serial device is received on the SCL bus through the SCL with non-I2C serial device; I2C equipment and the shared I2C bus of non-I2C serial device have been realized; Thereby saved GPIO, helped reducing chip volume.
Description of drawings
To combine accompanying drawing and embodiment that the utility model is described further below, in the accompanying drawing:
Fig. 1 is the chip synoptic diagram according to the video electronic tuner module (being tuner) of an embodiment of the utility model;
Fig. 2 is the I2C bus data transmission of video electronic tuner module shown in Figure 1 (being tuner) and replys synoptic diagram;
Fig. 3 is the synoptic diagram according to the two-channel electronic sound volume controller of an embodiment of the utility model;
Fig. 4 be two-channel electronic sound volume controller shown in Figure 3 serial data and clock concern synoptic diagram;
Fig. 5 is the structured flowchart according to the system of the serial device common communication bus of an embodiment of the utility model;
Fig. 6 is the circuit diagram according to the system of the serial device common communication bus of an embodiment of the utility model.
Embodiment
For the purpose, technical scheme and the advantage that make the utility model is clearer,, the utility model is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
Fig. 1 is the chip synoptic diagram according to the video electronic tuner module (being tuner) of an embodiment of the utility model.Fig. 2 is the I2C bus data transmission of video electronic tuner module shown in Figure 1 (being tuner) and replys synoptic diagram.Fig. 3 is the synoptic diagram according to the two-channel electronic sound volume controller of an embodiment of the utility model.Fig. 4 be two-channel electronic sound volume controller shown in Figure 3 serial data and clock concern synoptic diagram.Wherein, video electronic tuner module (being tuner) adopts standard I 2C mode to control, and two-channel electronic sound volume controller adopts serial data control.
Can find out from Fig. 2 and Fig. 4; If press normal connection; The clock line (I2C_SCL) of each I2C equipment is connected with the SCL bus; The data line (I2C_SDA) of each I2C equipment is connected with the SDA bus, the clock line (VOL_SCL) of each non-I2C serial device is connected with the clock bus of non-I2C universal serial bus, the data line (VOL_SDA) of each non-I2C serial device is connected with the data bus of non-I2C universal serial bus; Each need be connected to two GPIO and controls these two kinds of equipment respectively so, promptly needs 4 GPIO altogether.But; If directly the clock line with this two kind equipment all is connected on same the SCL bus; The data line of this two kind equipment all is directly connected on same the SDA bus; Though only need two GPIO to control altogether; But because non-I2C serial device (for example M62429) adopts simple serial data control communication mode, and can not the identification equipment address etc. information, therefore also can have influence on non-I2C serial device (for example M62429) when operating to I2C equipment (for example TUNER) when main control chip.Find out that thus such connected mode is infeasible.
Fig. 5 is the structured flowchart according to the system of the serial device common communication bus of an embodiment of the utility model.In the present embodiment, a kind of system of serial device common communication bus comprises main control chip 100, at least one I2C equipment 100 and at least one non-I2C serial device 200.In addition, this system also comprises and is used for SDA bus and SCL bus that 100 communications of equipment and main control chip are linked to each other.Wherein, The connected mode of I2C bus is identical with prior art; The clock line (I2C_SCL) that is I2C equipment 200 is connected to a GPIO of main control chip 100 through the SCL bus, and the data line of I2C equipment 200 (I2C_SDA) is connected to the 2nd GPIO of main control chip 100 through the SDA bus.But not the connected mode of I2C serial device 300 is different with I2C equipment 200; For fear of interference; The clock line of non-I2C serial device 300 (VOL_SCL) is connected to the 2nd GPIO of main control chip 100 through the SDA bus, and the data line of non-I2C serial device 300 (VOL_SDA) is connected to a GPIO of main control chip 100 through the SCL bus.
Fig. 6 is the circuit diagram according to the system of the serial device common communication bus of an embodiment of the utility model.In the present embodiment, I2C equipment 200 is video electronic tuner modules (TURNER), and non-I2C serial device 300 is two-channel electronic sound volume controllers (M62429).From the sequential chart of these the two kinds of equipment shown in Fig. 2 and 4, can find that only need two order wires of M62429 being exchanged cross connection with the I2C bus respectively, just can to avoid interference realization multiplexing.Promptly
TUNER：
I2C_SCL<--->SCL
I2C_SDA<--->SDA
M62429：
VOL_SCL<--->SDA
VLI_SDA<--->SCL
Though Fig. 6 has enumerated out concrete I2C equipment and non-I2C serial device, enumerating these examples only is for purpose of explanation, and is not used in restriction the utility model.In other embodiment of the utility model, can comprise the I2C equipment and the non-I2C serial device of any appropriate, as long as these non-I2C serial devices have the similar sequential chart with M62429.And, in other embodiment of the utility model, can comprise arbitrary characteristics or its combination of above-described the utility model.In addition, only show an I2C equipment and a non-I2C serial device though should be appreciated that Fig. 5 and Fig. 6, this only is for the purpose of simplifying the description, and in fact, a plurality of same categories of device can shared same communication bus.
In a word; The system of a kind of serial device common communication bus that the utility model provides receives on the SDA bus through the SCL with non-I2C serial device and the SDA of non-I2C serial device is received on the SCL bus; I2C equipment and the shared I2C bus of non-I2C serial device have been realized; Thereby saved GPIO, helped reducing chip volume.
Though the utility model describes through specific embodiment, it will be appreciated by those skilled in the art that, under the situation that does not break away from the utility model scope, can also carry out various conversion and be equal to alternative the utility model.In addition, to particular condition or material, can make various modifications to the utility model, and not break away from the scope of the utility model.Therefore, the utility model is not limited to disclosed specific embodiment, and should comprise the whole embodiments that fall in the utility model claim scope.
Claims (3)
1. the system of a serial device common communication bus; Comprise main control chip, at least one I2C equipment and at least one non-I2C serial device; Also comprise SDA bus and SCL bus; The clock line of said I2C equipment is connected to a GPIO of said main control chip through said SCL bus, and the data line of said I2C equipment is connected to the 2nd GPIO of said main control chip through said SDA bus, it is characterized in that; The clock line of said non-I2C serial device is connected to said the 2nd GPIO of said main control chip through said SDA bus, and the data line of said non-I2C serial device is connected to a said GPIO of said main control chip through said SCL bus.
2. the system of serial device common communication bus according to claim 1 is characterized in that, said I2C equipment is video electronic tuner module.
3. the system of serial device common communication bus according to claim 2 is characterized in that, said non-I2C serial device is a two-channel electronic sound volume controller.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011202796722U CN202205196U (en) | 2011-08-03 | 2011-08-03 | Serial apparatus general communication bus system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011202796722U CN202205196U (en) | 2011-08-03 | 2011-08-03 | Serial apparatus general communication bus system |
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| CN202205196U true CN202205196U (en) | 2012-04-25 |
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| CN2011202796722U Expired - Lifetime CN202205196U (en) | 2011-08-03 | 2011-08-03 | Serial apparatus general communication bus system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104679715A (en) * | 2013-12-03 | 2015-06-03 | 厦门雅迅网络股份有限公司 | Simple inter-chip communication method and simple inter-chip communication device |
-
2011
- 2011-08-03 CN CN2011202796722U patent/CN202205196U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104679715A (en) * | 2013-12-03 | 2015-06-03 | 厦门雅迅网络股份有限公司 | Simple inter-chip communication method and simple inter-chip communication device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Assignee: Shenzhen GIEC Electrical Appliance Manufacturing Co., Ltd. Assignor: Shenzhen Giec Electronics Co., Ltd. Contract record no.: 2014440020319 Denomination of utility model: Serial apparatus general communication bus system Granted publication date: 20120425 License type: Exclusive License Record date: 20140828 |
|
| LICC | Enforcement, change and cancellation of record of contracts on the licence for exploitation of a patent or utility model | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20120425 |