CN202183219U - Addressing parallel display drive circuit and system thereof - Google Patents
Addressing parallel display drive circuit and system thereof Download PDFInfo
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- CN202183219U CN202183219U CN2011201697039U CN201120169703U CN202183219U CN 202183219 U CN202183219 U CN 202183219U CN 2011201697039 U CN2011201697039 U CN 2011201697039U CN 201120169703 U CN201120169703 U CN 201120169703U CN 202183219 U CN202183219 U CN 202183219U
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Abstract
The utility model discloses an addressing parallel display drive circuit including a receiving and decoding module, a display data processing module and an address data processing module. The receiving and decoding module is used for decoding receiving data, extracting display data and address data, and inputting the display data and address data to the display data processing module and the address data processing module. The display data processing module is used for outputting a drive signal according to the display data and controlling an LED display device. The address data processing module is used for receiving and storing the address data and transmitting and outputting the address data. The utility model also discloses a display control system. By using the scheme in the utility model, the address data can be input in a serial connection manner and the data input can be displayed in a parallel connection manner in a special parallel integrated circuit having a function of controlling an independent light fixture, thereby improving the production efficiency and the reliability of an LED display drive chip, reducing the cost of the display system and optimizing the system performance.
Description
Technical field
The utility model relates to digital communicating field, and particularly, the utility model relates to addressable parallelly connected display driver circuit and system thereof.
Background technology
Because LED shows a type application product and have numerous advantages such as cheap, flexible configuration, reaction velocity be fast, so LED shows that a type application product playing the part of more and more important role in the middle of our daily life.For example, LED shows that product is applied to the route demonstration of bus, the large-scale screen that gives the correct time, the interest rate display screen of bank, commercial advertisement shielded or the like.
LED shows that product is very general in practical application, demonstrates different brightness in order to make demonstration of LED equipment or illumination application material, and the pattern of the continuous change that obtains enriching or effect need be controlled the display brightness of LED equipment.The control of brightness, normally data realize through the LED drive unit is write.The traditional data transmission, three wire protocols that use in the CAN bus of the single-wire-protocol that following classification: MAXIM is arranged that is widely known by the people, DMX512 single-wire-protocol, NRZ single-wire-protocol, IIC two-wire agreement, SMBUS two-wire agreement, automotive electronics employing, the SMBUS of power-supply management system, the LED display etc.
At present, LED video data control system roughly can be divided into following three kinds of modes:
First kind is that master control set is through many all lamp groups of data line control.Draw a lot of bar data lines from master control set, receive each lamp group respectively.This design is comparatively simple, but if lamp group number is many, each lamp group distance is far away, under distribution or the irregular arrangement situation, can cause that data line is many, problem such as complicacy is installed, and the cost that causes height, use are loaded down with trivial details, and synoptic diagram is as shown in Figure 1.
Second kind is to adopt the concatenation type control circuit.Light decoration, illuminator are by several controlled light fixtures of master control set control.System is divided into the subsystem of several series connection, and the light fixture between each subsystem is one another in series.If adopt the mode of shift register serial connection, utilize the characteristic of offset buffer, when the system control data of making arrives controlled light fixture, notifies each controlled light fixture latch data through specific coding form or extra again; If adopt the mode of data intercept, when light fixture receives data, be considered to this lamp data, this data cutout is got off, and close data-out port; When Data Receiving finishes, open data-out port, the data of next light fixture are sent through after the shaping.The advantage of concatenation type control circuit is, need not chip is done special processing, and each chip plug and play, maintenance cost is lower.But shortcoming is also very obvious, if be exactly after some light fixtures damages in this lamp string, can not carry out the transmission of data, being connected to the later lamp of this light fixture like this will be closed, perhaps Chang Liang, and synoptic diagram is as shown in Figure 2.If i light fixture damages, i light fixture all can't normally show to a last light fixture so.
The third design is to adopt to share the addressing parallel system.Each system is divided into a plurality of subsystems, and each subsystem is divided into a plurality of slaves, a control circuit is installed in each slave, and is given a specific address of each slave (ID).Therefore the signal wire that needs only each slave is connected on the signal bus, and system just can work, and synoptic diagram is as shown in Figure 3.With the CAN bus in the automotive electronics is example, because each slave has different functions, generally adopts different process chip, so slave addresses can be more easy to control because of different chips.When this method is applied to the LED display control program, replaces above-mentioned slave through using general chips such as single-chip microcomputer, thereby LED equipment is controlled, at this moment need single-chip microcomputer to have peripheral hardware or built-in non-effumability storage unit.The shortcoming of above-mentioned implementation is to have adopted general chip control light fixture, and cost is higher.
Based on above reason, be necessary to propose the corresponding techniques scheme, reduce system cost, improve system performance.
The utility model content
The purpose of the utility model is intended to solve at least one of above-mentioned technological deficiency; The parallelly connected tailored version integrated circuit that has the independent light fixture function of control especially through design; Improve the production efficiency and the reliability of LED display driver chip, reduced the cost of display system, optimized system performance.
In order to achieve the above object; The embodiment of the utility model has proposed a kind of display driver circuit on the one hand; Comprise and receive decoder module, video data processing module and address date processing module; The output of said reception decoder module is connected with said address date processing module with said video data processing module, and the output of said address date processing module is connected with said video data processing module;
Said reception decoder module is used for the data that receive are decoded, and isolates video data and address date, imports said video data processing module and said address date processing module respectively;
Said video data processing module is used for according to said video data output drive signal, control LED display device;
Said address date processing module is used for receiving and storing said address date, thereafter said address date is transmitted output.
The embodiment of the utility model has also proposed a kind of display control program on the other hand; Comprise video data control device and two or more drive circuit chips; Said video data control device connects data bus; Said drive circuit chip is parallel to said data bus with the shared bus mode, and said video data control device links to each other with each drive circuit chip through a data path, and said video data control device sends data and independently controls each drive circuit chip;
Said drive circuit chip comprises reception decoder module, video data processing module and address date processing module; The output of said reception decoder module is connected with said address date processing module with said video data processing module, and the output of said address date processing module is connected with said video data processing module;
Said reception decoder module is used for the data that receive are decoded, and isolates video data and address date, imports said video data processing module and said address date processing module respectively;
Said video data processing module is used for according to said video data output drive signal, control LED display device;
Said address date processing module is used for receiving and storing said address date, thereafter said address date is transmitted output.
The such scheme that the utility model proposes; For parallelly connected tailored version integrated circuit with the independent light fixture function of control; Can carry out address date with the mode of series connection writes, carries out video data in parallel and write; Improve the production efficiency and the reliability of LED display driver chip, reduced the cost of display system, optimized system performance.In addition, the such scheme that the utility model proposes, implementation is simple, efficient.
Aspect that the utility model is additional and advantage part in the following description provide, and part will become obviously from the following description, or recognize through the practice of the utility model.
Description of drawings
Above-mentioned and/or additional aspect of the utility model and advantage are from obviously with easily understanding becoming the description of embodiment below in conjunction with accompanying drawing, wherein:
Fig. 1 is a Parallel Control wire system synoptic diagram;
Fig. 2 is series connection control line system schematic;
Fig. 3 is a CAN bus parallel connection system schematic;
Fig. 4 is the utility model embodiment display driver circuit functional block diagram;
Fig. 5 is the utility model embodiment address date transmission synoptic diagram;
Fig. 6 is a kind of addressable parallelly connected display driver chip functional schematic of the utility model embodiment;
Fig. 7 is another addressable parallelly connected display driver chip functional schematic of the utility model embodiment;
Fig. 8 is another addressable parallelly connected display driver chip functional schematic of the utility model embodiment;
Fig. 9 is the utility model embodiment display control program synoptic diagram.
Embodiment
Describe the embodiment of the utility model below in detail, the example of said embodiment is shown in the drawings, and wherein identical from start to finish or similar label is represented identical or similar elements or the element with identical or similar functions.Be exemplary through the embodiment that is described with reference to the drawings below, only be used to explain the utility model, and can not be interpreted as restriction the utility model.
In order to realize the purpose of the utility model; The utility model embodiment has proposed a kind of display driver circuit; Comprise receiving decoder module, video data processing module and address date processing module, as shown in Figure 4, wherein; The output that receives decoder module is connected with the address date processing module with the video data processing module, and the output of address date processing module is connected with the video data processing module.
Particularly, receive decoder module and be used for the data that receive are decoded, isolate video data and address date, import video data processing module and address date processing module respectively.
The video data processing module is used for according to the video data output drive signal, control LED display device.
Furthermore, the video data processing module comprises video data memory module, pulse width modulation (PWM) module and LED driver module, and video data memory module, pulse width modulation (PWM) module and LED driver module are connected in series successively.
When receiving decoder module reception video data, whether decision writes the video data memory module with video data according to the address information in the data processing module of address;
The PWM module receives fundamental clock, and the video data in the video data memory module is handled, and obtains the dutycycle that conforms to video data, outputs to the LED driver module;
The LED driver module receives the input control LED display device of PWM module.
The address date processing module is used for receiving and address data, thereafter address date is transmitted output.
Wherein, the address storage medium in the address date processing module is non-effumability storage medium, comprises EEPROM, FLASH or OTP.
In the above-described embodiments, display driver circuit connects address date processing module wherein with the mode of series connection, and the address writing station connects the display driver circuit at top, display driver circuit is carried out serial address write.In addition, the address date processing module is carried out shaping filter to address date and is handled before address date is transmitted.
For example, address date as shown in Figure 5 transmits block diagram.For the ease of producing, the address writes takes the mode of chip series connection to carry out.The address writing station is connected to chip 1, and follow-up chip connects with the form of series connection, to the last a chip N.The address writing station need satisfy the Data Transport Protocol that the address writes, and according to this Data Transport Protocol, each series connection chip receives address information, and one's own address is deposited into address storage devices.This address storage devices adopts non-effumability storage medium, such as EEPROM, FLASH, one group or many group OTP (One Time Programmable, One Time Programmable) etc.And, because need the address date cascade, so after need carrying out shaping etc. and handle address date, send to the next stage chip.
Fig. 6 is a kind of addressable parallelly connected display driver chip functional schematic of the utility model embodiment.Comprise following function treatment: the receiving port receiving data information, to decode then, will decode back data INADD control and video data storage area carry out subsequent treatment.
Wherein, Data Receiving is used to receive the data that master control set sends, and data-signal is carried out shaping processing, filtering interfering processing etc.; Decoding is used for the output that data receive is decoded, if reception is address date, will sends into the address control and treatment and write operation is stored in the address; If what receive is video data, and, decode, and send into the video data storage, be used to control the brightness of LED lamp, reach certain display effect according to address stored in the storage of address; The address is controlled to be used to receive the address date of decoder module and to produce the address and is write instruction, comprises being used for writing of control address storage; Address storage is general adopts non-effumability storage medium, such as EEPROM, FLASH, OTP etc.From address control, receive after address date and address write instruction, address information is written in the non-effumability storage medium.And the address information that this module also will write is sent in the decoder module.When decoder module received video data, whether decision was written to the video data storage unit with the video data that receives according to address information; The address date transmit port is used to transmit the address information of subsequent cascaded chip.In the normal mode of operation that shows, this port can be for unsettled; The video data storage is used to store video data, and depositing video data is sent to the PWM module; Clock is the clock signal that is used to produce fixed cycle or frequency, and sends into the PWM module; The PWM module is the key modules of carrying out the LED brilliance control according to video data.This module is obtained the fundamental clock that is used for timing from clock module.According to preset PWM complete cycle, after video data handled, obtain the dutycycle that conforms to video data, output to the LED driver module.The LED driver module is used for driving LED equipment.The mode of operation of driving LED lamp can be a constant voltage mode, can also be constant current mode.Constant current mode needs chip to preset a constant current value, and this constant current value can be preset through chip internal, also can set through modes such as outer meeting resistances.Constant voltage mode needs external LED lamp series resistor to control constant current value.That is, the LED driver module receives the duty cycle information of PWM module output, and according to the interior if constant current value of peripheral hardware, the driving LED lamp is luminous, and produces certain display effect.
In addition, as shown in Figure 7 as another addressable parallelly connected display driver chip of the utility model embodiment, can above-mentioned Data Receiving function be split as two parts, be respectively applied for the decoding of video data and address date and write.
In addition, the non-effumability storage medium in the above-mentioned address memory module of mentioning in this patent can be built-in chip type, can also exist for form external, the chip visit.As shown in Figure 8, as another addressable parallelly connected display driver chip of the utility model embodiment.
After address date is successfully write, change the connected mode of data transmission, be revised as the parallel connection link by being connected in series.So just can carry out the input of video data to each chip of parallel connection.
As shown in Figure 9, the utility model embodiment has also proposed a kind of display control program, comprises video data control device and two or more drive circuit chips.Wherein, The video data control device connects data bus; Drive circuit chip is parallel to data bus with the shared bus mode; The video data control device links to each other with each drive circuit chip through a data path, and the video data control device sends data and independently controls each drive circuit chip.
Particularly; Drive circuit chip comprises reception decoder module, video data processing module and address date processing module; The output that receives decoder module is connected with the address date processing module with the video data processing module, and the output of address date processing module is connected with the video data processing module.
Receive decoder module, be used for the data that receive are decoded, isolate video data and address date, import video data processing module and address date processing module respectively.
The video data processing module is used for according to the video data output drive signal, control LED display device.
The video data processing module comprises video data memory module, pulse width modulation (PWM) module and LED driver module, and video data memory module, pulse width modulation (PWM) module and LED driver module are connected in series successively.
When receiving decoder module reception video data, whether decision writes the video data memory module with video data according to the address information in the data processing module of address;
The PWM module receives fundamental clock, and the video data in the video data memory module is handled, and obtains the dutycycle that conforms to video data, outputs to the LED driver module;
The LED driver module receives the input control LED display device of PWM module.
The address date processing module is used for receiving and address data, thereafter address date is transmitted output.
Address storage medium in the address date processing module is non-effumability storage medium, comprises EEPROM, FLASH or OTP.
Display driver circuit connects address date processing module wherein with the mode of series connection, and the address writing station connects the display driver circuit at top, display driver circuit is carried out serial address write.
The address date processing module is carried out shaping filter to address date and is handled before address date is transmitted.
In practical application, the parallel connection relation of master control set and each chip (slave) can avoid a light fixture to damage the problem that caused follow-up light fixture can not normally show.This video data master control set is connected to each slave through a data path.Certainly, it is a data line that a data path is not limited to, in practical application, according to different Data Transport Protocol specified data number of lines.Each slave receives corresponding data according to depositing the address.If video data master control set and this machine institute address stored are not inconsistent, will neglect this video data.The video data master control set can be controlled separately each slave like this.
In practical application, may exist because of data line is long, the heavier problems of Signal Integrity that influences data transmission of load, can be through modes such as data line booster tension, increase pull-up resistor be solved.
The such scheme that the utility model proposes; For parallelly connected tailored version integrated circuit with the independent light fixture function of control; Can carry out address date with the mode of series connection writes, carries out video data in parallel and write; Improve the production efficiency and the reliability of LED display driver chip, reduced the cost of display system, optimized system performance.In addition, the such scheme that the utility model proposes, implementation is simple, efficient.
One of ordinary skill in the art will appreciate that and realize that all or part of step that the foregoing description method is carried is to instruct relevant hardware to accomplish through program; Described program can be stored in a kind of computer-readable recording medium; This program comprises one of step or its combination of method embodiment when carrying out.
In addition, each functional unit in each embodiment of the utility model can be integrated in the processing module, also can be that the independent physics in each unit exists, and also can be integrated in the module two or more unit.Above-mentioned integrated module both can adopt the form of hardware to realize, also can adopt the form of software function module to realize.If said integrated module realizes with the form of software function module and during as independently production marketing or use, also can be stored in the computer read/write memory medium.
The above-mentioned storage medium of mentioning can be a ROM (read-only memory), disk or CD etc.
The above only is the embodiment of the utility model; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the utility model principle; Can also make some improvement and retouching, these improvement and retouching also should be regarded as the protection domain of the utility model.
Claims (10)
1. display driver circuit; It is characterized in that; Comprise and receive decoder module, video data processing module and address date processing module; The output of said reception decoder module is connected with said address date processing module with said video data processing module, and the output of said address date processing module is connected with said video data processing module;
Said reception decoder module is used for the data that receive are decoded, and isolates video data and address date, imports said video data processing module and said address date processing module respectively;
Said video data processing module is used for according to said video data output drive signal, control LED display device;
Said address date processing module is used for receiving and storing said address date, thereafter said address date is transmitted output.
2. display driver circuit as claimed in claim 1; It is characterized in that; Said video data processing module comprises video data memory module, pulse width modulation (PWM) module and LED driver module, and said video data memory module, pulse width modulation (PWM) module and LED driver module are connected in series successively;
When said reception decoder module received said video data, whether decision write said video data memory module with said video data according to the address information in the said address date processing module;
Said PWM module receives fundamental clock, and the video data in the said video data memory module is handled, and obtains the dutycycle that conforms to said video data, outputs to said LED driver module;
Said LED display device is controlled in the input that said LED driver module receives said PWM module.
3. display driver circuit as claimed in claim 1 is characterized in that, the address storage medium in the said address date processing module is non-effumability storage medium, comprises EEPROM, FLASH or OTP.
4. like one of any described display driver circuit of claim 1 to 3; It is characterized in that; Said display driver circuit connects said address date processing module wherein with the mode of series connection; The address writing station connects the display driver circuit at top, said display driver circuit is carried out serial address write.
5. display driver circuit as claimed in claim 4 is characterized in that, said address date processing module is carried out shaping filter to said address date and handled before said address date is transmitted.
6. display control program; It is characterized in that; Comprise video data control device and two or more drive circuit chips, said video data control device connects data bus, and said drive circuit chip is parallel to said data bus with the shared bus mode; Said video data control device links to each other with each drive circuit chip through a data path, and said video data control device sends data and independently controls each drive circuit chip;
Said drive circuit chip comprises reception decoder module, video data processing module and address date processing module; The output of said reception decoder module is connected with said address date processing module with said video data processing module, and the output of said address date processing module is connected with said video data processing module;
Said reception decoder module is used for the data that receive are decoded, and isolates video data and address date, imports said video data processing module and said address date processing module respectively;
Said video data processing module is used for according to said video data output drive signal, control LED display device;
Said address date processing module is used for receiving and storing said address date, thereafter said address date is transmitted output.
7. display control program as claimed in claim 6; It is characterized in that; Said video data processing module comprises video data memory module, pulse width modulation (PWM) module and LED driver module, and said video data memory module, pulse width modulation (PWM) module and LED driver module are connected in series successively;
When said reception decoder module received said video data, whether decision write said video data memory module with said video data according to the address information in the said address date processing module;
Said PWM module receives fundamental clock, and the video data in the said video data memory module is handled, and obtains the dutycycle that conforms to said video data, outputs to said LED driver module;
Said LED display device is controlled in the input that said LED driver module receives said PWM module.
8. display control program as claimed in claim 6 is characterized in that, the address storage medium in the said address date processing module is non-effumability storage medium, comprises EEPROM, FLASH or OTP.
9. like one of any described display control program of claim 6 to 8; It is characterized in that; Said display driver circuit connects said address date processing module wherein with the mode of series connection; The address writing station connects the display driver circuit at top, said display driver circuit is carried out serial address write.
10. display control program as claimed in claim 9 is characterized in that, said address date processing module is carried out shaping filter to said address date and handled before said address date is transmitted.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011201697039U CN202183219U (en) | 2011-05-25 | 2011-05-25 | Addressing parallel display drive circuit and system thereof |
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| CN2011201697039U CN202183219U (en) | 2011-05-25 | 2011-05-25 | Addressing parallel display drive circuit and system thereof |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102800279A (en) * | 2011-05-25 | 2012-11-28 | 深圳市明微电子股份有限公司 | Display drive circuit and system thereof |
| CN104066239A (en) * | 2014-06-05 | 2014-09-24 | 深圳市明微电子股份有限公司 | Bi-directional series display driving system and display device |
| CN104091558A (en) * | 2013-04-01 | 2014-10-08 | 香港理工大学 | LED display panel driving method and system |
| CN104332135A (en) * | 2014-10-30 | 2015-02-04 | 深圳市明微电子股份有限公司 | Parallel display circuit and display device thereof |
| WO2015074314A1 (en) * | 2013-11-22 | 2015-05-28 | 深圳市明微电子股份有限公司 | Address configuration method and device in parallel display control system |
| CN109064991A (en) * | 2018-10-23 | 2018-12-21 | 京东方科技集团股份有限公司 | Gate driving circuit and its control method, display device |
| CN110379357A (en) * | 2019-06-05 | 2019-10-25 | 宗仁科技(平潭)有限公司 | A kind of control method and device of parallel connection LED drive circuit |
| CN111696478A (en) * | 2019-09-10 | 2020-09-22 | 南京浣轩半导体有限公司 | RGB LED lamp bead integrated with driving chip, display screen and driving method |
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2011
- 2011-05-25 CN CN2011201697039U patent/CN202183219U/en not_active Expired - Lifetime
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102800279A (en) * | 2011-05-25 | 2012-11-28 | 深圳市明微电子股份有限公司 | Display drive circuit and system thereof |
| CN102800279B (en) * | 2011-05-25 | 2016-04-13 | 深圳市明微电子股份有限公司 | Addressable display drive method in parallel and system thereof |
| CN104091558A (en) * | 2013-04-01 | 2014-10-08 | 香港理工大学 | LED display panel driving method and system |
| WO2015074314A1 (en) * | 2013-11-22 | 2015-05-28 | 深圳市明微电子股份有限公司 | Address configuration method and device in parallel display control system |
| EP2892211A1 (en) * | 2013-11-22 | 2015-07-08 | Shenzhen Sunmoon Microelectronics Co. Ltd. | Address configuration method and device in parallel display control system |
| EP2892211A4 (en) * | 2013-11-22 | 2016-08-03 | Shenzhen Sunmoon Microelectronics Co Ltd | Address configuration method and device in parallel display control system |
| CN104066239A (en) * | 2014-06-05 | 2014-09-24 | 深圳市明微电子股份有限公司 | Bi-directional series display driving system and display device |
| CN104332135A (en) * | 2014-10-30 | 2015-02-04 | 深圳市明微电子股份有限公司 | Parallel display circuit and display device thereof |
| CN109064991A (en) * | 2018-10-23 | 2018-12-21 | 京东方科技集团股份有限公司 | Gate driving circuit and its control method, display device |
| CN109064991B (en) * | 2018-10-23 | 2020-12-29 | 京东方科技集团股份有限公司 | Gate drive circuit, control method thereof and display device |
| CN110379357A (en) * | 2019-06-05 | 2019-10-25 | 宗仁科技(平潭)有限公司 | A kind of control method and device of parallel connection LED drive circuit |
| CN111696478A (en) * | 2019-09-10 | 2020-09-22 | 南京浣轩半导体有限公司 | RGB LED lamp bead integrated with driving chip, display screen and driving method |
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Granted publication date: 20120404 |