CN202177893U - Terminal device - Google Patents
Terminal device Download PDFInfo
- Publication number
- CN202177893U CN202177893U CN2011202330313U CN201120233031U CN202177893U CN 202177893 U CN202177893 U CN 202177893U CN 2011202330313 U CN2011202330313 U CN 2011202330313U CN 201120233031 U CN201120233031 U CN 201120233031U CN 202177893 U CN202177893 U CN 202177893U
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- chip
- terminal device
- interface
- process chip
- processing chip
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Abstract
The utility model provides a terminal device, which comprises a connector chip, a first processing chip and a second processing chip, wherein the connector chip is used for being connected with external devices, the first processing chip is connected with the connector chip and used for detecting whether the connector chip is connected with the external devices during starting up, and the second processing chip is used for acquiring detection results of the first processing chip during starting up self-check. When the connector chip is connected with the external devices, the second processing chip is loaded with corresponding drive, and the second processing chip is connected with the first processing chip. The terminal device can effectively reduce time expended on personal system (PS)/2 device detection.
Description
Technical field
The utility model relates to the hardware monitoring technology, relates in particular to a kind of terminal device.
Background technology
The existing action that detects PS/2 equipment (slow devices) all is to be accomplished by BIOS (Basic Input or Output System (BIOS)) chip, and the time that the BIOS chip will spend about 150ms removes to detect PS/2 equipment, and the time of 150ms all spends in waits for the PS/2 response.
The utility model content
In order to address the above problem, the purpose of the embodiment of the utility model provides a kind of terminal device, can effectively reduce the time that PS/2 equipment is spent of detecting.
In order to achieve the above object, the embodiment of the utility model provides a kind of terminal device, comprising:
Be used for the interface chip that is connected with peripheral apparatus;
Be used for when start, detecting first process chip whether said interface chip is connected with said peripheral apparatus, be connected with said interface chip;
Be used for when carrying out startup self-detection; Obtain second process chip of the testing result of said first process chip; When said interface chip was connected with said peripheral apparatus, said second process chip loaded corresponding driving, and said second process chip is connected with said first process chip.
Preferably, said interface chip is the PS/2 interface.
Preferably, said peripheral apparatus is mouse or keyboard.
Preferably, said first process chip is super I/O chip.
Preferably, said second process chip is the BIOS chip.
Can know by technique scheme; The utlity model has following beneficial effect: when self check is carried out in start; Super I/O chip SIO capable of using carries out parallel processing, for the BIOS chip is saved the 150ms POST time, thereby effectively reduces the time that PS/2 equipment is spent of detecting.
Description of drawings
Shown in Figure 1 is the structured flowchart of terminal device among the embodiment of the utility model.
Embodiment
Understand for the purpose, technical scheme and the advantage that make the utility model is more clear,, the utility model embodiment is done further detailed description below in conjunction with embodiment and accompanying drawing.At this, illustrative examples of the utility model and explanation are used to explain the utility model, but not as the qualification of the utility model.
As shown in Figure 1, be the structured flowchart of terminal device among the embodiment of the utility model, this terminal device comprises:
Be used for the interface chip 11 that is connected with peripheral apparatus;
Be used for when start, detecting first process chip 12 whether this interface chip 11 is connected with peripheral apparatus, be connected with this interface chip 11;
Be used for when carrying out startup self-detection; Obtain second process chip 13 of the testing result of this first process chip 11; When this interface chip 11 was connected with peripheral apparatus, this second process chip 13 loaded corresponding driving, and this second process chip 13 is connected with this first process chip 12.
In the present embodiment, this interface chip is the PS/2 interface, and the peripheral apparatus that is connected with this interface chip is mouse or keyboard.
In the present embodiment, this first process chip 12 is super I/O chip (SIO).This super I/O chip generally is positioned at mainboard lower left or upper left side.The main chip that uses has Winbond, ITE, and it provides the control and treatment function for the standard I/O interface on the mainboard.
Processing capacities such as this first process chip 12 can integrated PS/2 keyboard, PS/2 mouse, serial ports COM, parallel port LPT interface, and these interfaces all are the equipment of I/O at a slow speed in the computing machine.These first process chip, 12 major functions comprise to be responsible for handling from the next serial data of device transmission such as keyboard, mouse, serial line interface, and they are converted into parallel data, also is responsible for the transmission and the processing of parallel interface, floppy drive interface data simultaneously.
In the present embodiment, second process chip 13 is the BIOS chip.This second process chip 13 can be through reading the content recognition Hardware configuration among the CMOS RAM, and it is carried out self check and initialization;
Can know by technique scheme; The utlity model has following beneficial effect: when self check is carried out in start; Super I/O chip capable of using carries out parallel processing, for the BIOS chip is saved the 150ms POST time, thereby effectively reduces the time that PS/2 equipment is spent of detecting.
Introduce with concrete flow process below, terminal device detects the process of PS/2 equipment in the present embodiment:
Step 1, terminal device start (Power on), first process chip 12 powers on, and simultaneously, second process chip 13 is carried out startup self-detection;
Step 2, first process chip 12 send a command to interface chip 11, detect interface chip 11 and whether be connected with PS/2 mouse or keyboard, when first process chip 12 detect accomplish after, a flag is set representes to have or do not have PS/2 equipment;
Step 3, second process chip 13 are obtained the testing result of first process chip 12 when carrying out initialization input device, if this flag representes to have PS/2 equipment, then second process chip 13 loads respective drive; If no, then skip.
The above only is the preferred implementation of the utility model; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the utility model principle; Can also make some improvement and retouching, these improvement and retouching also should be regarded as the protection domain of the utility model.
Claims (5)
1. a terminal device is characterized in that, comprising:
Be used for the interface chip that is connected with peripheral apparatus;
Be used for when start, detecting first process chip whether said interface chip is connected with said peripheral apparatus, be connected with said interface chip;
Be used for when carrying out startup self-detection; Obtain second process chip of the testing result of said first process chip; When said interface chip was connected with said peripheral apparatus, said second process chip loaded corresponding driving, and said second process chip is connected with said first process chip.
2. terminal device according to claim 1 is characterized in that, said interface chip is the PS/2 interface.
3. terminal device according to claim 2 is characterized in that, said peripheral apparatus is mouse or keyboard.
4. terminal device according to claim 1 is characterized in that, said first process chip is super I/O chip.
5. terminal device according to claim 1 is characterized in that, said second process chip is the BIOS chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011202330313U CN202177893U (en) | 2011-07-04 | 2011-07-04 | Terminal device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011202330313U CN202177893U (en) | 2011-07-04 | 2011-07-04 | Terminal device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202177893U true CN202177893U (en) | 2012-03-28 |
Family
ID=45867765
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011202330313U Expired - Fee Related CN202177893U (en) | 2011-07-04 | 2011-07-04 | Terminal device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202177893U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103631750A (en) * | 2012-08-29 | 2014-03-12 | 联想(北京)有限公司 | Information processing method and electronic equipment |
-
2011
- 2011-07-04 CN CN2011202330313U patent/CN202177893U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103631750A (en) * | 2012-08-29 | 2014-03-12 | 联想(北京)有限公司 | Information processing method and electronic equipment |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120328 Termination date: 20200704 |