CN202150272U - Circuit for preventing firmware loss caused by instant power failure for on-board solid-state hard disk - Google Patents
Circuit for preventing firmware loss caused by instant power failure for on-board solid-state hard disk Download PDFInfo
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- CN202150272U CN202150272U CN201120243861U CN201120243861U CN202150272U CN 202150272 U CN202150272 U CN 202150272U CN 201120243861 U CN201120243861 U CN 201120243861U CN 201120243861 U CN201120243861 U CN 201120243861U CN 202150272 U CN202150272 U CN 202150272U
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Abstract
The invention relates to the technology for preventing the loss of the data stored in solid-state hard disk, in particular to a circuit for preventing firmware loss caused by instant power failure for on-board solid-state hard disk. The circuit comprises a precision voltage source supply module, a comparator and a logic control device, wherein the input end of the precision voltage source supply module is electrically connected with a power supply; the output end of the precision voltage source supply module is electrically connected with the input end I of the comparator; the input end II of the comparator is electrically connected with an external power supply; the output end of the comparator is electrically connected with the input end I of the logic control device; the output end of the logic control device is electrically connected with a write-protected control interface of a flash memory chip; and the input end II of the logic control device is electrically connected with a main reset signal of the solid-state hard disk controller. The logic control device is a logic AND device. The circuit can protect the firmware of the solid-state hard disk from losing in instant power failure; and the problem of firmware loss of the on-board solid-state hard disk caused by instability of a power system can be thoroughly solved with low cost.
Description
Technical field
The utility model relates to the anti-loss of data technology of solid state hard disc storage, is specifically related to plate and carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss.
Background technology
All trades and professions require more and more harsher to power consumption, environmental suitability etc. in the fast-developing process of computing machine.As one of core storage in the computer industry variation has taken place quietly also, conventional machinery dish is substituted by electric board (claiming solid state hard disc or SSD usually again) step by step.Solid state hard disc can be adapted to various harsh applied environments at present with ultralow power consumption and good shock resistance.But because the controller of solid state hard disc needs compatible different Flash, so the controller of solid state hard disc is not done any configuration when dispatching from the factory usually.Usually need, the solid state hard disc in later stage carry out onlinely opening card or directly Flash being opened that be stuck in could normal use after carrying out welding assembly when producing.
The so-called card process of opening writes the particular data of producer's requirement and the relevant information of Flash in the appointed area in Flash in fact exactly.This block is normally strict protected, in case data that should the zone are destroyed then this solid-state disk possibly just become fragment of brick to use, has only and opens card again and just can normally use.For example this type phenomenon just is present in everybody USB flash disk used in everyday usually, possibly be exactly because the plug USB flash disk is perhaps forced in certain maloperation in the write data process, causes USB flash disk downright bad.
In the industry computer utility,, can be set to the circuit of solid state hard disc part on the embedded main board many times owing to special requirement.On the other hand in some certain applications system's externally fed power supply very instability power down may appear at any time.During outside power down, possible system writes data through solid-state hard disk controller toward Flash in, system do not foresee in the ablation process can appearance unusually.Same solid-state hard disk controller also can't be foreseen system power supply and occur unusually, still in positive frequentation Flash, writes relevant data.Because it all is that block according to address field and data segment writes usually that the data of Flash write, so most probably again in the ablation process because the unusual sudden change of power supply, cause that address lookup is made mistakes to be written to out the guard space that just can write when blocking.It is dead directly to cause whole solid-state disk directly to be hung, and can't normally use.Can only rerun out that the card instrument opens behind the card it could operate as normal, but open card afterwards legacy data will all be eliminated.This is that a randomness is bigger, but very fatal problem.
The utility model content
In order to address the above problem, the utility model proposes plate and carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss, can be when instant power-down, and the firmware of protection solid state hard disc can not lost.
For realizing above-mentioned purpose; The plate that the utility model provides carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss; Comprise that accurate voltage source provides module, comparer and logic control device; Said accurate voltage source provides the input end of module to be electrically connected with power supply; Precisely voltage source provides the output terminal of module to be electrically connected with the input end I of comparer, and the input end II of comparer is electrically connected with external power source, and the output terminal of comparer is electrically connected with the input end I of logic control device; The output terminal of said logic control device is electrically connected with the write-protect control interface of flash chip, and the input end II of said logic control device is electrically connected with the master reset signal interface of solid-state hard disk controller.
Said accurate voltage source provides module to comprise a shunt regulator able to programme, and the input end of said shunt regulator able to programme connects power supply, and output terminal connects the input end I of comparer.
Said shunt regulator model able to programme is LM431A.
The input end I of said comparer also connects by divider resistance R4 and divider resistance R5, and said divider resistance R4 is series between the output terminal of input end I and shunt regulator able to programme of comparer, and divider resistance R5 is series between the input end I and ground of comparer.
The input end II of said comparer connects external power source through divider resistance R2, and through divider resistance R3 ground connection.
Said logic control device is the logical and device.
The utility model proposes plate and carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss; Can be when instant power-down; The firmware of protection solid state hard disc can not lost, and under lower cost, thoroughly solves the problem of carrying the solid state hard disc firmware loss owing to the unstable plate that causes of electric system.
Description of drawings
For the purpose, technical scheme and the advantage that make the utility model is clearer, will combine accompanying drawing that the utility model is done further to describe in detail below:
Fig. 1 shows common SSD solid state hard disc and powers on and the write-protect principle schematic;
Fig. 2 shows the utility model plate and carries the principle schematic that the anti-instant power-down of solid state hard disc causes the circuit of firmware loss;
Fig. 3 shows in the utility model the circuit connection structure synoptic diagram that accurate voltage source provides module;
Fig. 4 shows the circuit connection structure synoptic diagram of comparer in the utility model;
Fig. 5 shows the circuit connection structure synoptic diagram of logic control device in the utility model;
Fig. 6 shows the circuit connection structure synoptic diagram of solid-state hard disk controller in the utility model.
Embodiment
Below will be with reference to accompanying drawing, the preferred embodiment of the utility model is carried out detailed description.
Whether the master reset signal of common SSD solid-state hard disk controller normal and stable.Be to judge that controller power source is ready to N/R foundation.The WP# signal of Flash is the important evidence of informing whether Flash can write.
Referring to Fig. 1, conventional SSD solid state hard disc can utilize initialization controller behind the delay time that the RC delay circuit realizes that the chip power supply OK and the RC that delays time set in order to save cost.The WP# signal can directly be pulled to the VCC power supply and guarantee that Flash can be written into effectively.Part producer also can increase a switch and realize the write-protect to Flash, in case but write-protect promptly mean and can can't write data always up to removing the write-protect function.This kind circuit methods externally can't quickly respond to the power loss event very first time protected data during abnormity of power supply power down at all.
Referring to Fig. 2; The plate that the utility model provides carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss; Comprise that accurate voltage source provides module, comparer and logic control device, said accurate voltage source provides the input end of module to be electrically connected with power supply, and precisely voltage source provides the output terminal of module to be electrically connected with the input end I of comparer U1A; The input end II of comparer U1A is electrically connected with external power source, and the output terminal of comparer U1A is electrically connected with the input end I of logic control device U2.
Referring to Fig. 3; Said accurate voltage source provides module to comprise a shunt regulator Q1 able to programme; The input end of said shunt regulator Q1 able to programme connects power supply VCC through resistance R 1, and output terminal connects the input end I of comparer U1A, the other end ground connection of shunt regulator Q1 able to programme.Said shunt regulator able to programme can be selected the voltage stabilizing switching device of LM431A or equal model for use.
Referring to Fig. 4; The input end I of said comparer U1A also connects by divider resistance R4 and divider resistance R5; Said divider resistance R4 is series between the output terminal of input end I and shunt regulator able to programme of comparer U1A, and divider resistance R5 is series between the input end I and ground of comparer U1A.The input end II of said comparer U1A connects external power source through divider resistance R2, and through divider resistance R3 ground connection.
Referring to Fig. 5, Fig. 6; Said logic control device is logical and device U2; The output terminal of said logical and device U2 is electrically connected with the write-protect control interface WP# of flash chip, and the input end II of said logical and device U2 is electrically connected with the master reset signal interface of solid-state hard disk controller.
The principle of work of the utility model is following: LM431A is convertible to go out a reliable and stable voltage source, and this voltage can guarantee to reduce near still keeping normal level output before the VREF RP at preceding level power supply.And do dividing potential drop through R4 and R5 resistance and configure the datum of preset definite value as the input end I of comparer U1A, the primary power power supply of outside input is through the minimum voltage point of adjustment R2 and R3 initialization system demand external power source and the input end II of access U1A.The output terminal of U1A is connected with the input end I of logical and device U2, and the input end II of logical and chip U2 links to each other with the PLTRST# signal that system platform provides.The write-protect control interface WP# of the output terminal of U2 and flash chip links to each other.The PLTRST# of system platform links to each other with the master reset signal of solid-state hard disk controller.
Solid-state hard disk controller is in the RESET state and the flash chip write-protect equally also is allowed to synchronously before the stable output of PLTRST# in normal power up.Solid-state hard disk controller can not send any instruction and be given to flash chip in this process, and flash chip can not accepted any write operation yet.
In the main frame normal course of operation, whether in normal range of operation, take place unusual then can notify the flash chip very first time to protect the data of having deposited in the flash chip at once in case U1A can detect the voltage of outside input in real time.For example host computer system input voltage normal value is+12V; And in a single day outer power voltage is lower than the 11V system with cisco unity malfunction; The input end II level that then need realize U1A according to the value of the input voltage value of 11V adjustment R2 and R3 is the reference value that be higher than the input end I setting of U1A in operate as normal, in case be lower than that outer power voltage is lower than 11V then the input end II level of U1A will be lower than the value of the input end I of U1A.Externally power supply just often the output terminal of U1A be output as high level, in case detecting voltage is to output low level immediately unusually.And carry out behind the logical and WP# signal of flash chip is dragged down through logical and device U2 and PLTRST# signal, directly make flash chip get into the write-protect pattern.Thereby realize defencive function apace.
So the utility model is equally applicable to adopt other Embedded Application of electronic storage devices such as flash chip.
Claims (6)
1. plate carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss; It is characterized in that: comprise that accurate voltage source provides module, comparer and logic control device; Said accurate voltage source provides the input end of module to be electrically connected with power supply; Precisely voltage source provides the output terminal of module to be electrically connected with the input end I of comparer, and the input end II of comparer is electrically connected with external power source, and the output terminal of comparer is electrically connected with the input end I of logic control device; The output terminal of said logic control device is electrically connected with the write-protect control interface of flash chip, and the input end II of said logic control device is electrically connected with the master reset signal interface of solid-state hard disk controller.
2. plate according to claim 1 carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss; It is characterized in that: said accurate voltage source provides module to comprise a shunt regulator able to programme; The input end of said shunt regulator able to programme connects power supply, and output terminal connects the input end I of comparer.
3. plate according to claim 2 carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss, and it is characterized in that: said shunt regulator model able to programme is LM431A.
4. carry the circuit that the anti-instant power-down of solid state hard disc causes firmware loss according to each described plate in the claim 1 to 3; It is characterized in that: the input end I of said comparer also connects by divider resistance R4 and divider resistance R5; Said divider resistance R4 is series between the output terminal of input end I and shunt regulator able to programme of comparer, and divider resistance R5 is series between the input end I and ground of comparer.
5. plate according to claim 4 carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss, and it is characterized in that: the input end II of said comparer connects external power source through divider resistance R2, and through divider resistance R3 ground connection.
6. plate according to claim 4 carries the circuit that the anti-instant power-down of solid state hard disc causes firmware loss, and it is characterized in that: said logic control device is the logical and device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201120243861U CN202150272U (en) | 2011-07-12 | 2011-07-12 | Circuit for preventing firmware loss caused by instant power failure for on-board solid-state hard disk |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201120243861U CN202150272U (en) | 2011-07-12 | 2011-07-12 | Circuit for preventing firmware loss caused by instant power failure for on-board solid-state hard disk |
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| Publication Number | Publication Date |
|---|---|
| CN202150272U true CN202150272U (en) | 2012-02-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201120243861U Expired - Fee Related CN202150272U (en) | 2011-07-12 | 2011-07-12 | Circuit for preventing firmware loss caused by instant power failure for on-board solid-state hard disk |
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| CN (1) | CN202150272U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019007112A1 (en) * | 2017-07-06 | 2019-01-10 | 深圳市英蓓特科技有限公司 | Nand flash data protection circuit |
| CN109388526A (en) * | 2018-11-01 | 2019-02-26 | 郑州云海信息技术有限公司 | A kind of control circuit and the method for resetting operation |
-
2011
- 2011-07-12 CN CN201120243861U patent/CN202150272U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019007112A1 (en) * | 2017-07-06 | 2019-01-10 | 深圳市英蓓特科技有限公司 | Nand flash data protection circuit |
| CN109388526A (en) * | 2018-11-01 | 2019-02-26 | 郑州云海信息技术有限公司 | A kind of control circuit and the method for resetting operation |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120222 Termination date: 20190712 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |