CN202121759U

CN202121759U - Pop noise suppression circuit

Info

Publication number: CN202121759U
Application number: CN2011202292735U
Authority: CN
Inventors: 黄俊维
Original assignee: IPGoal Microelectronics Sichuan Co Ltd
Current assignee: IPGoal Microelectronics Sichuan Co Ltd
Priority date: 2011-07-01
Filing date: 2011-07-01
Publication date: 2012-01-18
Anticipated expiration: 2021-07-01

Abstract

The utility model relates to a POP noise suppression circuit which includes a blocking capacitor, an output element connected with the blocking capacitor, a current generating unit, a charging unit connected with the current generating unit, a discharging unit connected with the current generating unit, a switch unit connected with the charging unit and the discharging unit, and a power amplification unit connected between the switch unit and the blocking capacitor. The current generating unit provides a slowly rising current to the charging unit and the discharging unit respectively. The switch unit switches the operation between the charging unit and the discharging unit. The charging unit forms a charging current which firstly increases smoothly and slowly and then decreases smoothly and slowly, and the discharging unit forms a discharging current which firstly increases smoothly and slowly and then decreases smoothly and slowly. The voltage in the blocking capacitor smoothly increases after an audio system is powered on and smoothly decreases after the audio system is powered off. The POP noise suppression circuit can effectively suppress the POP noises.

Description

The POP noise suppression circuit

Technical field

The utility model relates to a kind of audio frequency processing circuit, refers to a kind of simple in structure and can suppress the POP noise suppression circuit of POP noise especially.

Background technology

The POP noise is meant the ubiquitous noise that in start and shutdown process, produces in the audio system.

In audio system; Power amplifier usually will utilize a big electric capacity as capacitance when driving loudspeaker or earphone; In start, need the voltage of electric capacity be dashed to common mode electrical level; And in shutdown, need the voltage in the electric capacity be put to 0, so just in start and shutdown, loudspeaker or earphone are impacted easily and form the POP noise, and make responsive ear very uncomfortable.Therefore, be necessary to provide a kind of POP noise suppression circuit that can effectively suppress the POP noise.

Summary of the invention

In view of above content, be necessary to provide a kind of simple in structure and can suppress the POP noise suppression circuit of POP noise.

A kind of POP noise suppression circuit; Be used for an audio system; Said POP noise suppression circuit comprises the output element that a capacitance and links to each other with said capacitance; Said POP noise suppression circuit comprises that also the switch element and that discharge cell, that charhing unit, that a current generating unit, links to each other with said current generating unit links to each other with said current generating unit links to each other with said charhing unit and said discharge cell is connected in the power amplification unit between said switch element and the said capacitance; Said current generating unit provides a slow electric current that rises to said charhing unit and said discharge cell respectively; Said switch element switches the work between said charhing unit and the said discharge cell; Said charhing unit forms the charging current that a slowly level and smooth earlier increase back slowly smoothly reduces; Said discharge cell forms one and slowly smoothly earlier increases the discharging current that the back slowly smoothly reduces, the level and smooth rising when said audio system start of the voltage in the said capacitance, level and smooth decline when said audio system shutdown.

Preferably; Said current generating unit comprises one the 3rd FET, one the 4th FET, one the 5th FET, one the 6th FET, one the 7th FET, one the 8th FET, one the 9th FET, a reference current source, one first resistance and one first electric capacity; The grid of said the 3rd FET, source electrode and the common end that is connected said reference current source of the grid of said the 4th FET; The other end ground connection of said reference current source; The source electrode of said the 4th FET connects the grid of the drain electrode of said the 9th FET, said the 8th FET and the anode of said first electric capacity, and the grid of the grid of the drain electrode of said the 8th FET, said the 5th FET, source electrode, said the 6th FET and the grid of said the 7th FET link to each other jointly.

Preferably; The source electrode of said the 8th FET links to each other with an end of said first resistance; The grid of said the 9th FET connects one first voltage end; The other end common ground of the negative terminal of the source electrode of said the 9th FET, said first electric capacity and said first resistance, the common power end that connects of the drain electrode of the drain electrode of the drain electrode of said the 3rd FET, said the 4th FET, the drain electrode of said the 5th FET, said the 6th FET and the drain electrode of said the 7th FET.

Preferably; Said charhing unit comprises an operational amplifier and a filter capacitor; The source electrode of said the 7th FET links to each other with a power control terminal of said operational amplifier; One normal phase input end of said operational amplifier links to each other with a reference voltage end, and an inverting input of said operational amplifier links to each other with an output of said operational amplifier.

Preferably; Said switch element comprises one first FET and one second FET; Said discharge cell comprises 1 the tenth FET and 1 the 11 FET; The source electrode of said the 6th FET links to each other with grid, the drain electrode of said the tenth FET, and the output of said operational amplifier links to each other with the source electrode of said first FET, and the grid of said first FET connects one second voltage end.

Preferably; The negative terminal common ground of the source electrode of said the tenth FET, the source electrode of said the 11 FET and said filter capacitor; The grid of said second FET connects a tertiary voltage end, and the source electrode of said second FET links to each other with the drain electrode of said the 11 FET.

Preferably; Said power amplification unit comprises a power amplifier, one second resistance, one the 3rd resistance and 1 the 12 FET; The drain electrode of said first FET links to each other with a normal phase input end of the drain electrode of said second FET, said power amplifier and the anode of said filter capacitor jointly; One end of said second resistance connects an audio input end; The grid of said the 12 FET connects a quiet control end; The common inverting input that connects said power amplifier of one end of the source electrode of said the 12 FET, said the 3rd resistance and the other end of said second resistance; The common end that connects said capacitance of one output of the other end of the drain electrode of said the 12 FET, said the 3rd resistance and said power amplifier, the other end of said capacitance links to each other with said output element.

Relative prior art; The utility model POP noise suppression circuit can be so that slowly level and smooth rising of the voltage in the capacitance when start; The slowly level and smooth decline of voltage in shutdown the time makes capacitance, simple in structure and can effectively suppress the POP noise that audio system forms in switching on and shutting down.

Description of drawings

Fig. 1 is the system block diagram of the utility model POP noise suppression circuit preferred embodiments.

Fig. 2 is the circuit diagram of the utility model POP noise suppression circuit preferred embodiments.

Fig. 3 is the circuit diagram of operational amplifier in the utility model POP noise suppression circuit preferred embodiments.

Fig. 4 is the oscillogram of charging current and discharging current in the utility model POP noise suppression circuit preferred embodiments.

Fig. 5 is the voltage oscillogram of capacitance in the utility model POP noise suppression circuit preferred embodiments.

Embodiment

See also Fig. 1, the utility model POP noise suppression circuit preferred embodiments comprises the output element that capacitance CAC and that power amplification unit, that switch element, that discharge cell, that charhing unit, that a current generating unit, links to each other with this current generating unit links to each other with this current generating unit links to each other with this charhing unit and this discharge cell links to each other with this switch element links to each other with this power amplification unit links to each other with this capacitance.

Please consult Fig. 2 simultaneously, in this execution mode, this switch element comprises one first FET M1 and one second FET M2, and this output element is a loudspeaker SPEAKER.This current generating unit comprises one the 3rd FET M3; One the 4th FET M4; One the 5th FET M5; One the 6th FET M6; One the 7th FET M7; One the 8th FET M8; One the 9th FET M9; One reference current source I

Figure 2011202292735100002DEST_PATH_IMAGE001

; One first resistance R 1 and one first capacitor C 1.This charhing unit comprises an operational amplifier BUFFER and a filter capacitor CVCM.This discharge cell comprises 1 the tenth FET M10 and 1 the 11 FET M11, and this discharge cell also comprises this second FET M2 and this filter capacitor CVCM.This power amplification unit comprises a power amplifier HP, one second resistance R 2, one the 3rd resistance R 3 and 1 the 12 FET M12.

This current generating unit is used for slowly level and smooth first electric current I 1 that rises to this charhing unit being provided, and slowly level and smooth second electric current I 2 that rises is provided for this discharge cell; This charhing unit is used for charging to this filter capacitor CVCM, and forms the charging current ICH that slowly smoothly reduces behind slowly level and smooth earlier the increase; This discharge cell is used for discharging to this filter capacitor CVCM, and forms the discharging current IDIS that slowly smoothly reduces behind slowly level and smooth earlier the increase; This switch element is used to switch the work between this charhing unit and this discharge cell; This power amplification unit is used to drive these loudspeaker SPEAKER, so that these loudspeaker SPEAKER can operate as normal; This capacitance CAC is used for the isolated DC signal, only allows audio signal to pass through.

The physical circuit annexation of the utility model POP noise suppression circuit preferred embodiments is following: the grid of the 3rd FET M3 in this current generating unit, source electrode and the grid of the 4th FET M4 are connected the end of this reference current source I , the other end ground connection of this reference current source I jointly.The source electrode of the 4th FET M4 connects drain electrode, the grid of the 8th FET M8 and the anode of this first capacitor C 1 of the 9th FET M9, and the grid of the grid of the drain electrode of the 8th FET M8, the 5th FET M5, source electrode, the 6th FET M6 and the grid of the 7th FET M7 link to each other jointly.The source electrode of the 8th FET M8 links to each other with an end of this first resistance R 1; The grid of the 9th FET M9 connects one first voltage end C_DIS_F, the negative terminal of the source electrode of the 9th FET M9, this first capacitor C 1 and the other end common ground of this first resistance R 1.The common power end AVD that connects of the drain electrode of the drain electrode of the drain electrode of the drain electrode of the drain electrode of the 3rd FET M3, the 4th FET M4, the 5th FET M5, the 6th FET M6 and the 7th FET M7.The source electrode of the 7th FET M7 links to each other with the power control terminal IB of operational amplifier BUFFER in this charhing unit; And export first electric current I 1 to this charhing unit; The grid of the tenth FET M10, drain electrode link to each other, and export second electric current I 2 to this discharge cell in the source electrode of the 6th FET M6 and this discharge cell.The normal phase input end IP of this operational amplifier BUFFER links to each other with a reference voltage end V

, and the inverting input IN of this operational amplifier BUFFER links to each other with the output OUT of this operational amplifier BUFFER.The output OUT of this operational amplifier BUFFER links to each other with the source electrode of this first FET M1; The grid of this first FET M1 connects one second voltage end UP, and the drain electrode of this first FET M1 links to each other with the normal phase input end of the drain electrode of this second FET M2, this power amplifier HP and the anode of this filter capacitor CVCM jointly.The negative terminal common ground of the source electrode of the tenth FET M10, the source electrode of the 11 FET M11 and this filter capacitor CVCM.The grid of this second FET M2 connects a tertiary voltage end DOWN, and the source electrode of this second FET M2 links to each other with the drain electrode of the 11 FET M11.One end of this second resistance R 2 connects an audio input end LINEIN; The grid of the 12 FET M12 connects a quiet control end MUTE; One end of the source electrode of the 12 FET M12, the 3rd resistance R 3 and the other end of this second resistance R 2 connect the inverting input of this power amplifier HP jointly; The output of the other end of the drain electrode of the 12 FET M12, the 3rd resistance R 3 and this power amplifier HP connects the end of this capacitance CAC jointly, and the other end of this capacitance CAC links to each other with these loudspeaker SPEAKER.

See also Fig. 3; Fig. 3 is the inner circuit structure diagram of operational amplifier BUFFER in the charhing unit of the utility model POP noise suppression circuit preferred embodiments, and it comprises 1 the 13 FET M13,1 the 14 FET M14,1 the 15 FET M15,1 the 16 FET M16,1 the 17 FET M17,1 the 18 FET M18,1 the 19 FET M19, one the 20 FET M20, one the 21 FET M21 and one the 22 FET M22.Its concrete annexation is following: the grid of the 13 FET M13 connects this inverting input IN; The grid of the 14 FET M14 connects this normal phase input end IP, and the 13 FET M13 is connected this power control terminal IB jointly with the source electrode of the 14 FET M14.The drain electrode of the 13 FET M13 links to each other with the source electrode of the 20 FET M20 and the drain electrode of the 22 FET M22, and the drain electrode of the 14 FET M14 links to each other with the source electrode of the 19 FET M19 and the drain electrode of the 21 FET M21.The drain electrode of the grid of the 15 FET M15, the grid of the 16 FET M16, the 17 FET M17 links to each other with the drain electrode of the 19 FET M19 jointly; The source electrode of the 15 FET M15 is connected power end AVD jointly with the source electrode of the 16 FET M16; The drain electrode of the 15 FET M15 links to each other with the source electrode of the 17 FET M17; The drain electrode of the 16 FET M16 links to each other with the source electrode of the 18 FET M18, and the grid of the 17 FET M17 links to each other with the grid of the 18 FET M18.The grid of the 19 FET M19 links to each other with the grid of the 20 FET M20; The grid of the 21 FET M21 links to each other with the grid of the 22 FET M22, the source electrode common ground of the source electrode of the 21 FET M21 and the 22 FET M22.The drain electrode of the 18 FET M18 is connected this output OUT jointly with the drain electrode of the 20 FET M20.

The principle Analysis of the utility model POP noise suppression circuit is following:

In order to suppress the POP noise, we need make the slowly level and smooth rising of voltage among the capacitance CAC when start, when shutdown, make slowly level and smooth decline of voltage among the capacitance CAC promptly to present S type as shown in Figure 5 and anti-S type.

In the utility model POP noise suppression circuit; In the time of charhing unit work; This first voltage end C_DIS_F is a low level; The 9th FET M9 breaks off; This moment, the positive terminal voltage VG of this first capacitor C 1 was a low level; By this reference current source I this first capacitor C 1 is charged and to make that positive terminal voltage VG is slowly level and smooth to rise; Thereby between the 5th FET M5 and the 8th FET M8, form an electric current I 0; Its value is (VG-

Figure 2011202292735100002DEST_PATH_IMAGE003

)/R1, because voltage VG is slowly level and smooth the rising, so electric current I 0 is a slowly level and smooth electric current that rises; Because the 7th FET M7 is the mirror image of the 5th FET, therefore just produced slowly level and smooth first electric current I 1 that rises; Because the 6th FET M6 also is the mirror image of the 5th FET, therefore just produced slowly level and smooth second electric current I 2 that rises.

In the time of discharge cell work; This first voltage end C_DIS_F is set to high level earlier; It is 0 that the 9th FET M9 is put the voltage of this first capacitor C 1; And then this first voltage end C_DIS_F is set to low level; Close the 9th FET M9, this reference current source I

begins this first capacitor C 1 is charged simultaneously, same first electric current I 1 and second electric current I 2 that produces slowly level and smooth rising.

In startup and shutdown, need this POP noise suppression circuit is arranged to silent mode, be about to this quiet control end MUTE and be set to high level, then this moment, this power amplifier HP was the unit gain structure.

In start, this second voltage end UP is a high level, and this first FET M1 is closed, and this tertiary voltage end DOWN is a low level, and this second FET M2 breaks off, and then this charhing unit is started working, and discharge cell breaks off.At this moment, this operational amplifier BUFFER is the unit gain structure, and first electric current I 1 that inputs to this charhing unit be one slowly and the level and smooth electric current that rises.The normal phase input end IP of this operational amplifier BUFFER imports a common-mode voltage; The anode that is input as this filter capacitor CVCM of inverting input IN; Voltage on this filter capacitor CVCM had been 0 before start; Thereby this operational amplifier BUFFER is in open-circuit condition at this moment; I3=I1 then, so I4=0 is charging current ICH=I3-I4=I1; Be that ICH begins be one slowly and the level and smooth electric current that rises; Along with the voltage on this filter capacitor CVCM moves closer to the common-mode voltage of reference voltage end V

input, this moment, I4 set up gradually, and ICH can reduce gradually and form one slowly and the electric current of level and smooth decline like this.Therefore form the slowly level and smooth charging current that then slowly smoothly reduces that increases of elder generation as shown in Figure 4; Because this power amplifier HP is the unit gain structure; Promptly export along with the variation of input and change; The change in voltage relation in direct ratio of the normal phase input end of the change in voltage among this capacitance CAC and this power amplifier HP then; Because the change in voltage of the normal phase input end of this power amplifier HP changes along with the variation of this charging current slowly, therefore in start, the voltage among this capacitance CAC presents the S type curve of rising again.

In shutdown, this second voltage end UP is a low level, and this first FET M1 breaks off, and this tertiary voltage end DOWN is a high level, and this second FET M2 is closed, and then this charhing unit breaks off, and this discharge cell is started working.At this moment; The grid voltage of this second FET M2 is a high level; With the 11 this second electric current I 2 of FET M11 mirror image, this second electric current I 2 is a slowly level and smooth electric current that rises, because the drain voltage of the 11 FET M11 is a common-mode voltage; Be in the saturation region, so this discharging current IDIS just equals this second electric current I 2.Along with the voltage on this filter capacitor CVCM is bled off gradually; The voltage VDS that the 11 FET M11 goes up between drain electrode and the source class also reduces gradually; This can make that also discharging current IDIS progressively reduces; Therefore form also that elder generation as shown in Figure 4 is slowly level and smooth to increase the discharging current that then slowly smoothly reduces,, promptly export along with the variation of input and change because this power amplifier HP is the unit gain structure; The change in voltage relation in direct ratio of the normal phase input end of the change in voltage among this capacitance CAC and this power amplifier HP then; Because the change in voltage of the normal phase input end of this power amplifier HP changes along with the variation of this charging current slowly, therefore in shutdown, the voltage among this capacitance CAC presents the anti-S type curve of decline again.

The utility model POP noise suppression circuit can be so that slowly level and smooth rising of the voltage among the capacitance CAC when start; The slowly level and smooth decline of voltage in shutdown the time makes capacitance CAC, simple in structure and can effectively suppress the POP noise that audio system forms in switching on and shutting down.

Claims

1. POP noise suppression circuit; Be used for an audio system; Said POP noise suppression circuit comprises the output element that a capacitance and links to each other with said capacitance; It is characterized in that: said POP noise suppression circuit comprises that also the switch element and that discharge cell, that charhing unit, that a current generating unit, links to each other with said current generating unit links to each other with said current generating unit links to each other with said charhing unit and said discharge cell is connected in the power amplification unit between said switch element and the said capacitance; Said current generating unit provides a slow electric current that rises to said charhing unit and said discharge cell respectively; Said switch element switches the work between said charhing unit and the said discharge cell; Said charhing unit forms the charging current that a slowly level and smooth earlier increase back slowly smoothly reduces; Said discharge cell forms one and slowly smoothly earlier increases the discharging current that the back slowly smoothly reduces, the level and smooth rising when said audio system start of the voltage in the said capacitance, level and smooth decline when said audio system shutdown.

2. POP noise suppression circuit as claimed in claim 1; It is characterized in that: said current generating unit comprises one the 3rd FET, one the 4th FET, one the 5th FET, one the 6th FET, one the 7th FET, one the 8th FET, one the 9th FET, a reference current source, one first resistance and one first electric capacity; The grid of said the 3rd FET, source electrode and the common end that is connected said reference current source of the grid of said the 4th FET; The other end ground connection of said reference current source; The source electrode of said the 4th FET connects the grid of the drain electrode of said the 9th FET, said the 8th FET and the anode of said first electric capacity, and the grid of the grid of the drain electrode of said the 8th FET, said the 5th FET, source electrode, said the 6th FET and the grid of said the 7th FET link to each other jointly.

3. POP noise suppression circuit as claimed in claim 2; It is characterized in that: the source electrode of said the 8th FET links to each other with an end of said first resistance; The grid of said the 9th FET connects one first voltage end; The other end common ground of the negative terminal of the source electrode of said the 9th FET, said first electric capacity and said first resistance, the common power end that connects of the drain electrode of the drain electrode of the drain electrode of said the 3rd FET, said the 4th FET, the drain electrode of said the 5th FET, said the 6th FET and the drain electrode of said the 7th FET.

4. like claim 2 or 3 described POP noise suppression circuits; It is characterized in that: said charhing unit comprises an operational amplifier and a filter capacitor; The source electrode of said the 7th FET links to each other with a power control terminal of said operational amplifier; One normal phase input end of said operational amplifier links to each other with a reference voltage end, and an inverting input of said operational amplifier links to each other with an output of said operational amplifier.

5. POP noise suppression circuit as claimed in claim 4; It is characterized in that: said switch element comprises one first FET and one second FET; Said discharge cell comprises 1 the tenth FET and 1 the 11 FET; The source electrode of said the 6th FET links to each other with grid, the drain electrode of said the tenth FET, and the output of said operational amplifier links to each other with the source electrode of said first FET, and the grid of said first FET connects one second voltage end.

6. POP noise suppression circuit as claimed in claim 5; It is characterized in that: the negative terminal common ground of the source electrode of said the tenth FET, the source electrode of said the 11 FET and said filter capacitor; The grid of said second FET connects a tertiary voltage end, and the source electrode of said second FET links to each other with the drain electrode of said the 11 FET.

7. POP noise suppression circuit as claimed in claim 6; It is characterized in that: said power amplification unit comprises a power amplifier, one second resistance, one the 3rd resistance and 1 the 12 FET; The drain electrode of said first FET links to each other with a normal phase input end of the drain electrode of said second FET, said power amplifier and the anode of said filter capacitor jointly; One end of said second resistance connects an audio input end; The grid of said the 12 FET connects a quiet control end; The common inverting input that connects said power amplifier of one end of the source electrode of said the 12 FET, said the 3rd resistance and the other end of said second resistance; The common end that connects said capacitance of one output of the other end of the drain electrode of said the 12 FET, said the 3rd resistance and said power amplifier, the other end of said capacitance links to each other with said output element.