CN202093638U - Intelligent anti-theft tracking system based on FPGA (Field Programmable Gate Array) - Google Patents

Abstract

The utility model relates to an intelligent anti-theft tracking system based on an FPGA (Field Programmable Gate Array); the intelligent anti-theft tracking system comprises a host and a target terminal matched with the host; both the host and the target terminal comprise the FPGA, a wireless mobile communication GPRS (General Packet Radio Service) module, a GPS (Global Positioning System) module; a plurality of ports on the FPGA of the host are connected with the GPS module, the GPRS module, the key, a sound and light alarm module and an LCD (Liquid Crystal Display) module respectively; the ports on the FPGA of the target terminal are connected with the GPS module and the GPRS module respectively. The intelligent anti-theft tracking system has functions of anti-theft alarming, tracing and navigation; most modules of the system are realized on the basis of the FPGA; the system has high integration and low cost and is convenient to carry. The position information of an object is encrypted and then transmitted, so that the information safety is higher. Most modules based on the FPGA, such as an encryption and decryption module, a location extraction module, a relative position calculating module, are realized by using hardware, and the speed is accelerated.

Description

Intelligent anti-theft tracing system based on FPGA

Technical field

The utility model relates to a kind of burglary-resisting system, especially a kind of intelligent anti-theft tracing system based on FPGA.

Background technology

Along with expanding economy and growth in the living standard, people's awareness of safety constantly strengthens, about the safety precaution in places such as dwelling house, office and warehouse and the development of automatic alarm system come into one's own day by day, various anti-theft product are arisen at the historic moment, as car alarm, family's security system etc.Two common in the market class burglar alarms: first kind is traditional voice guard, and low price utilizes human inductor to send high loudness alarm by controller when stolen property, mostly adopts onsite alarming, and alarm range is subjected to distance limit; During stolen property, just give the alarm, notify owner and threatening thief,, be difficult to grasp thief's whereabouts, can't follow the trail of in case property is stolen; Second kind is to utilize camera, the round-the-clock recording monitor of closed-circuit television etc., easy to use though performance is good, the price height.Be family, office's usefulness mostly, be not easy to move or carry, and article such as our daily bag, mobile phone are lost easily.

Summary of the invention

The purpose of this utility model is for overcoming above-mentioned the deficiencies in the prior art, provide a kind of price low, be easy to carry about with one, safe intelligent anti-theft tracing system based on FPGA.

For achieving the above object, the utility model adopts following technical proposals:

A kind of intelligent anti-theft tracing system based on FPGA, it comprises main frame and the target terminal that matches with it, described main frame and target terminal include FPGA, wireless mobile communications GPRS module and global position system GPS module, and the plurality of ports on the FPGA of described main frame links to each other with GPS module, GPRS module, button, sound and light alarm module, LCD display module respectively; Port on the FPGA of described target terminal links to each other with the GPRS module with the GPS module respectively.

Main frame of the present utility model is carried by the user usually, and target terminal is placed on the valuables.The course of work is as follows: after system powered on and opens, system was in running order.Main frame regularly (user's adjusting) sends solicited message by the GPRS module to target terminal, after target terminal receives this information, receives self positional information by the GPS module; This information via is encrypted the back and is sent to main frame by the GPRS module; Main frame receives this information and deciphering, determines the main frame self-position by the GPS module simultaneously; The positional information that positional information that target terminal transmits and main frame self receives is imported the relative position computing module in the lump into, calculate the two distance and target terminal with respect to the orientation of main frame, and show by the LCD module, check for the user.In particular cases, when the user pressed searching button on the main frame, system also carried out above-mentioned action.Wherein, driver module, information encryption and decryption module, relative position computing module and the position extraction module of CPU module, two serial ports (DTE, DCE) all has FPGA (field programmable gate array) hardware to realize, improves the speed of system.

The utlity model has following function:

1) anti-theft alarm function: target terminal is put into prevents on the stolen article, when the relative distance between target terminal and the main frame surpassed a certain threshold values that the user sets, main frame sent sound and light alarm and notifies the user, thereby reduces the risk of valuable goods loss.

2) tracking function: native system is except as also can be used as tracker the alarm.If after the article lost, after the user presses and seeks button, can on the LCD liquid crystal display, see position and the orientation of target terminal, thereby real-time tracing is carried out to article in the position of knowing target item accurately, helps the article of user's finding lost to greatest extent with respect to main frame.

3) navigation feature: can on the LCD liquid crystal display, show self-position press the location button of main frame as the user after,, thereby realize navigation feature if mix local electronic chart.

4) most of module of this system realizes based on FPGA, the integrated level height, and cost is low and be easy to carry.

5) positional information of article is to transmit after encrypting, and higher Information Security is arranged.

6) based on most of module of FPGA, all use hardware to realize, improved speed as encryption and decryption module, position extraction module, relative position computing module.

Description of drawings

Fig. 1 is the utility model system chart;

Fig. 2 is the main machine structure block diagram;

Fig. 3 is the target terminal structured flowchart;

Embodiment

Below in conjunction with drawings and Examples the utility model is further specified.

As shown in Figure 1, main frame and target terminal are realized by field programmable gate array (FPGA), wireless mobile communications GPRS module and global position system GPS modular design.Shown in Fig. 2,3, the plurality of ports on the FPGA of main frame links to each other with GPS module, GPRS module, button, sound and light alarm module, LCD display module respectively; Port on the FPGA of described target terminal links to each other with the GPRS module with the GPS module respectively.Wherein the hollow arrow direction among Fig. 2,3 is the direction of information flow.Part in the frame of broken lines is realized by fpga chip.

Main frame of the present utility model is carried by the user usually, and target terminal is placed on the valuables.The course of work is as follows: after system powered on and opens, system was in running order.Main frame regularly (user's adjusting) sends solicited message by the GPRS module to target terminal, after target terminal receives this information, receives self positional information by the GPS module; This information via is encrypted the back and is sent to main frame by the GPRS module; Main frame receives this information and deciphering, determines the main frame self-position by the GPS module simultaneously; The positional information that positional information that target terminal transmits and main frame self receives is imported the relative position computing module in the lump into, calculate the two distance and target terminal with respect to the orientation of main frame, and show by the LCD module, check for the user.In particular cases, when the user pressed searching button on the main frame, system also carried out above-mentioned action.Wherein, driver module, information encryption and decryption module, relative position computing module and the position extraction module of CPU module, two serial ports (DTE, DCE) all has FPGA (field programmable gate array) hardware to realize, improves the speed of system.

FPGA

The utility model adopts the fpga chip XC3S500E of xilinx company, and it is 136 user I/O pins nearly, 10,000 logical blocks, 500,000 gate logic doors, 360k bits RAM piece and 20 hardware multipliers.The user can reconfigure the logic module and the I/O module of FPGA inside, to realize user's logic.The user is placed in the Flash chip the programming data of FPGA, is loaded among the FPGA by powering on, and it is carried out initialization.

The utility model system level design instrument EDK10.1 (embedded development external member) develops design to system.Integrated hardware platform generator, software platform generator, realistic model maker, software compiler and software debugging aids etc. in the kit.An Integrated Development Environment XPS is provided among the EDK (Xilinx platform operating room), so that all instruments that using system provides, finishes the whole flow process of embedded system development.The IP kernel that also has some Peripheral Interfaces among the EDK is as LMB, OPB bus interface, external storage controller, sdram controller, UART, interruptable controller, timer etc.Utilize these resources, can make up a comparatively perfect embedded microprocessor system.

(1) CPU nuclear: MicroBlaze soft processor kernel is 32 risc processors of powerful standard of optimizing at the FPGA device, and travelling speed adopts Harvard architecture up to 150MHz, has independently 32 bit instruction buses and 32 bit data bus.These two kinds of buses are divided into local storage bus (Local Memory Bus, peripheral bus (On-chip Peripheral Bus, OPB) two classes LMB) and on the sheet of IBM again.The OPB bus can provide peripheral hardware on the sheet, and storer, and the visit of the algoritic module of writing based on hardware description language, MicroBlaze can respond software and hardware and interrupt, and carry out asynchronous process.Use EDK (embedded development external member) and carry out the exploitation of MicroBlaze IP kernel.

(2) UART module: this module is to develop to finish in EDK 10.1 environment, has utilized the uartns550_v1_00_b driver that development environment provided.This driving provides transmission function void XuartNs550 SendByte (Xuint32 BaseAddress, Xuint8 Data) and receiver function unsigned int XuartNs550 RecvByte (Xuint32 BaseAddress), make system pass through the data that Uart sent at every turn or received a byte.

(3) encrypting and decrypting module: native system adopts the des encryption algorithm, uses Verilog HDL Programming with Pascal Language hardware to realize based on fpga chip.The DES algorithm becomes 64 ciphertext IOB to 64 plaintext input block, and employed key also is 64.

Cryptographic algorithm is as follows: at first, DES is undertaken initial permutation to 64 bit data block of input by the initial permutation table and reconfigures, and left-half and right half part are designated as L respectively ₀And R ₀, long 32 of every part.Then, L ₀And R ₀Enter the first wheel ciphering process.R ₀Obtain 32 outputs through a series of displacement, again with L ₀Carry out XOR, its result is called the R of next round ₁, R ₀The L that then is called next round ₁So continuous operations 16 are taken turns, and obtain L ₁₆, R ₁₆, this as input, is carried out the inverse permutation opposite with initial permutation, promptly obtain ciphertext output.

Every encryption of taking turns can be represented its calculating process with formula (1), wherein, and K _iIt is the sub-key that replacement of keys, displacement obtain.

$R_i=L_{i-1}\⊕f(R_{i-1},K_i)$ (1)

L _i＝R _i-1(i＝1，2，...16)

In the circulation that each is taken turns, right half part need pass through a series of sub-ciphering process, and this sub-ciphering process also is called the f function, and sub-ciphering process comprises expansion displacement, XOR, the displacement of S box and direct replacement.

(4) longitude and latitude extraction module: the GPS module model that native system uses is Trimble.GPRMC is one of GPS statement of NMEA0183 agreement regulation.NMEA0183 is the communication format that American National ocean Institution of Electronics formulates, and has stipulated extra large usefulness and the land information with the output of GPS receiving equipment.

The following: $GPRMC of form,＜1 〉,＜2〉and,＜3 〉,＜4〉and,＜5 〉,＜6〉and,＜7 〉,＜8〉and,＜9 〉,＜10〉and,＜11 〉,＜12〉and,＜13 〉.＜1〉the standard setting time, hhmmss (Hour Minute Second) form;＜2〉positioning states, A=effectively locatees, the invalid location of V=;＜3〉latitude, ddmm.mmmm (degree divides) form (leading figure place is not enough mends 0);＜4〉latitude is distinguished, the Northern Hemisphere (N) or the Southern Hemisphere (S);＜5〉longitude, dddmm.mmmm (degree divides) form (leading figure place is not enough mends 0);＜6〉longitude is distinguished, the Eastern hemisphere (E) or the Western Hemisphere (W);＜7〉ground speed (000.0～1851.8Knot, leading figure place deficiency then 0);＜8〉the ground direction (000.0～359.9 degree, to the north of be reference data, the not enough benefit 0 of leading figure place);＜9〉date, ddmmyy (day month year) form;＜10〉magnetic declination (000.0～180.0 degree, leading figure place is not enough mends 0);＜11〉magnetic declination direction, east (E) or west (W);＜12〉pattern indication (only NMEA0183 3.00 versions output, the A=autonomous positioning, the D=difference, the E=estimation, the N=data are invalid);＜13〉verification and.

If GPS module and satellite communication are normal, utilize the information extraction related data that receives.This information extraction modules uses Verilog HDL Programming with Pascal Language hardware to realize based on FPGA.

(5) relative position computing module: if the positional information that main frame and target terminal receive is all effective, be input to this module, calculate the distance and the relative direction in two places, if 2 distances are greater than default distance, then start the sound and light alarm module, enter alarm mode; If distance is qualified, then withdraw from alarm mode.

Calculate the distance between two longitudes and latitudes, promptly known radius of sphericity, the spherical distance S between calculating at 2, according to formula (2):

Wherein, R is an earth radius, A (α ₁, β ₁), B (α ₂, β ₂) (latitude is respectively α for 2 points of different latitude, different longitudes on the earth ₁, α ₂, longitude is respectively β ₁, β ₂, latitude is for just during north latitude for regulation, and latitude is for negative during south latitude, and longitude is for just during east longitude, and longitude is to bear during west longitude.

This module is that hardware is realized, uses Verilog HDL Programming with Pascal Language to realize based on FPGA.

The GPRS module

The GPRS module adopts SIM100S32-E, supports GSM/GPRS data, voice, short message and fax, can realize by AT order control.Control program is by Xuint8 XUartNs550_RecvByte (Xuint32 BaseAddress), void XuartNs550_SendByte uint32 BaseAddress, Xuint8 Data) two functions realize.These two functions all block the acceptance and the transmission of data, and this obstruction mechanism has guaranteed to send and the data of acceptance can not lost.By using these two basic serial communication functions, realized the control of FPGA, thereby realized reception and transmission short message to the GPRS module.

In the application of GPRS module, the AT order has realized the operation control to the GPRS module, and the order of using in the native system is as follows: AT+CSCA obtains short message centre number; AT+CMGF is provided with the PDU pattern; AT+CNMI opens note and reminds; The AT+CMGR reading short message; AT+CMGS sends information; AT+CMGW create message breath and storage etc.

The LCD display module

LCD MODULE WG240128B is that WIN-STAR company produces, 240128 graphic dot matrix display modules of built-in T6963C liquid-crystal controller, be to use many display modules at present, its driving control system is made up of LCD controller T6963C and peripheral circuit, line driver group, column driver bank and liquid crystal drive bias circuit.T6963C display buffer ram cell mainly comprises text display district, graphical display area (comprising the text characteristics district), 2kB CGRAM district.The procedure for displaying of this module on liquid crystal just writes data the process of corresponding 3 display buffers.

The LCD of FPGA and embedded T6963C adopts direct connected mode, Liquid Crystal Module is directly hung on the OPB bus of CPU nuclear, the data line of Liquid Crystal Module connects the data bus of CPU nuclear, sheet choosing and register signal are provided by the address bus of CPU nuclear, and the read and write operation is by the read-write operation signal controlling of CPU nuclear.

Claims (1)

1. intelligent anti-theft tracing system based on FPGA, it is characterized in that, comprise main frame and the target terminal that matches with it, described main frame and target terminal include FPGA, wireless mobile communications GPRS module and global position system GPS module, and the plurality of ports on the FPGA of described main frame links to each other with GPS module, GPRS module, button, sound and light alarm module, LCD display module respectively; Port on the FPGA of described target terminal links to each other with the GPRS module with the GPS module respectively.

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