CN202008499U - Current sampling circuit - Google Patents

Abstract

The utility model discloses a current sampling circuit, which relates to the technical field of electrons and comprises a power tube and a sampling tube, wherein a drain electrode of the power tube and a drain electrode of the sampling tube are connected with a power supply voltage virtual device driver (VDD), a grid electrode is connected with first input voltage, the current sampling circuit also comprises a first operational amplifier, a second operational amplifier and a metal oxide semiconductor (MOS) tube, a source electrode of the power tube is connected with a negative electrode of the first operational amplifier and a drain electrode of the MOS tube, a source electrode of the sampling tube is connected with a positive electrode of the first operational amplifier, the output end of the first operational amplifier is connected with a positive electrode of the second operational amplifier, a reference source is connected with a negative electrode of the second operational amplifier, the output end of the second operational amplifier is connected with a grid electrode of the MOS tube, and a source electrode of the MOS tube is grounded. The current sampling circuit improves the sampling precision of a traditional current sampling circuit through the gain of two-stage operational amplification and a negative feedback technology.

Description

A kind of current sampling circuit

Technical field

The utility model belongs to electronic technology field, relates to H bridge analog line driver integrated circuit, relates to current sampling circuit simultaneously.

Background technology

Because the widespread use of direct current generator, released a collection of multiple functionally, use simple DC motor driver, they include half-bridge, two half-bridge, four half-bridges, single H bridge, dual H-bridge etc.

In H bridge power driving circuit, need the current value of detection power switching tube accurately and efficiently, so the design of electric current detecting method has very important significance, the current sample technology is also of crucial importance for the overcurrent protection of power device and load simultaneously.Current sample method commonly used has resistance sampling, magnetic sampling, SENSEFET sampling etc. in the power circuit, and SENSEFET sample rate current method as shown in Figure 1.The Kelvin line has represented to consider that the electric current in the circuit flows through the influence of the voltage difference that metal wire causes among the figure.Usually the grid width of SENSEFET is much smaller than the grid width of MainFET, wishes the ratio decision of the proportionate relationship of Isense and IOUT by the W/L of power tube power tube sense MOS and DMOS, the proportional sampling of pressing 1/N.The metal-oxide-semiconductor drain current that is operated in the saturation region is, is example with the N pipe:

$I_{\mathrm{DS}}=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}{(V_{\mathrm{GS}}-V_{\mathrm{TH}})}^2$

μ _nBe the mobility of electronics, C _OxBe the gate oxide electric capacity of unit area, W is the width of grid, and L is the length of grid, V _GSBe the voltage between the two poles of the earth, grid source, V _THBe threshold voltage.

The drain current of SENSEFET $I_{\mathrm{Dsense}}=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_{\mathrm{sense}}{(V_{\mathrm{GSsense}}-V_{\mathrm{TH}})}^2$

The drain current of DMOS pipe is $I_{\mathrm{Dmain}}=\frac{1}{2}{\mathrm{\μ}}_n{C}_{\mathrm{ox}}{\left(\frac{W}{L}\right)}_{\mathrm{main}}{(V_{\mathrm{GSmain}}-V_{\mathrm{TH}})}^2$

$\frac{I_{\mathrm{Dsense}}}{I_{\mathrm{Dmain}}}=\frac{{\left(\frac{W}{L}\right)}_{\mathrm{sense}}}{{\left(\frac{W}{L}\right)}_{\mathrm{main}}}\frac{{(V_{\mathrm{GSsense}}-V_{\mathrm{TH}})}^2}{{(V_{\mathrm{GSmain}}-V_{\mathrm{TH}})}^2}$

The breadth length ratio of SENSEFET is the 1/N of DMOS pipe, make two SENSEFET tube currents also be the DMOS tube current of 1/N, need make V _GSsense=V _GSmain, two tube grid current potentials equate with drain potential, as long as source potential equates just energy proportional sampling.

Sampling current: $I_{\mathrm{sense}}=\frac{V_{\mathrm{sense}}}{R_{\mathrm{sense}}}$

Output current: I _Out=N * I _Sense

Traditional sample rate current structure can not accurately be taked electric current, owing to exist disturbance in the circuit, works as V _Ssense≠ V _SmainThe time,

$\frac{I_{\mathrm{sense}}}{I_{\mathrm{out}}}\≠\mathrm{const}$

Const represents an invariable amount.

The utility model content

Technical problem to be solved in the utility model is, provides a kind of whole CMOS accurate current sampling circuit, is used to overcome work as V _Ssense≠ V _SmainThe time current sampling circuit accurate problem of proportional sampling.

The technical scheme that the utility model solve the technical problem employing is, a kind of current sampling circuit, comprise power tube and sampling pipe, the drain electrode of power tube is connected supply voltage VDD with the drain electrode of sampling pipe, grid connects first input voltage, also comprise first amplifier, second amplifier and metal-oxide-semiconductor, the source electrode of power tube connects the drain electrode of the negative pole and the metal-oxide-semiconductor of first amplifier, the source electrode of sampling pipe connects the positive pole of first amplifier, the positive pole of output termination second amplifier of first amplifier, reference source connects the negative pole of second amplifier, the grid of the output termination metal-oxide-semiconductor of second amplifier, the source ground of metal-oxide-semiconductor.

Described power tube, sampling pipe and metal-oxide-semiconductor are all the NMOS pipe.

The utility model has improved the sampling precision of conventional current sample circuit by the gain and the negative-feedback technology of two stage amplifer.

Below in conjunction with the drawings and specific embodiments the utility model is further described.

Description of drawings

Fig. 1 is the circuit diagram of prior art.

Fig. 2 is an embodiment circuit diagram of the present utility model.

Embodiment

The accurate current sampling circuit structure of whole CMOS of the present utility model, comprise power tube and SENSEFET, a metal-oxide-semiconductor that is operated in linear zone, two operational amplifiers, a reference source, the source electrode of power tube and sampling pipe is received the two ends of operational amplifier respectively, output and band-gap reference device reference source compare the input as the next stage operational amplifier, the output of this amplifier feeds back to by the common source amplifying circuit and is responsible for and the source electrode of sampling pipe, plays the effect of the source potential of the stable person in charge and sampling pipe.

Specifically, referring to Fig. 2, the accurate current sampling circuit of whole CMOS, comprise power tube MN1 and sampling pipe MN2, the drain electrode of the drain electrode of power tube MN1 and sampling pipe MN2 is connected supply voltage VDD, grid meets the first input voltage VDC1, also comprise the first amplifier A1, the second amplifier A2 and metal-oxide-semiconductor MN3, the source electrode of power tube MN1 connects the drain electrode of negative pole and the metal-oxide-semiconductor MN3 of the first amplifier A1, the source electrode of sampling pipe MN2 connects the positive pole of the first amplifier A1, the positive pole of output termination second amplifier of the first amplifier A1, and reference source VREF connects the negative pole of the second amplifier A2, the grid of the output termination metal-oxide-semiconductor MN3 of the second amplifier A2, the source ground of metal-oxide-semiconductor MN3.

Described power tube MN1, sampling pipe MN2 and metal-oxide-semiconductor MN3 are all the NMOS pipe.

Principle of work of the present utility model is: grid, the drain potential of power tube MN1 pipe and sampling pipe MN2 pipe equate, when the source potential of power tube MN1 and sampling pipe MN2 is unequal, cause source current unequal.Source potential V as sampling pipe MN2 _S2The source potential V of specific power pipe MN1 _S1Big Δ V ₁The time, difference DELTA V is amplified K by first operational amplifier A 1 ₁Δ V ₁, K ₁Be the gain of first operational amplifier A 1, K ₁Δ V ₁Make comparisons difference DELTA V with the reference source output voltage again ₂Be added on second operational amplifier A 2 output K again ₂Δ V ₂Be added on the grid of the metal-oxide-semiconductor MN3 that is operated in linear zone, by the drain electrode output realization negative feedback clamper of the anti-phase amplification of common source.

The gain A of commonsource amplifier _VFor:

$A_V=-{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}(V_{\mathrm{in}}-V_{\mathrm{TH}})R_D$

The resistance that is operated in the NMOS pipe MN3 of linear zone changes along with the change in voltage between the two poles of the earth, grid source, and the physical relationship formula is:

$R_{\mathrm{DS}}=\frac{1}{{\mathrm{\μ}}_n{C}_{\mathrm{ox}}\frac{W}{L}(V_{\mathrm{in}}-V_{\mathrm{TH}})}$

Change and cause electric current to change thereby change the drain-source resistance that causes metal-oxide-semiconductor MN3 pipe, higher precision is arranged than constant resistance by the gate source voltage of metal-oxide-semiconductor MN3.

Two-stage calculation amplifier has higher gain, the imaginary short characteristic of operational amplifier and close loop negative feedback will guarantee that the source potential of MN1 and MN2 is very approximate, to such an extent as to can ignore their difference, so cmos circuit of the present utility model has the function of accurate sampling.

Claims (2)

1. current sampling circuit, comprise power tube (MN1) and sampling pipe (MN2), the drain electrode of power tube (MN1) is connected supply voltage VDD with the drain electrode of sampling pipe (MN2), grid connects first input voltage (VDC1), it is characterized in that, also comprise first amplifier (A1), second amplifier (A2) and metal-oxide-semiconductor (MN3), the source electrode of power tube (MN1) connects the drain electrode of the negative pole and the metal-oxide-semiconductor (MN3) of first amplifier (A1), the source electrode of sampling pipe (MN2) connects the positive pole of first amplifier (A1), the positive pole of output termination second amplifier of first amplifier (A1), reference source (VREF) connects the negative pole of second amplifier (A2), the grid of the output termination metal-oxide-semiconductor (MN3) of second amplifier (A2), the source ground of metal-oxide-semiconductor (MN3).

2. current sampling circuit as claimed in claim 1 is characterized in that, described power tube (MN1), sampling pipe (MN2) and metal-oxide-semiconductor (MN3) are all the NMOS pipe.

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