CN201821549U - LED driving circuit - Google Patents
LED driving circuit Download PDFInfo
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- CN201821549U CN201821549U CN201020535048XU CN201020535048U CN201821549U CN 201821549 U CN201821549 U CN 201821549U CN 201020535048X U CN201020535048X U CN 201020535048XU CN 201020535048 U CN201020535048 U CN 201020535048U CN 201821549 U CN201821549 U CN 201821549U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The utility model discloses an LED driving circuit, which comprises an output module, a storage module and a driving control module. The output module stores channel data thereof, the channel data comprise multiframe data and control data, each frame data comprise starting point PWM (pulse-width modulation) data, end point PWM data, brightness saltus step amplitude and brightness duration time, and the control data comprise starting frame, circulation length and circulation frequency. The driving control module generates PWM signals according to the frame data and the control data, and the output module is driven to generate output current by the PWM signals. Therefore, the LED driving circuit can adopt less channel data to realize abundant LED lamplight or color effect.
Description
[technical field]
The utility model relates to the LED application, especially relates to led drive circuit.
[background technology]
LED(Light Emitting Diode, light-emitting diode) because the life-span is long, characteristics such as response speed is fast, volume is little, power consumption is little, reliability height have been widely used in fields such as backlight, illumination, electronic equipment, display screen and automobile.Drive circuit is the important component part of LED product, and the performance of drive circuit will directly have influence on the performances such as life-span, power consumption and reliability of LED product.Usually,, have negative temperature characteristic again, therefore generally need adopt constant-current driving LED because LED is the semiconductor device of characteristic sensitivity.
Yet existing led drive circuit all is controlled by other control devices usually could realize control to its output current to realize various LED effects, and this has limited the application of led drive circuit greatly.Therefore, be necessary to propose a kind of improved technical scheme and overcome the problems referred to above.
[utility model content]
The technical problems to be solved in the utility model is to provide a kind of led drive circuit, and it can independently carry out PWM(Pulse Width Modulation to its output current) LED light or the color effects of modulation to realize enriching.
In order to address the above problem, according to an aspect of the present utility model, the utility model provides a kind of led drive circuit, and it comprises: output module; Memory module, it stores the channel data of described output module, described channel data includes multiframe data and control data, every frame data include starting point PWM data, terminal point PWM data, brightness hopping amplitude and brightness duration, and described control data comprises start frame, length of the cycle and cycle-index; Drive control module produces pwm signal according to described frame data and control data, and described output module produces output current under the driving of pwm signal.
Further, described output module is N, and described memory module all stores corresponding a channel data for each output module, and every part of channel data all includes M frame data and control data, and wherein N and M are the natural number greater than 1.
Further, described drive control module includes command register, each output module all is configured with two kinds of drive patterns, first drive pattern is outside PWM drive pattern, second drive pattern is autonomous PWM drive pattern, described command register is deposited to each output module 1 control bit is set, by the drive pattern of described control bit with regard to each output module of may command is set, when an output module is autonomous PWM drive pattern, described drive control module obtains the channel data of this output module correspondence in the described memory module, and produces pwm signal according to described channel data and give this output module; When an output module was outside PWM drive pattern, described drive control module received the channel data of this output module from external interface, and produced pwm signal according to described channel data and give this output module.
Further again, described drive control module comprises the N corresponding with each output module output driver element, when autonomous PWM drive pattern, described output driver element obtains corresponding channel data in described memory module, and produce pwm signal in view of the above to drive corresponding output module, externally during the PWM drive pattern, described output driver element receives the channel data of external interface input, and produces pwm signal in view of the above to drive corresponding output module.
Further, described output module comprises operational amplifier, switching device, efferent duct and resistance,
The output of described operational amplifier links to each other with the grid of described efferent duct via described switching device, the source electrode of described efferent duct links to each other with an end of described resistance, the other end ground connection of described resistance, the drain electrode of described efferent duct is as the output of described output module, the normal phase input end of described operational amplifier connects reference voltage, inverting input connects the source electrode of described efferent duct, and the turn-on and turn-off of described switching device are controlled by pwm signal.
Further, described resistance is adjustable resistance, selects signal to adjust by resistance, and described reference voltage selects signal selected from a plurality of different reference voltages by described multichannel reference voltage unit according to reference voltage.
Further, described drive control module can generate a pwm signal according to the starting point PWM data of frame data, and this pwm signal will be as the first rank pwm signal that carries out the PWM modulation according to these frame data; Described drive control module can generate a pwm signal according to the described terminal point PWM data of frame data, and this pwm signal will be as the tail rank pwm signal that carries out the PWM modulation according to these frame data; The described brightness duration is represented the time that every rank pwm signal continues; The duty ratio of the current rank of the long expression of described brightness skip frame degree pwm signal and following single order pwm signal poor.
Further, in starting point PWM data during less than terminal point PWM data, the duty ratio of described pwm signal will be that step-length increases progressively with the brightness hopping amplitude, and during greater than terminal point PWM data, the duty ratio of described pwm signal is that step-length is successively decreased with the brightness hopping amplitude in starting point PWM data.
Further again, the start frame of described control data is represented the start frame data of this PWM modulation, and described length of the cycle is represented the number of the frame data of this PWM modulation, and described cycle-index is represented the cycle-index of this PWM modulation.
Compared with prior art, the utility model allows to be used for the user channel data is carried out predefined by memory module is set in led drive circuit, thereby can realize that autonomous PWM drives.In addition, it also can utilize less channel data to realize abundant LED light or color effects.
About other purposes of the present utility model, feature and advantage are described in detail in embodiment below in conjunction with accompanying drawing.
[description of drawings]
In conjunction with reaching ensuing detailed description with reference to the accompanying drawings, the utility model will be more readily understood, the structure member that wherein same Reference numeral is corresponding same, wherein:
Fig. 1 is the led drive circuit structural representation block diagram in one embodiment in the utility model;
Fig. 2 is the interior modulating data structural representation in one embodiment of memory module in the utility model;
Fig. 3 is the drive control module structural representation block diagram in one embodiment of the led drive circuit in the utility model;
Fig. 4 is the output driver element structural representation block diagram in one embodiment of the drive control module in the utility model;
Fig. 5 is the workflow schematic diagram in one embodiment of the output driver element shown in Fig. 4;
Fig. 6 is the output module circuit diagram in one embodiment of the led drive circuit in the utility model; With
Fig. 7 is the output module circuit diagram in another embodiment of the led drive circuit in the utility model.
[embodiment]
For above-mentioned purpose of the present utility model, feature and advantage can be become apparent more, the utility model is described in further detail below in conjunction with the drawings and specific embodiments.
Detailed description of the present utility model mainly presents by program, step, logical block, process or other symbolistic descriptions, the running of the technical scheme in its direct or indirect simulation the utility model.Affiliated those of skill in the art use these descriptions herein and state that the others skilled in the art in affiliated field effectively introduce their work essence.
Alleged herein " embodiment " or " embodiment " are meant that special characteristic, structure or the characteristic relevant with described embodiment can be contained at least one implementation of the utility model at least.Different local in this manual " in one embodiment " that occur also nonessentially all refer to same embodiment, must not be yet with other embodiment mutually exclusive separately or select embodiment.In addition, represent the sequence of modules in method, flow chart or the functional block diagram of one or more embodiment and revocablely refer to any particular order, also do not constitute restriction of the present utility model.
See also shown in Figure 1ly, it is the led drive circuit 100 structural representation block diagram in one embodiment in the utility model, and described led drive circuit 100 comprises drive control module 110, several output modules 120 and memory module 130.
Described output module 120 is N, be respectively first output module 121, second output module 122 ... with N output module 123.Therefore each output module also can be referred to as an output channel, we can say that also described led drive circuit 100 includes N output channel, and wherein N is the natural number more than or equal to 1, such as 1,2,4,8,16 or 32 etc.Each output module provides output current by the output OUT of correspondence, and when described led drive circuit 100 was used for driving LED, each output OUT can connect one or more LED.
Described drive control module 110 can receive the data of outside input by external interface, and provides PWM(Pulse Width Modulation, pulse-width modulation to each output module) signal.Described pwm signal drives corresponding output module and produces accurate output current, just can realize any adjusting of the output current of corresponding output module by the duty ratio of adjusting described pwm signal.In one embodiment, can carry out 2 to the output current of output module by adjustment to the duty ratio of pwm signal
LContrast is whole, and wherein L can be 2,4,8,16 or other natural numbers.For instance, suppose L=8,2
L=256, this moment can described pwm signal duty ratio be set to 0/255,1/255,2/255,3/255 ... with 255/255 in any one, accordingly, the output current of output module also can be reference current (duty ratio is 255/255 o'clock a output current) 0/255,1/255,2/255,3/255 ... with 255/255 in any one.
In one embodiment, at least one output module is configured with autonomous PWM drive pattern.Preferably, each output module can be configured with described two kinds of drive patterns, and first drive pattern is outside PWM drive pattern, and second drive pattern is autonomous PWM drive pattern.Described drive control module 110 includes command register 111, described command register 111 can be stored the drive pattern information by each output module of external interface input, determine that with this each output module is to be operated in first drive pattern, still is operated in second drive pattern.When specific implementation, described command register 111 can be provided with 1 control bit for each output module, just can control the drive pattern of each output module by the state that described control bit is set, such as control bit is that the corresponding output module of 0 expression is first drive pattern, and control bit is that the corresponding output module of 1 expression is second drive pattern.Each output module can be relatively independent, that is to say, is operated in for first drive pattern following time at some output modules, and the other output module can be operated under second drive pattern.
Described memory module 130 stores the PWM modulating data of each output module when autonomous PWM drive pattern, and described PWM modulating data can be stored in the described memory module 130 in advance via external interface.When an output module A is autonomous PWM drive pattern, described drive control module 110 obtains the PWM modulating data (or being called channel data) of this output module A in the described memory module 130, and produce pwm signal according to described PWM modulating data and give this output module A, this output module A regulates its output current according to described pwm signal.When an output module B is outside PWM drive pattern, described drive control module 110 receives the PWM modulating data (or being called channel data) of this output module B from external interface, and produce pwm signal according to described PWM modulating data and give this output module B, this output module B regulates its output current according to described pwm signal.
In one embodiment, described external interface can be I
2The C bus port, it comprises I
2C bus data I/O port SDI and I
2C bus clock input port SCL.
See also shown in Figure 2, it is the modulating data structural representation in one embodiment of described memory module 130 stored, described memory module 130 internal memories contain first passage data corresponding to first output module 121, corresponding to the second channel data of second output module 122 ... with N channel data corresponding to N output module 123.Each channel data can include M frame data and control data, wherein every frame data include starting point PWM data (also can be called starting point PWM value), terminal point PWM data (also can be called terminal point PWM value), brightness hopping amplitude and brightness duration, described control data comprises start frame, length of the cycle and cycle-index, and M is 2,4,8,16 or other natural numbers.
Can generate the pwm signal of certain duty ratio according to described starting point PWM data, and this pwm signal will be as the first rank pwm signal that carries out autonomous PWM modulation according to these frame data.Also can generate the pwm signal of certain duty ratio according to described terminal point PWM data, and this pwm signal will be as the tail rank pwm signal that carries out autonomous PWM modulation according to these frame data.The described brightness duration is represented the time that every rank pwm signal continues.Described brightness skip frame degree length has determined duty ratio poor of current rank pwm signal and following single order pwm signal.
The duty ratio of described pwm signal has 2
LRank are below with 2
L=256 are introduced for example.Starting point PWM data and terminal point PWM data can be 8 bit binary data, scope from 00000000 to 11111111, and for the decimal system, scope from 0 to 255.Preferably,, can make low 3 of starting point PWM data and terminal point PWM data to be defaulted as 0 in order to save the space, the scope from 00000000 to 11111000 of starting point PWM data and terminal point PWM data like this, for the decimal system, scope from 0 to 248.The brightness duration is 3 bit binary data, can support for 8 rank duration, can represent 1ms, 4ms, 16ms, 64ms, 128ms, 256ms, 512ms, 1s respectively.The brightness hopping amplitude is 3 bit binary data, can support 8 rank brightness hopping amplitudes, can represent 1/255,2/255,4/255,8/255,16/255,32/255,48/255,64/255 respectively.
During less than terminal point PWM data, the duty ratio of described pwm signal will be that step-length increases progressively with the brightness hopping amplitude in starting point PWM data, and during greater than terminal point PWM data, the duty ratio of described pwm signal is that step-length is successively decreased with the brightness hopping amplitude in starting point PWM data.The duty ratio of described pwm signal is a step-length increasing or decreasing when surpass setting terminal point PWM data with the brightness hopping amplitude, and the duty ratio of PWM can be clamped at terminal point PWM data place.
For instance, in frame data of channel data, starting point PWM data are the 00001(decimal system 8), terminal point PWM data are the 01010(decimal system 80), the brightness duration is 011, brightness saltus step step-length is 100, so, the duty ratio of first rank pwm signal is 8/255, and the duty ratio of tail rank pwm signal is 80/255, brightness saltus step step-length is 8/255, and the brightness duration is 16ms.Like this, the process of PWM modulation is: 8/255 pwm signal continues 16ms, and 16/255 pwm signal continues 16ms, 24/255 pwm signal continues 16ms, and 30/255 pwm signal continues 16ms ... 78/255 pwm signal continues 16ms, and 80/255 pwm signal continues 16ms.
The start frame of described control data is represented the start frame data of this PWM modulation, and described length of the cycle is represented the number of the frame data of this PWM modulation, and described cycle-index is represented the cycle-index of this PWM modulation.For instance, if M=16, start frame is 8, length of the cycle 7, cycle-index are 20, and then described drive control module 110 at first reads the 8th frame data of this output channel, and utilize this frame data generation pwm signal to drive this output channel, read the 9th frame data afterwards ..., read the 15th frame data subsequently; Then, cycle-index is counted 1, read above-mentioned several frame data afterwards more again successively, equal 20 until cycle-index and just finish this PWM adjustment.In one embodiment, described cycle-index is 8 bit binary data, and described start frame is 4 bit binary data, and described length of the cycle is 4 bit binary data.
Fig. 3 is the drive control module 200 structural representation block diagram in one embodiment in the utility model, and it can be as the drive control module 110 of the led drive circuit among Fig. 1.See also shown in Figure 3ly, described drive control module 200 comprises respectively and N N the output driver element that output module is corresponding, be respectively the first output driver element 210, the second output driver element 220 ... with N output driver element 230.When the corresponding control bit in command register was represented autonomous PWM drive pattern, described output driver element obtained corresponding channel data in described memory module 130, and produces pwm signal in view of the above to drive corresponding output module.When the corresponding control bit in command register was represented outside PWM drive pattern, described output driver element received the channel data of external interface input, and produces pwm signal in view of the above to drive corresponding output module.
Fig. 4 is an output driver element 400 structural representation block diagram in one embodiment of the control module in the utility model, and it can be as the arbitrary output driver element among Fig. 3.See also shown in Figure 4ly, described output driver element 400 comprises micro-control unit 410, data storage cell 420, date read-write cell 430 and pwm signal generating unit 440.
Described micro-control unit 410 is determined the PWM drive pattern according to the corresponding control bit in the command register.When autonomous PWM drive pattern, described micro-control unit 410 notifies described date read-write cell 430 from reading corresponding channel data in the described memory module to described data storage cell 420, described subsequently micro-control unit 410 produces the PWM data according to the channel data in the described data storage cell 420, and described pwm signal generating unit 440 produces pwm signal to drive corresponding output module according to described PWM data.Externally during the PWM drive pattern, described micro-control unit 410 notifies described date read-write cell 430 to read modulating data to described data storage cell 420 from external interface, described subsequently micro-control unit 410 produces the PWM data according to the modulating data in the described data storage cell 420, and described pwm signal generating unit 440 produces pwm signal to drive corresponding output module according to described PWM data.
Fig. 5 is the schematic diagram of the workflow 500 in one embodiment of the output driver element 400 shown in Fig. 4, and it has mainly reflected the workflow of described output driver element 400 when autonomous PWM drive pattern.
Described micro-control unit 410 is determined after prepass is in autonomous PWM drive pattern according to the corresponding control bit in the command register, described flow process enters step 510, described date read-write cell 430 reads the control data of respective channel in the described memory module, and described control data comprises start frame, length of the cycle and cycle-index.
Whether step 550, described micro-control unit 410 judge the lasting time of current pwm signal more than or equal to described brightness duration T, if, then enter step 560, otherwise, then return step 540, continue to produce pwm signal based on described PWM data.
Described output driver element 400 is the workflow during the PWM drive pattern externally, also can be with reference to flow process shown in Figure 5, the various PWM type of drive that technical staff in equally also can general field can know, such as the PWM data of importing one 8 from the outside at every turn, described pwm signal generating unit 440 produces pwm signal based on described PWM data, import a frame of each frame data the channel data that is similar in the memory module for another example from the outside at every turn, every frame data comprise starting point PWM data equally, terminal point PWM data, brightness hopping amplitude and brightness duration, described output driver element 400 produces a series of pwm signals according to these frame data.
Fig. 6 is an output module 600 circuit diagram in one embodiment of the led drive circuit in the utility model, and described output module 600 can be as any one output module among Fig. 1.Described output module 600 comprises operational amplifier OA, switching device SW1, efferent duct M1 and resistance R 1.The output of described operational amplifier OA links to each other with the grid of described efferent duct M1 via described switching device SW1, the source electrode of described efferent duct M1 links to each other with an end of described resistance R 1, the other end ground connection of described resistance R 1, the drain electrode of described efferent duct M1 outwards provides output current as the output of described output module 600, the normal phase input end of described operational amplifier OA meets reference voltage V ref, inverting input connects the source electrode of described efferent duct M1, the turn-on and turn-off of described switching device SW1 are controlled by pwm signal, such as conducting when pwm signal is high level, when low level, end.According to circuit theory as can be known, when switching device SW1 conducting always, then the electric current I out on the efferent duct M1 is: Iout=Vref/R1.Adjust by duty ratio, can make the electric current on the efferent duct M1 between 0 to Iout=Vref/R1, carry out 2 pwm signal
LContrast is whole.
When autonomous PWM drive pattern, can produce the pwm signal of a series of change in duty cycle according to the respective channel data of memory module stored, can produce splendid brilliant lighting effects so that the LED that efferent duct M1 drives produces the continuous variation of brightness or color.Every frame data can make LED produce a kind of lighting effects, and M frame data circulations is combined into and can develops more fluorescent tube effect.In one embodiment, if every frame data of each channel data are 2byte, the control data of each channel data is 2byte, M=16, so every channel data only occupies the memory space of 34byte, and the data by this 34 byte can develop and very many fluorescent tube combination of effects.
Fig. 7 is an output module 700 circuit diagram in one embodiment of the led drive circuit in the utility model, and described output module 700 equally can be as any one output module among Fig. 1.Described output module 700 among Fig. 7 is basic identical with the output module 600 among Fig. 6, difference is: the resistance R 1 among Fig. 7 is adjustable resistance, can select signal adjustment by resistance, reference voltage among Fig. 7 is provided by the multichannel reference voltage unit, and described multichannel reference voltage unit can be selected signal selected normal phase input end of exporting to operational amplifier from a plurality of different reference voltages according to reference voltage.Select signal and resistance to select signal can accurately regulate the output current of efferent duct M1 by uniting the adjustment reference voltage.
Regulate separately resistance R 1 and reference voltage, can change the drive current of efferent duct M1, but shortcoming is all arranged, regulate reference voltage separately, very thin if voltage is got, when the input offset voltage of amplifier was big, meticulous reference voltage did not have much meanings.Regulate resistance R 1, because generally, resistance R 1 is less, and precision is higher, if added switching device, then influences the precision of resistance R 1, but under the situation of little electric current, can select bigger resistance R 1 this moment, and the influence of switching device just can be little a lot.Resistance R 1 regulated and reference voltage is regulated both and combined, can improve the precision of electric current effectively.In one embodiment, can realize such as 4 kinds of reference currents, being respectively the multiple reference current of efferent duct M1: 10mA, 20mA, 30mA, 40mA by the selection of regulating resistance R 1 and a plurality of reference voltages.
Reference voltage selects signal and resistance to select signal to be provided by the output driver element of correspondence.Described efferent duct M1 can be nmos pass transistor.
Above the utility model has been carried out the enough detailed description with certain particularity.Under those of ordinary skill in the field should be appreciated that the description among the embodiment only is exemplary, under the prerequisite that does not depart from true spirit of the present utility model and scope, make change and all should belong to protection range of the present utility model.The utility model scope required for protection is limited by described claims, rather than limit by the foregoing description among the embodiment.
Claims (9)
1. led drive circuit, it is characterized in that: it comprises:
Output module;
Memory module, it stores the channel data of described output module, described channel data includes multiframe data and control data, every frame data include starting point PWM data, terminal point PWM data, brightness hopping amplitude and brightness duration, and described control data comprises start frame, length of the cycle and cycle-index;
Drive control module produces pwm signal according to described frame data and control data, and described output module produces output current under the driving of pwm signal.
2. led drive circuit as claimed in claim 1, it is characterized in that described output module is N, described memory module all stores corresponding a channel data for each output module, every part of channel data all includes M frame data and control data, and wherein N and M are the natural number greater than 1.
3. led drive circuit as claimed in claim 2 is characterized in that,
Described drive control module includes command register, each output module all is configured with two kinds of drive patterns, first drive pattern is outside PWM drive pattern, second drive pattern is autonomous PWM drive pattern, described command register is deposited to each output module 1 control bit is set, by the drive pattern of described control bit with regard to each output module of may command is set
When an output module was autonomous PWM drive pattern, described drive control module obtained the channel data of this output module correspondence in described memory module, and produced pwm signal according to described channel data and give this output module; When an output module was outside PWM drive pattern, described drive control module received the channel data of this output module from external interface, and produced pwm signal according to described channel data and give this output module.
4. led drive circuit as claimed in claim 3 is characterized in that,
Described drive control module comprises the N corresponding with each output module output driver element, when autonomous PWM drive pattern, described output driver element obtains corresponding channel data in described memory module, and produce pwm signal in view of the above to drive corresponding output module, externally during the PWM drive pattern, described output driver element receives the channel data of external interface input, and produces pwm signal in view of the above to drive corresponding output module.
5. as the arbitrary described led drive circuit of claim 1-4, it is characterized in that,
Described output module comprises operational amplifier, switching device, efferent duct and resistance,
The output of described operational amplifier links to each other with the grid of described efferent duct via described switching device, the source electrode of described efferent duct links to each other with an end of described resistance, the other end ground connection of described resistance, the drain electrode of described efferent duct is as the output of described output module, the normal phase input end of described operational amplifier connects reference voltage, inverting input connects the source electrode of described efferent duct, and the turn-on and turn-off of described switching device are controlled by pwm signal.
6. led drive circuit as claimed in claim 5 is characterized in that,
Described resistance is adjustable resistance, selects signal to adjust by resistance, and described reference voltage selects signal selected from a plurality of different reference voltages by described multichannel reference voltage unit according to reference voltage.
7. as the arbitrary described led drive circuit of claim 1-4, it is characterized in that,
Described drive control module can generate a pwm signal according to the starting point PWM data of frame data, and this pwm signal will be as the first rank pwm signal that carries out the PWM modulation according to these frame data;
Described drive control module can generate a pwm signal according to the described terminal point PWM data of frame data, and this pwm signal will be as the tail rank pwm signal that carries out the PWM modulation according to these frame data;
The described brightness duration is represented the time that every rank pwm signal continues;
The duty ratio of the current rank of the long expression of described brightness skip frame degree pwm signal and following single order pwm signal poor.
8. led drive circuit as claimed in claim 7, it is characterized in that, in starting point PWM data during less than terminal point PWM data, the duty ratio of described pwm signal will be that step-length increases progressively with the brightness hopping amplitude, during greater than terminal point PWM data, the duty ratio of described pwm signal is that step-length is successively decreased with the brightness hopping amplitude in starting point PWM data.
9. led drive circuit as claimed in claim 8 is characterized in that,
The start frame of described control data is represented the start frame data of this PWM modulation, and described length of the cycle is represented the number of the frame data of this PWM modulation, and described cycle-index is represented the cycle-index of this PWM modulation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020535048XU CN201821549U (en) | 2010-09-19 | 2010-09-19 | LED driving circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201020535048XU CN201821549U (en) | 2010-09-19 | 2010-09-19 | LED driving circuit |
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| CN201821549U true CN201821549U (en) | 2011-05-04 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101938877A (en) * | 2010-09-19 | 2011-01-05 | 无锡力芯微电子股份有限公司 | LED driving circuit |
| CN105828471A (en) * | 2015-01-23 | 2016-08-03 | 矢崎总业株式会社 | Carriage internal illumination device |
-
2010
- 2010-09-19 CN CN201020535048XU patent/CN201821549U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101938877A (en) * | 2010-09-19 | 2011-01-05 | 无锡力芯微电子股份有限公司 | LED driving circuit |
| CN101938877B (en) * | 2010-09-19 | 2013-02-27 | 无锡力芯微电子股份有限公司 | LED driving circuit |
| CN105828471A (en) * | 2015-01-23 | 2016-08-03 | 矢崎总业株式会社 | Carriage internal illumination device |
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