CN201797555U - Startup circuit of hunting digital camera - Google Patents
Startup circuit of hunting digital camera Download PDFInfo
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- CN201797555U CN201797555U CN201020503845XU CN201020503845U CN201797555U CN 201797555 U CN201797555 U CN 201797555U CN 201020503845X U CN201020503845X U CN 201020503845XU CN 201020503845 U CN201020503845 U CN 201020503845U CN 201797555 U CN201797555 U CN 201797555U
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Abstract
The utility model discloses a startup circuit of a hunting digital camera, which comprises an initial startup circuit, a key startup circuit and a sensor startup circuit. The initial startup circuit is provided with an initial startup signal judging port, the key startup circuit is provided with a setting completion signal output end, the sensor startup circuit is provided with a sensor signal input end, and three startup modes of the hunting digital camera can be realized through distinguishing the data of the initial startup circuit, the setting completion signal output end and the sensor signal input end. The hunting digital camera restores the shutdown state after initial startup, can be started up through keys for parameter setting or started up quickly for shooting, and can restore the shutdown state after setting or shooting, and thus the standby time is greatly extended under conditions with equal power.
Description
Technical field
The utility model relates to a kind of camera boot-strap circuit, relates in particular to a kind of hunting digital camera boot-strap circuit.
Background technology
The hunting digital camera can dynamically be taken pictures and record a video by round-the-clock infrared auto-induction, and the hunting digital camera is of many uses, can be used for: forestry, scientific investigation, animal, environmental protection department's animal ecology monitoring; The secret evidence obtaining of scouting, check, enforce the law of public security organs; The journalist is hidden, and observation is taken pictures, research firm, the private eye evidence obtaining of taking on the sly; Antitheft defendance in the family room is installed in windowsill or limit, gate, the environment around monitoring villa or the garden.
The hunting digital camera carries out for people that hidden field is taken and monitoring provide can very big facility, the hunting digital camera is compared with common monitoring camera and is had more better disguise, install and carry more convenient, therefore the battery that digital camera does not have external power supply more but rely in the camera of hunting is powered, the working method of hunting camera is in the state of start dormancy in the prior art for camera under the situation that does not have the mobile object triggering system, as mobile object through out-of-date, triggering system, take pictures or make a video recording, because needing to be in holding state after the digital camera start just can take always, therefore quite power consumption, the stand-by time of the camera that causes hunting has been subjected to very big restriction.
The utility model content
The purpose of this utility model provides a kind of hunting digital camera boot-strap circuit, it has solved in the prior art and need be in holding state after the start of hunting digital camera always and cause the very big problem of power consumption, can take by the quick turn-on under off-mode after a kind of start first is provided, take the hunting digital camera boot-strap circuit of getting back to off-mode after finishing.
Above-mentioned purpose of the present utility model is achieved through the following technical solutions:
A kind of hunting digital camera boot-strap circuit wherein, comprising:
Boot-strap circuit first, its signal input part links to each other with the logic input terminal of one first control logic by one first delay circuit, the output of first control logic links to each other with the input of one second delay circuit, the output of described second delay circuit links to each other with the logic input terminal of one second control logic, the output of described second control logic judges that with start first port is connected, and the output of described first control logic also triggers port with starting-up signal and is connected;
Described first delay circuit is specially: one first protective resistance, described first protective resistance is serially connected between described signal input part and the described first control logic input, holds first of ground connection to postpone electric capacity one by one and is attempted by on the described first control logic input;
Described first control logic specifically comprises: one the one NPN triode, the base stage of a described NPN triode links to each other with the output of described delay circuit, the collector electrode of a described NPN triode links to each other with described signal input part, the grounded emitter of a described NPN triode; The collector electrode of one the one PNP triode links to each other with described signal input part, the collector electrode of one the 5th NPN triode links to each other with the base stage of a described PNP triode, be serially connected with one first isolated resistance between the collector electrode of the base stage of described the 5th NPN triode and a described PNP triode, the grounded emitter of described the 5th NPN triode, the emitter of a described PNP triode links to each other with the input of described second delay circuit, and the emitter of a described PNP triode triggers port with described starting-up signal and links to each other;
Described second delay circuit is specially: one second protective resistance is serially connected between the described second control logic input of output of described first control logic, holds second of ground connection to postpone the input that electric capacity is attempted by described second control logic circuit one by one; Described second control logic is specially: the base stage of one the 2nd NPN triode links to each other with the input of described second delay circuit, and the collector electrode of described the 2nd NPN triode judges that with described start first a port and a power supply link to each other;
Described the 3rd delay circuit is specially: one the 3rd protective resistance is serially connected between described button input and described the 3rd control logic input, holds the 3rd of ground connection to postpone the input that electric capacity is attempted by described the 3rd control logic one by one.
The button boot-strap circuit, its button input links to each other with the input of one the 3rd delay circuit, the output of described the 3rd delay circuit is finished signal output part by one the 3rd control logic and a setting and is linked to each other, and described button input also triggers port with described starting-up signal and is connected;
Described the 3rd delay circuit is specially: one the 3rd protective resistance is serially connected between described button input and described the 3rd control logic input, holds the 3rd of ground connection to postpone the input that electric capacity is attempted by described the 3rd control logic one by one;
Described the 3rd control logic is specially: the base stage of one the 3rd NPN triode links to each other with the output of described the 3rd delay circuit, the collector electrode of described the 3rd NPN triode is finished signal output part with described power supply and described setting and is linked to each other the grounded emitter of described the 3rd NPN triode.
The transducer boot-strap circuit, it has the transducing signal input, signal input part is finished in time control input end and setting, and is connected with three logic input terminals of logic controller with one respectively, and the output of described and logic controller triggers port with described starting-up signal and is connected.
Above-mentioned boot-strap circuit, wherein, described boot-strap circuit first also comprises; The base stage of one the 2nd PNP triode links to each other with described signal input part, and the collector electrode of described the 2nd PNP triode links to each other with the input of described first control logic, the grounded emitter of described the 2nd PNP triode.
Above-mentioned boot-strap circuit, wherein, described button input links to each other with the input of described the 3rd delay circuit by one the 4th control logic;
Described the 4th control logic specifically comprises, one catches input links to each other with the base stage of one the 4th NPN triode, the collector electrode of described the 4th NPN triode links to each other with described button input, the grounded emitter of described the 4th NPN triode, the collector electrode of one the 3rd PNP triode links to each other with described button input, the collector electrode of one the 6th NPN triode links to each other with the base stage of described the 3rd PNP triode, be serially connected with one second isolated resistance between the collector electrode of the base stage of described the 6th NPN triode and described the 3rd PNP triode, the grounded emitter of described the 6th NPN triode, the emitter of described the 3rd PNP triode links to each other with the input of described the 3rd delay circuit, and the emitter of described the 3rd PNP triode triggers port with described starting-up signal and links to each other.
The utility model hunting digital camera boot-strap circuit is controlled boot-strap circuit, button boot-strap circuit and transducer boot-strap circuit first by main control chip, but realize getting back to off-mode after the hunting digital camera is started shooting first and under off-mode quick turn-on take, get back to the purpose of off-mode after shooting is finished, under the situation of equal electric weight, prolonged the time of standby greatly.
Description of drawings
Fig. 1 is the circuit structure diagram of the utility model hunting digital camera boot-strap circuit;
Fig. 2 is the circuit structure diagram of the boot-strap circuit first of the utility model hunting digital camera boot-strap circuit;
Fig. 3 is the circuit structure diagram of the button boot-strap circuit of the utility model hunting digital camera boot-strap circuit;
Fig. 4 is the circuit structure diagram of the transducer boot-strap circuit of the utility model hunting digital camera boot-strap circuit;
Fig. 5 is the circuit structure diagram of first delay circuit of the utility model hunting digital camera boot-strap circuit;
Fig. 6 is the circuit structure diagram of first control logic of the utility model hunting digital camera boot-strap circuit;
Fig. 7 is the circuit structure diagram of second delay circuit of the utility model hunting digital camera boot-strap circuit;
Fig. 8 is the circuit structure diagram of second control logic of the utility model hunting digital camera boot-strap circuit;
Fig. 9 is the circuit structure diagram of the 3rd delay circuit of the utility model hunting digital camera boot-strap circuit;
Figure 10 is the circuit structure diagram of the 3rd control logic of the utility model hunting digital camera boot-strap circuit;
Figure 11 is the circuit structure diagram of the embodiment six of the utility model hunting digital camera boot-strap circuit;
Figure 12 is the circuit structure diagram of the 4th control logic of the utility model hunting digital camera boot-strap circuit.
Embodiment
Below in conjunction with accompanying drawing embodiment of the present utility model is described further:
Embodiment (one)
Fig. 1 is the circuit structure diagram of the utility model hunting digital camera boot-strap circuit, Fig. 2 is the structural representation of boot-strap circuit first of the utility model hunting digital camera boot-strap circuit, see also Fig. 1, Fig. 2, the boot-strap circuit first 1 of the boot-strap circuit of the utility model hunting digital camera, its signal input part 11 links to each other with the logic input terminal of one first control logic 13 by one first delay circuit 12, the effect of first delay circuit 12 is that the signal that signal input part 11 is imported is postponed, the output of first control logic 13 links to each other with the input of one second delay circuit 14, first control circuit 13 is used for the level of signal input part 11 inputs is changed, if signal input part defeated 11 is gone into the then logic output terminal output low level of first control logic 13 of high level, otherwise, the logical one 3 outputs output high level of first control logic; The output of second delay circuit 14 links to each other with the logic input terminal of one second control logic 15, second delay circuit 14 postpones the signal of the logic output terminal output of first control logic 13, it is big that pulse signal width after the delay becomes, postpone the pulse signal of the width of afterpulse signal greater than 33 inputs of sensor signal input, the system that makes is distinguished the pulse of the judgement of start first port one 6 outputs of boot-strap circuit 1 first and sensor signal input 33 input pulses of transducer boot-strap circuit 3 easily, the output of second control logic 15 judges that with start first port one 6 is connected, start first judges that interface 16 is used to judge whether the signal of second control logic, 15 inputs is the signal of starting shooting first, the output of first control logic 13 also triggers port 4 with starting-up signal and is connected the signal of sensor signal input 33 input pickups; Time control input end signal 31 input time, the low level of an end time is exported according to the data that are provided with in time control input end 31 after whenever finishing the primary transducer start, makes whether sensor signal input 33 has the signal input that camera is opened during this period; After finishing the button start, be provided with and finish signal output part 34 output high level, the signal of the output output of first control logic 13 can also be controlled camera and open, and realizes start first;
Fig. 3 is the circuit structure diagram of the button boot-strap circuit of the utility model hunting digital camera boot-strap circuit, see also Fig. 3, the button boot-strap circuit 2 of the utility model hunting digital camera boot-strap circuit, its button input 21 links to each other with the input of one the 3rd delay circuit 22 by one the 4th control logic 25, the output of the 3rd delay circuit 22 is finished signal output part 24 by one the 3rd control logic 23 and a setting and is linked to each other, button input 21 also triggers port 4 with described starting-up signal and is connected, the signal of button input 21 inputs can be controlled camera and open, and realizes the button start;
Fig. 4 is the circuit structure diagram of the transducer boot-strap circuit of the utility model hunting digital camera boot-strap circuit, see also Fig. 4, the transducer boot-strap circuit 3 of the utility model hunting digital camera boot-strap circuit, it has transducing signal input 33, signal input part 34 is finished in time control input end 31 and setting, and be connected with three logic input terminals of logic controller 35 with one respectively, triggering port 4 with the output 36 of logic controller 35 with starting-up signal is connected, make when time control input end 31 and be provided with and finish signal input part 3 output high level, and when transducing signal input 33 has the signal input, can control camera with the signal of output 36 output of logic controller 35 and open, realize the transducer start; Wherein, pulse pattern and transducing signal input 33 pulse patterns that starting-up signal triggers port 4 acceptance are complementary, and with boot-strap circuit 1 and button boot-strap circuit 2 are input to the pulsion phase coupling that starting-up signal triggers port 4 first, guarantee that three boot-strap circuits all can realize normal boot-strap, the pulse duration that signal output part 24 outputs are finished in start judgement port one 6 and setting first is identical, pulse duration than transducing signal input 33 output is wide, therefore can start shooting first, the button start still is the judgement of transducer start.
The logic input terminal of first control logic 13 in the above-mentioned boot-strap circuit is input as high level, its output output low level, otherwise, its output output high level; The logic input terminal of second control logic 15 is input as high level, its output output low level, otherwise, its output output high level; The input of the 3rd control logic 23 is input as high level, its output output low level, otherwise, its output output high level, behind signal input part 11 input high levels at first through first delay circuit 12, first delay circuit 12 is imported first control logic 13 with signal delay after a period of time, make the pulse of control logic 13 outputs of winning trigger port 4 to starting-up signal, camera is opened, after postponing, the pulse of 14 pairs first control logics of second delay circuit, 13 outputs is input in second control logic 15, it is big that pulse signal width after the delay becomes, second control logic 15 is at first exported high level, after pulse enters second control logic 15, second control logic, 15 output low levels, second control logic 15 is exported high level again after pulse disappears, and system judges that according to the signal of second control logic, 15 outputs output start this time is start first; Pulse of button output 21 inputs, starting-up signal triggers after port 4 receives this pulse to be opened camera, after postponing, the pulse of 22 pairs of button inputs of the 3rd delay circuit, 21 outputs is input in the 3rd control logic 23, it is big that pulse signal width after the delay becomes, the 3rd control logic 23 is at first exported high level, after pulse enters the 3rd control logic 23, the 3rd control logic 23 output low levels, the 3rd control logic 23 is exported high level again after pulse disappears, and system judges that according to the signal of the 3rd control logic 23 outputs output start this time is the button start.
Three logic input terminals input in the above-mentioned boot-strap circuit and logic controller 35 is high level, its output output high level, otherwise, its output output low level, make when time control input end 31 and be provided with and finish signal input part 3 output high level, and transducing signal input 33 has signal input time, can control camera with the signal of output 36 outputs of logic controller 35 and open, and realizes the transducer start.
Above-mentioned boot-strap circuit, wherein, described the 4th control logic 25 has one and catches input 251, described seizure input 251 input high levels, described the 4th control logic 25 output low levels; Described seizure input 251 input low levels, described button input defeated 21 is gone into low level, described the 4th control logic 25 output low levels; Described seizure input 251 input low levels, described button input 21 input high levels, described the 4th control logic 25 output high level make when seizure input 251 input high levels button input 21 input high levels or low level all can't the parameter of camera be provided with.
Embodiment (two)
Fig. 5 is the circuit structure diagram of first delay circuit of the utility model hunting digital camera boot-strap circuit, Fig. 6 is the circuit structure diagram of first control logic of the utility model hunting digital camera boot-strap circuit, see also Fig. 5, Fig. 6, on the basis of above-mentioned implementation column, first delay circuit 12 of the utility model hunting digital camera boot-strap circuit 1 is specially: one first protective resistance 121, first protective resistance 121 is serially connected between signal input part 11 and first control logic, 13 inputs, holding first of ground connection to postpone electric capacity 122 one by one is attempted by on the input of first control logic 13, at first postponing electric capacity 122 to first when signal input part 11 inputs one high level charges, could power to first control logic 13 after being full of electricity, the effect of first protective resistance 121 is that the protection first delay electric capacity 122 can not damage because of obtaining high level suddenly; First control logic 13 specifically comprises: one the one NPN triode 131, the base stage of a described NPN triode 131 links to each other with the output of delay circuit 12, the collector electrode of the one NPN triode links to each other with signal input part 11, the grounded emitter of a NPN triode 131; The collector electrode of one the one PNP triode 133 links to each other with signal input part 11, the collector electrode of one the 5th NPN triode 134 links to each other with the base stage of a PNP triode 133, be serially connected with one first isolated resistance 132 between the collector electrode of the base stage of the 5th NPN triode 134 and a PNP triode 133, the grounded emitter of the 5th NPN triode 134, the emitter of the one PNP triode 133 links to each other with the input of second delay circuit 14, and the emitter of a PNP triode 133 triggers port 4 with starting-up signal and links to each other; At first first delay circuit 12 is charged behind signal input part 11 input high levels, at this moment the base stage low level of a NPN triode 131, the one NPN triode 131 turn-offs, in fact the 5th NPN triode 134 is equivalent to two diodes, make the collector electrode high level of the PNP triode 133 of winning, the collector electrode of the one PNP triode 133 links to each other with signal input part 11, an and then PNP triode 133 conductings, the output output high level of first control logic 13, after the electric capacity in first delay circuit 12 is full of electricity, the base stage high level conducting of the one NPN triode 133, the 5th NPN triode 134 turn-offs, and then the output output low level of first control logic 13.
Embodiment (three)
Fig. 7 is the circuit structure diagram of second delay circuit of the utility model hunting digital camera boot-strap circuit, Fig. 8 is the circuit structure diagram of second control logic of the utility model hunting digital camera boot-strap circuit, see also Fig. 7, Fig. 8, second delay circuit 14 at the utility model hunting digital camera boot-strap circuit on the basis of the foregoing description is specially: one second protective resistance 143 is serially connected between output second control logic 15 inputs of first control logic 13, hold second of ground connection to postpone the input that electric capacity 142 is attempted by second control logic 15 one by one, postpone electric capacity 142 to second during the input input high level of second delay circuit 14 and charge, second postpones electric capacity 142 discharges during the input input low level of second delay circuit 14; Second control logic 15 is specially: the base stage of one the 2nd NPN triode 151 links to each other with the input of second delay circuit 14, the collector electrode of the 2nd NPN triode 151 judges that with start first a port one 6 and a power supply link to each other 152, be output as low level when making the input input high level of second control logic 15, when being input as low level, be output as high level.
Above-mentioned hunting digital camera boot-strap circuit also comprises one first diode 141, first control logic 13 links to each other by first diode 141 with second delay circuit 14, the output of first control logic 13 links to each other with the anode of first diode 141, the input of second delay circuit 14 links to each other with the negative electrode of first diode 141, because the unilateral conduction of first diode 141, make that electric current only can flow to second control logic 15 when second in second delay circuit 14 postponed electric capacity 142 discharges, can not produce the signal that disturbs starting-up signal port 4.
String has one first noise reduction resistance between the base stage of the 2nd NPN triode 151 of above-mentioned second control logic 15 and the collector electrode, and the waveform that can make output is stable more and can play the effect of protection.
Embodiment (four)
Fig. 9 is the circuit structure diagram of the 3rd delay circuit of the utility model hunting digital camera boot-strap circuit, see also Fig. 9, the 3rd delay circuit 22 at the utility model hunting digital camera boot-strap circuit on the basis of the foregoing description is specially: one the 3rd protective resistance 222 is serially connected between described button input 21 and the 3rd control logic input 23, hold the 3rd of ground connection to postpone the input that 223 electric capacity are attempted by three control logics 23 one by one, postpone electric capacity 223 to the 3rd during the input input high level of the 3rd delay circuit 22 and charge, the 3rd postpones electric capacity 223 discharges during the input input low level of the 3rd delay circuit 22;
Above-mentioned hunting digital camera boot-strap circuit also comprises one second diode 221, button input 21 links to each other by second diode 221 with the 3rd delay circuit 22, button input 21 links to each other with the anode of second diode 221, the input of the 3rd delay circuit 23 links to each other with the negative electrode of second diode 221, makes can not exert an influence to the start signal port when the 3rd in the 3rd delay circuit 22 postpones electric capacity 233 discharges.
Embodiment (five)
Figure 10 is the circuit structure diagram of the 3rd control logic of the utility model hunting digital camera boot-strap circuit, see also Figure 10, the 3rd control logic 23 of the utility model hunting digital camera boot-strap circuit is specially on the basis of the foregoing description: the base stage of one the 3rd NPN triode 232 links to each other with the output of the 3rd delay circuit 22, the collector electrode of the 3rd NPN triode 232 is finished signal output part 24 with power supply 231 and setting and is linked to each other, the grounded emitter of the 3rd NPN triode 232, be output as low level when making the input input high level of the 3rd control logic 23, when being input as low level, be output as high level.
String has one second noise reduction resistance between the base stage of the 3rd NPN triode 232 of above-mentioned the 3rd control logic and the collector electrode, and the waveform that can make output is stable more and can play the effect of protection.
Implementation column (six)
Figure 11 is the circuit structure diagram of the embodiment six of the utility model hunting digital camera boot-strap circuit; see also Figure 11; on the basis of the foregoing description; the boot-strap circuit first 1 of the utility model hunting digital camera boot-strap circuit also comprises: the base stage of one the 2nd PNP triode 17 links to each other with signal input part 11; the collector electrode of the 2nd PNP triode 17 links to each other with the input of first control logic 13; the grounded emitter of the 2nd PNP triode 13; be provided with first in first delay circuit 12 and postpone electric capacity 122; when can realizing shutting down, the 2nd PNP triode 17 that one grounded emitter is set postpones the repid discharge of electric capacity 122 to first; can realize the high-speed switch machine, play the effect of protection electric capacity simultaneously.
Implementation column (seven)
Figure 12 is the circuit structure diagram of the 4th control logic of the utility model hunting digital camera boot-strap circuit, on the basis of the foregoing description, the utility model hunting digital camera boot-strap circuit also comprises one the 4th control logic 25, it specifically comprises, one catches input 251 links to each other with the base stage of one the 4th NPN triode 252, the collector electrode of the 4th NPN triode 252 links to each other with button input 21, the grounded emitter of the 4th NPN triode 252, the collector electrode of one the 3rd PNP triode 254 links to each other with button input 21, the collector electrode of one the 6th NPN triode 255 links to each other with the base stage of the 3rd PNP triode 254, be serially connected with one second isolated resistance 253 between the collector electrode of the base stage of the 6th NPN triode 255 and the 3rd PNP triode 254, the grounded emitter of the 6th NPN triode 255, the emitter of the 3rd PNP triode 254 links to each other with the input of the 3rd delay circuit 22, the emitter of the 3rd PNP triode 254 triggers port 4 with starting-up signal and links to each other, when catching input 251 input high levels, button is imported 21 ends to the 4th control logic 25 input high levels or the equal output low level of low level the 4th control logic 25 outputs, catch input 251 input low levels, button input 21 input high levels, the 4th control logic 25 output high level, otherwise, the 4th control logic 25 output low levels, the effect of the 4th control logic 25 are to make button boot-strap circuit 2 can't carry out the setting of parameter when signal acquisition is imported.
In sum, the utility model hunting digital camera boot-strap circuit is in holding state for a long time when having solved in the prior art work of hunting camera and causes the serious problem of power consumption, by distinguishing boot-strap circuit, button boot-strap circuit and transducer boot-strap circuit first, realize the quick turn-on shooting under the hunting digital camera off-mode, get back to the purpose of off-mode after shooting is finished, under the situation of equal electric weight, prolonged the time of standby greatly.
Will be appreciated that; the above embodiments are only as the exemplifying and propose preferred embodiment of the utility model hunting digital camera boot-strap circuit; the utility model hunting digital camera boot-strap circuit also not only is confined to this, and the various simple modifications that those skilled in the art can implement also should fall in the protection range of the utility model hunting digital camera boot-strap circuit.
Claims (3)
1. a hunting digital camera boot-strap circuit is characterized in that, comprising:
Boot-strap circuit first, its signal input part links to each other with the logic input terminal of one first control logic by one first delay circuit, the output of first control logic links to each other with the input of one second delay circuit, the output of described second delay circuit links to each other with the logic input terminal of one second control logic, the output of described second control logic judges that with start first port is connected, and the output of described first control logic also triggers port with starting-up signal and is connected;
Described first delay circuit is specially: one first protective resistance, described first protective resistance is serially connected between described signal input part and the described first control logic input, holds first of ground connection to postpone electric capacity one by one and is attempted by on the described first control logic input;
Described first control logic specifically comprises: one the one NPN triode, the base stage of a described NPN triode links to each other with the output of described delay circuit, the collector electrode of a described NPN triode links to each other with described signal input part, the grounded emitter of a described NPN triode; The collector electrode of one the one PNP triode links to each other with described signal input part, the collector electrode of one the 5th NPN triode links to each other with the base stage of a described PNP triode, be serially connected with one first isolated resistance between the collector electrode of the base stage of described the 5th NPN triode and a described PNP triode, the grounded emitter of described the 5th NPN triode, the emitter of a described PNP triode links to each other with the input of described second delay circuit, and the emitter of a described PNP triode triggers port with described starting-up signal and links to each other;
Described second delay circuit is specially: one second protective resistance is serially connected between the described second control logic input of output of described first control logic, holds second of ground connection to postpone the input that electric capacity is attempted by described second control logic circuit one by one; Described second control logic is specially: the base stage of one the 2nd NPN triode links to each other with the input of described second delay circuit, and the collector electrode of described the 2nd NPN triode judges that with described start first a port and a power supply link to each other;
Described the 3rd delay circuit is specially: one the 3rd protective resistance is serially connected between described button input and described the 3rd control logic input, holds the 3rd of ground connection to postpone the input that electric capacity is attempted by described the 3rd control logic one by one;
The button boot-strap circuit, its button input links to each other with the input of one the 3rd delay circuit, the output of described the 3rd delay circuit is finished signal output part by one the 3rd control logic and a setting and is linked to each other, and described button input also triggers port with described starting-up signal and is connected;
Described the 3rd delay circuit is specially: one the 3rd protective resistance is serially connected between described button input and described the 3rd control logic input, holds the 3rd of ground connection to postpone the input that electric capacity is attempted by described the 3rd control logic one by one;
Described the 3rd control logic is specially: the base stage of one the 3rd NPN triode links to each other with the output of described the 3rd delay circuit, the collector electrode of described the 3rd NPN triode is finished signal output part with described power supply and described setting and is linked to each other the grounded emitter of described the 3rd NPN triode;
The transducer boot-strap circuit, it has the transducing signal input, signal input part is finished in time control input end and setting, and is connected with three logic input terminals of logic controller with one respectively, and the output of described and logic controller triggers port with described starting-up signal and is connected.
2. boot-strap circuit according to claim 1 is characterized in that, described boot-strap circuit first also comprises;
The base stage of one the 2nd PNP triode links to each other with described signal input part, and the collector electrode of described the 2nd PNP triode links to each other with the input of described first control logic, the grounded emitter of described the 2nd PNP triode.
3. boot-strap circuit according to claim 1 is characterized in that, described button input links to each other with the input of described the 3rd delay circuit by one the 4th control logic;
Described the 4th control logic specifically comprises, one catches input links to each other with the base stage of one the 4th NPN triode, the collector electrode of described the 4th NPN triode links to each other with described button input, the grounded emitter of described the 4th NPN triode, the collector electrode of one the 3rd PNP triode links to each other with described button input, the collector electrode of one the 6th NPN triode links to each other with the base stage of described the 3rd PNP triode, be serially connected with one second isolated resistance between the collector electrode of the base stage of described the 6th NPN triode and described the 3rd PNP triode, the grounded emitter of described the 6th NPN triode, the emitter of described the 3rd PNP triode links to each other with the input of described the 3rd delay circuit, and the emitter of described the 3rd PNP triode triggers port with described starting-up signal and links to each other.
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CN201020503845XU CN201797555U (en) | 2010-08-25 | 2010-08-25 | Startup circuit of hunting digital camera |
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CN201020503845XU CN201797555U (en) | 2010-08-25 | 2010-08-25 | Startup circuit of hunting digital camera |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103024258A (en) * | 2011-09-28 | 2013-04-03 | 联想(北京)有限公司 | Method for fast shooting and electronic equipment |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103024258A (en) * | 2011-09-28 | 2013-04-03 | 联想(北京)有限公司 | Method for fast shooting and electronic equipment |
CN103024258B (en) * | 2011-09-28 | 2016-04-27 | 联想(北京)有限公司 | A kind of image pickup method and electronic equipment fast |
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