CN201741079U

CN201741079U - Special SOC (System on a Chip) chip for IPMI (Intelligent Platform Management Interface) integrating a plurality of IP cores

Info

Publication number: CN201741079U
Application number: CN2010202867155U
Authority: CN
Inventors: 姜凯; 于治楼; 李峰
Original assignee: Langchao Electronic Information Industry Co Ltd
Current assignee: Inspur Electronic Information Industry Co Ltd
Priority date: 2010-08-10
Filing date: 2010-08-10
Publication date: 2011-02-09
Anticipated expiration: 2020-08-10

Abstract

The utility model relates to the technical field of microelectronics, in particular to a special SOC (System on a Chip) chip for an IPMI (Intelligent Platform Management Interface) integrating a plurality of IP cores, comprising a chip body. The special SOC chip for an IPMI integrating a plurality of IP cores is characterized in that a 32-bit RISC (Reduced Instruction-Set Computer) processor, an Ethernet controller, a SMBus interface, a PWM (Pulse-Width Modulation) output, an LPC (Linear Power Controller), an LCD display driver, a on-chip SRAM (Static Random Access Memory) memory and an E2PROM (Programmable Read-Only Memory) are arranged on the chip body, and the Ethernet controller, the SMBus interface, the PWM output, the LPC bus controller, the LCD display driver, the on-chip SRAM memory and the E2PROM memory are connected together with the 32-bit RISC processor through a data wire. Compared with the prior art, the special SOC chip for an IPMI integrating a plurality of IP cores has the characteristics of small size, high degree of intelligentization, material saving, low energy consumption and the like.

Description

The special-purpose SOC chip of a kind of IPMI of integrated multiple IP kernel

Technical field

The utility model relates to microelectronics technology, and a kind of special-purpose SOC chip of IPMI (Intelligent Platform Management Interface) of integrated multiple IP kernel specifically is provided.

Background technology

Along with the development of semiconductor process techniques and design tool, more and more Fu Za function is integrated on the single silicon-chip, and SOC (SOC (system on a chip)) produces under the general orientation that integrated system (IS) changes at integrated circuit (IC) just.The appearance of SOC makes integrated circuit develop into integrated system, and the function of whole complete electronic set can be integrated in the chip piece.In the near future, the boundary between integrated circuit and the complete electronic set will thoroughly be broken.SOC is integrated in microprocessor, Simulation with I P nuclear, digital IP kernel and storer on the one chip exactly.

Along with people constantly improve the requirement of smart machine, only the large scale integrated circuit that becomes increasingly complex is integrated into the functional integrated circuit of making on the single-chip, be assembled into circuit board by functional integrated circuit then, can not have satisfied people's higher and more requirement of the more intelligent integrated equipment of economical with materials and energy consumption with mainboard as the critical piece of equipment again littler, the intelligent degree of volume.

Summary of the invention

The utility model is at above-mentioned the deficiencies in the prior art, the special-purpose SOC chip of IPMI of the integrated multiple IP kernel that provide little, the intelligent degree height of a kind of volume, save material, energy consumption is low.

The technical scheme that its technical matters that solves the utility model adopts is: the special-purpose SOC chip of a kind of IPMI of integrated multiple IP kernel, comprise chip body, be characterized in, chip body is provided with 32 risc processors, the Ethernet controller, the SMBus interface, PWM output, the lpc bus controller, the LCD display driver, SRAM storer and E2PROM storer on the sheet, the Ethernet controller, the SMBus interface, PWM output, the lpc bus controller, the LCD display driver, SRAM storer and E2PROM storer link together by data line and 32 risc processors on the sheet.

6 pairs of SMBus interfaces and 4 road PWM output preferably is set on chip body.

The lpc bus controller establishes a communications link by lpc bus and Host end, the SMBus interface is connected with slave units such as various sensors and reads in various data, PWM output can provide the control signal of equipment such as fan, and the Ethernet interface can provide data necessary communication and LAN Alert signal.

The special-purpose SOC chip of the IPMI of integrated multiple IP kernel of the present utility model is compared with prior art, has following outstanding beneficial effect: simple in structure; Volume is little, effectively reduce embedded system power consumption, improve embedded system reliability, reduce the characteristics such as cost of embedded system.

Description of drawings

Accompanying drawing 1 is the structural representation of the special-purpose SOC chip of IPMI of the integrated multiple IP kernel of the utility model;

Accompanying drawing 2 is work system structured flowcharts of SOC chip shown in Figure 1.

Embodiment

The utility model is described in further detail below in conjunction with the drawings and specific embodiments, but not as to qualification of the present utility model.

Provide a most preferred embodiment below:

As shown in Figure 1, the special-purpose SOC chip of the IPMI of integrated multiple IP kernel of the present utility model is by chip body 1 and be arranged on and have that SRAM storer 9 and E2PROM storer 8 constitute on 32 risc processors 2, Ethernet controller 5, SMBus interface 7, PWM output 6, lpc bus controller 3, LCD display driver 4, the sheet on the chip body 1.SRAM storer 9 and E2PROM storer 8 link together by data line and 32 risc processors 2 on 5,6 pairs of SMBus interface 7,4 road PWM outputs 6 of Ethernet controller, lpc bus controller 3, LCD display driver 4, the sheet.

As shown in Figure 2, its peripherals comprises Host end 10, LCD demonstration 11, mainboard LAN and LAN Alert signal 12, server fan 13, server fan watch-dog 14, power supply power consumption watch-dog 15, server temperature watch-dog 16 compositions.Host end 10 is connected with lpc bus controller 3, LCD shows that 11 are connected with LCD display driver 4, mainboard LAN and LANAlert signal 12 are connected with Ethernet controller 5, server fan 13 is connected with PWM output 6, and server fan watch-dog 14, power supply power consumption watch-dog 15 and server temperature watch-dog 16 all are connected with SMBus interface 7.

Employed 32 risc processors 2 in the special-purpose SOC chip of the IPMI of the integrated multiple IP kernel of the utility model, lpc bus controller 3, LCD display driver 4, Ethernet controller 5, PWM output 6, SMBus controller 7, E2PROM storer 8, SRAM storer 9 and peripherals Host end 10, LCD shows 11, mainboard LAN and LAN Alert signal 12, server fan 13, server fan watch-dog 14, power supply power consumption watch-dog 15, server temperature watch-dog 16 is the current techique and the parts of field of computer technology.

Claims

1. the special-purpose SOC chip of the IPMI of an integrated multiple IP kernel, comprise chip body, it is characterized in that, chip body is provided with SRAM storer and E2PROM storer on 32 risc processors, Ethernet controller, SMBus interface, PWM output, lpc bus controller, LCD display driver, the sheet, and SRAM storer and E2PROM storer link together by data line and 32 risc processors on Ethernet controller, SMBus interface, PWM output, lpc bus controller, LCD display driver, the sheet.

2. the special-purpose SOC chip of the IPMI of integrated multiple IP kernel according to claim 1 is characterized in that, chip body is provided with 6 pairs of SMBus interfaces and 4 road PWM output.