CN201662400U

CN201662400U - Circuit of main controller in navigation equipment

Info

Publication number: CN201662400U
Application number: CN2009202516404U
Authority: CN
Inventors: 倪大森
Original assignee: Tianjin 764 Communication and Navigation Technology Corp
Current assignee: Tianjin 764 Communication and Navigation Technology Corp
Priority date: 2009-12-11
Filing date: 2009-12-11
Publication date: 2010-12-01
Anticipated expiration: 2019-12-11

Abstract

The utility model relates to a circuit of a Russian-made blind landing main controller in navigation equipment, namely a circuit of a main controller in the navigation equipment, comprising a DSP central processor, a FLASH chip stored with a software program, an FRAM chip, a reset circuit, a real-time clock system, an RS232 communication interface, a CPLD module and an executing circuit, wherein the DSP central processor is respectively connected with the FLASH chip stored with the software program, the FRAM chip, the reset circuit, the real-time clock system, the RS232 communication interface, the CPLD module and the executing circuit. The circuit of the main controller has the benefits of having fast operating speed and good real-time response, being capable of recording more, and being capable of recording the working state and alarming information of the equipment in real time so as to lead workers to analyze. The circuit of the main controller can provide more external interfaces, control more unit modules, has large information throughput and high accuracy, has more strict control software with brand-new controllability, and is more reasonable and accurate to operate and control all operations of the equipment.

Description

Primary controller circuit in the navigator

Technical field

It is primary controller circuit in the navigator that the utility model relates to the blind primary controller circuit of Russia in a kind of navigator.

Background technology

Primary controller is the core component in the navigator, and as core processor, processing speed is slow by single-chip microcomputer for existing primary controller, and control ability is limited, causes the complete machine low-response, can't accomplish more intelligentized complete machine control, influences the complete machine performance.

Summary of the invention

In view of the deficiency that prior art exists, it is a kind of for the primary controller circuit in the navigator that satisfies complete machine response speed and rationalization more, hommization, intelligentized operation control requirement more efficiently that the utility model provides.

The utility model for achieving the above object, the technical scheme of being taked is: the primary controller circuit in a kind of navigator, it is characterized in that: this circuit comprises the DSP central processing unit, has the FLASH chip of software program, FRAM chip, reset circuit, real-time clock system, RS232 communication interface, CPLD module, executive circuit, described DSP central processing unit is connected with FLASH chip, FRAM chip, reset circuit, real-time clock system, CPLD module respectively, and described CPLD module is connected with executive circuit.

The beneficial effects of the utility model are: 1, fast operation, real-time response is good.That 2, can write down is more, and the FRAM chip of large buffer memory is adopted in new master control, can real time record under duty, the warning information of equipment analyze for the staff.Former primary controller does not possess this function.That 3, can control is more, and new master control provides more external interface, can control more unit module, and information throughput is big, and the accuracy height.Former master control is because arithmetic capability and interface restriction can not be played the effect of primary controller.4, have more rigorous control ability, brand-new Control Software has been loaded in new master control, and is reasonable more, accurate to the operations and the control of equipment.

Description of drawings

Fig. 1 is for the utility model circuit connection block diagram and as Figure of abstract.

Fig. 2 is the utility model software flow pattern.

Embodiment

As shown in Figure 1, primary controller circuit in the navigator, this circuit comprises the DSP central processing unit, has the FLASH chip of software program, FRAM chip, reset circuit, real-time clock system, RS232 communication interface, CPLD module, executive circuit, the DSP central processing unit is connected with FLASH chip, FRAM chip, reset circuit, real-time clock system, CPLD module respectively, and the CPLD module is connected with executive circuit.

Dsp system in this circuit: dsp system is made up of TMS320C6713 chip and peripheral hardware FLASH and FRAM chip, with dsp chip as central processing unit, the crystal oscillator that adopts 20MHz is as the clock source, utilize CPLD growth data bus, link to each other with transmitter unit with monitor, signal generation unit, system stability is quick, and information throughput is big.Each unit module of centralized control navigator makes navigator work more reasonable, and is efficient.

The RS232 serial line interface: primary controller provides 12 road RS232 serial line interfaces, and serial port chip adopts TL16C754B, and driver adopts MAX232.Select asynchronous mode for use, communication baud rate is 9600bps.Keep the exchanges data between primary controller and each unit, and can make corresponding control in real time.

Real-time clock system: utilize real-time clock DS12CR887+33 chip, accurately the register system time, make master control arrangement memory system fault and Operation Log, pass to the maintenance calculations machine by Remote Control Interface.FLASH and FRAM:FLASH are used for storing primary control program, import DSP when powering on master control is worked automatically, and FRAM is used for storing all system datas that need power down to preserve, as the various thresholdings of default and alarm record etc.

Executive circuit: by the steering order of CPLD expansion primary controller, control corresponding driving circuit working, thus control transmitter and receiver start or shutdown, control the radio-frequency (RF) switch in the feeder line extension set simultaneously.

Working method: primary controller adopts and interrupts and the query communication mode, receives the keying instruction of control display panel, communicates by RS232 serial ports and Remote Control Interface plate, receives the steering order of maintenance calculations machine, receives the working state of system signal that comes from monitor:

Alarm status according to the two cover monitors of collecting by handling ruling, produces ALM, controls active and standby machine conversion or shutdown.

According to the corresponding operating of detected control panel, by the switching on and shutting down of executive circuit opertaing device, active and standby usefulness selection and monitor bypass, this locality and remote state conversion, lamp test etc.

Corresponding action is made in instruction according to the maintenance calculations machine that receives, as: selective system mode of operation, carry out the parameter setting, send instruction to signal generation unit, frequency synthesizer and test signal generation unit and set mode of operation, recession distance, fine delay, the output frequency of setpoint frequency compositor etc.

Provide various duty indications by the control display panel, give the maintenance calculations machine with working state of system and environmental monitoring parameter, produce plate, frequency synthesizer and standard source by CPLD expanded data bus to signal and send instruction setting mode of operation, recession distance, fine delay, the output frequency of setpoint frequency compositor.

Claims

1. the primary controller circuit in the navigator, it is characterized in that: this circuit comprises the DSP central processing unit, has the FLASH chip of software program, FRAM chip, reset circuit, real-time clock system, RS232 communication interface, CPLD module, executive circuit, described DSP central processing unit is connected with FLASH chip, FRAM chip, reset circuit, real-time clock system, CPLD module respectively, and described CPLD module is connected with executive circuit.